AD AD813AN Single supply, low power triple video amplifier Datasheet

a
Single Supply, Low Power
Triple Video Amplifier
AD813
FEATURES
Low Cost
Three Video Amplifiers in One Package
Optimized for Driving Cables in Video Systems
Excellent Video Specifications (RL = 150 V)
Gain Flatness 0.1 dB to 50 MHz
0.03% Differential Gain Error
0.068 Differential Phase Error
Low Power
Operates on Single +3 V to 615 V Power Supplies
5.5 mA/Amplifier Max Power Supply Current
High Speed
125 MHz Unity Gain Bandwidth (–3 dB)
500 V/ms Slew Rate
High Speed Disable Function per Channel
Turn-Off Time 80 ns
Easy to Use
50 mA Output Current
Output Swing to 1 V of Rails
APPLICATIONS
Video Line Driver
LCD Drivers
Computer Video Plug-In Boards
Ultrasound
RGB Amplifier
CCD Based Systems
PRODUCT DESCRIPTION
The AD813 is a low power, single supply triple video amplifier.
Each of the three current feedback amplifiers has 50 mA of output
current, and is optimized for driving one back-terminated video
load (150 Ω). The AD813 features gain flatness of 0.1 dB to
PIN CONFIGURATION
14-Lead DIP and SOIC
DISABLE1 1
14 OUT2
DISABLE2
2
13 –IN2
DISABLE3
3
12 +IN2
VS+ 4
+IN1 5
AD813
11 VS–
10 +IN3
–IN1 6
9
–IN3
OUT1 7
8
OUT3
50 MHz while offering differential gain and phase error of
0.03% and 0.06°. This makes the AD813 ideal for broadcast
and consumer video electronics.
The AD813 offers low power of 5.5 mA per amplifier max and
runs on a single +3 V power supply. The outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals. While operating on a single +5 V supply
the AD813 still achieves 0.1 dB flatness to 20 MHz and 0.05%
& 0.05° of differential gain and phase performance. All this is
offered in a small 14-lead plastic DIP or SOIC package. These
features make this triple amplifier ideal for portable and battery
powered applications where size and power are critical.
The outstanding bandwidth of 125 MHz along with 500 V/µs of
slew rate make the AD813 useful in many general purpose, high
speed applications where a single +3 V or dual power supplies
up to ± 15 V are needed. Furthermore the AD813 contains a
high speed disable function for each amplifier in order to power
down the amplifier or high impedance the output. This can then
be used in video multiplexing applications. The AD813 is available in the industrial temperature range of –40°C to +85°C in
plastic DIP and SOIC packages as well as chips.
G = +2
RL = 150V
NORMALIZED GAIN – dB
0.2
500mV
615V
500ns
0.1
100
0
90
–0.1
65V
–0.2
3V
–0.3
5V
–0.4
10
–0.5
100k
0%
1M
10M
100M
5V
FREQUENCY – Hz
Figure 1. Fine Scale Gain Flatness vs. Frequency,
G = +2, RL = 150 Ω
Figure 2. Channel Switching Characteristics for a 3:1 Mux
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
AD813* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
DESIGN RESOURCES
View a parametric search of comparable parts.
• AD813 Material Declaration
• PCN-PDN Information
EVALUATION KITS
• Quality And Reliability
• AD813 Evaluation Board
• Symbols and Footprints
DOCUMENTATION
DISCUSSIONS
Data Sheet
View all AD813 EngineerZone Discussions.
• AD813: Military Data Sheet
• AD813: Single Supply, Low Power Triple Video Amplifier
Data Sheet
SAMPLE AND BUY
Visit the product page to see pricing options.
User Guides
• UG-114: Universal Evaluation Board for Triple, High Speed
Op Amps Offered in 14-Lead SOIC Packages
TOOLS AND SIMULATIONS
• AD813 SPICE Macro-Model
REFERENCE MATERIALS
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
Tutorials
• MT-034: Current Feedback (CFB) Op Amps
• MT-051: Current Feedback Op Amp Noise Considerations
• MT-057: High Speed Current Feedback Op Amps
• MT-059: Compensating for the Effects of Input
Capacitance on VFB and CFB Op Amps Used in Current-toVoltage Converters
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AD813–SPECIFICATIONS
Dual Supply (@ T = +258C, R = 150 V, unless otherwise noted)
A
L
Model
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB
Flatness
Slew Rate1
Conditions
VS
Min
AD813A
Typ
Max
Units
G = +2, No Peaking
±5 V
± 15 V
45
75
65
100
MHz
MHz
G = +2
±5 V
± 15 V
±5 V
± 15 V
±5 V
± 15 V
15
25
25
50
150
250
225
450
MHz
MHz
V/µs
V/µs
V/µs
V/µs
±5 V
± 15 V
50
40
ns
ns
± 15 V
± 5 V, ± 15 V
± 5 V, ± 15 V
± 5 V, ± 15 V
±5 V
± 15 V
±5 V
± 15 V
–90
3.5
1.5
18
0.08
0.03
0.13
0.06
dBc
nV√Hz
pA√Hz
pA√Hz
%
%
Degrees
Degrees
± 5 V, ± 15 V
2
± 5 V, ± 15 V
± 5 V, ± 15 V
15
5
± 5 V, ± 15 V
0.5
G = +2, RL = 1 kΩ
G = –1, RL = 1 kΩ
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
Input Voltage Noise
Input Current Noise
Differential Gain Error
G = –1, RL = 1 kΩ
VO = 3 V Step
VO = 10 V Step
fC = 1 MHz, RL = 1 kΩ
f = 10 kHz
f = 10 kHz, +In
–In
NTSC, G = ± 2, RL = 150 Ω
Differential Phase Error
DC PERFORMANCE
Input Offset Voltage
TMIN–TMAX
Offset Drift
–Input Bias Current
TMIN–TMAX
+Input Bias Current
Open-Loop Voltage Gain
Open-Loop Transresistance
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common Mode
Voltage Range
Common-Mode Rejection Ratio
Input Offset Voltage
–Input Current
± Input Current
Input Offset Voltage
–Input Current
+Input Current
TMIN–TMAX
VO = ± 2.5 V, RL = 150 Ω
TMIN–TMAX
VO = ± 10 V, RL = 1 kΩ
TMIN–TMAX
VO = ± 2.5 V, RL = 150 Ω
TMIN–TMAX
VO = ± 10 V, RL = 1 kΩ
TMIN–TMAX
±5 V
± 15 V
±5 V
± 15 V
+Input
–Input
+Input
± 15 V
± 15 V
± 15 V
±5 V
± 15 V
VCM = ± 2.5 V
±5 V
VCM = ± 10 V
± 15 V
–2–
150
69
66
73
72
300
200
400
300
0.09
0.12
5
12
30
35
1.7
2.5
76
82
500
900
15
65
1.7
± 4.0
± 13.5
54
57
58
2
0.07
62
1.5
0.05
mV
mV
µV/°C
µA
µA
µA
µA
dB
dB
dB
dB
kΩ
kΩ
kΩ
kΩ
MΩ
Ω
pF
V
V
3
0.15
3.0
0.1
dB
µA/V
µA/V
dB
µA/V
µA/V
REV. B
AD813
Model
OUTPUT CHARACTERISTICS
Output Voltage Swing
Conditions
VS
Min
RL = 150 Ω, TMIN–TMAX
RL = 1 kΩ, TMIN–TMAX
±5 V
± 15 V
±5 V
± 15 V
± 15 V
3.5
13.6
25
30
Output Current
Short Circuit Current
G = +2, RF = 715 Ω
VIN = 2 V
AD813A
Typ
±V
±V
mA
mA
mA
dB
dB
G = +2, f = 5 MHz
G = +2, f = 40 MHz
± 5 V, ± 15 V
± 15 V
–65
0.1
TMIN–TMAX
TMIN–TMAX
± 5 V, ± 15 V
± 5 V, ± 15 V
0.5
2
POWER SUPPLY
Operating Range
Quiescent Current
Per Amplifier
±5 V
± 15 V
± 15 V
±5 V
± 15 V
Power Supply Rejection Ratio
Input Offset Voltage
–Input Current
+Input Current
DISABLE CHARACTERISTICS
Off Isolation
Off Output Impedance
Channel-to-Channel
Isolation
Turn-On Time
Turn-Off Time
TMIN–TMAX
Per Amplifier
VS = ± 1.5 V to ± 15 V
f = 5 MHz
G = +1
2 or 3 Channels
Mux, f = 5 MHz
NOTES
1
Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
Specifications subject to change without notice.
REV. B
–3–
3.5
25
mV
µA
0.5
0.75
± 18
4.0
5.5
6.7
0.65
1.0
V
mA
mA
mA
mA
mA
80
0.3
0.005
0.8
0.05
dB
µA/V
µA/V
± 1.2
3.5
4.5
72
Units
3.8
14.0
40
50
100
MATCHING CHARACTERISTICS
Dynamic
Crosstalk
Gain Flatness Match
DC
Input Offset Voltage
–Input Bias Current
Quiescent Current, Powered Down
Max
± 5 V, ± 15 V
± 5 V, ± 15 V
± 5 V, ± 15 V
–57
12.5
–65
dB
pF
dB
± 5 V, ± 15 V
100
80
ns
ns
AD813–SPECIFICATIONS
Single Supply (@ T = +258C, R = 150 V, unless otherwise noted)
A
L
Model
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB
Flatness
Slew Rate1
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
Input Current Noise
Differential Gain Error2
Differential Phase Error2
AD813A
Typ
Max
Conditions
VS
Min
G = +2, No Peaking
+5 V
+3 V
35
25
50
40
MHz
MHz
G = +2
+5 V
+3 V
+5 V
+3 V
12
8
20
15
100
50
MHz
MHz
V/µs
V/µs
+5 V, +3 V
+5 V, +3 V
+5 V, +3 V
+5 V
+3 V
+5 V
+3 V
3.5
1.5
18
0.05
0.2
0.05
0.2
nV√Hz
pA√Hz
pA√Hz
%
%
Degrees
Degrees
+5 V, +3 V
1.5
+5 V, +3 V
+5 V, +3 V
7
7
+5 V, +3 V
0.5
G = +2, RL = 1 kΩ
f = 10 kHz
f = 10 kHz, +In
–In
NTSC, G = +2, RL = 150 Ω
G = +1
G = +2
G = +1
DC PERFORMANCE
Input Offset Voltage
TMIN–TMAX
Offset Drift
–Input Bias Current
TMIN–TMAX
+Input Bias Current
Open-Loop Voltage Gain
Open-Loop Transresistance
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common Mode
Voltage Range
Common-Mode Rejection Ratio
Input Offset Voltage
–Input Current
+Input Current
Input Offset Voltage
–Input Current
+Input Current
OUTPUT CHARACTERISTICS
Output Voltage Swing p-p
TMIN–TMAX
VO = +2.5 V p-p
VO = +0.7 V p-p
VO = +3 V p-p
VO = +1 V p-p
+5 V
+3 V
+5 V
+3 V
+Input
–Input
+Input
180
+5 V, +3 V
+5 V
VCM = 1.25 V to 3.75 V
1.0
1.0
+5 V
54
+3 V
RL = 150 Ω, TMIN–TMAX
+5 V
+3 V
+5 V
+3 V
+5 V
G = +2, RF = 715 Ω
VIN = 1 V
–4–
30
40
1.7
2.5
70
69
300
225
15
90
2
+5 V
+3 V
VCM = 1 V to 2 V
Output Current
Short Circuit Current
65
5
10
3.0
1.0
20
15
4.0
2.0
58
3
0.1
56
3.5
0.1
3.2
1.3
30
25
40
6.5
0.2
Units
mV
mV
µV/°C
µA
µA
µA
µA
dB
dB
kΩ
kΩ
MΩ
Ω
pF
V
V
dB
µA/V
µA/V
dB
µA/V
µA/V
± V p-p
± V p-p
mA
mA
mA
REV. B
AD813
Model
Conditions
VS
Min
AD813A
Typ
MATCHING CHARACTERISTICS
Dynamic
Crosstalk
Gain Flatness Match
DC
Input Offset Voltage
–Input Bias Current
G = +2, f = 5 MHz
G = +2, f = 20 MHz
+5 V, +3 V
+5 V, +3 V
–65
0.1
TMIN–TMAX
TMIN–TMAX
+5 V, +3 V
+5 V, +3 V
0.5
2
POWER SUPPLY
Operating Range
Quiescent Current
Per Amplifier
+5 V
+3 V
+5 V
+5 V
+3 V
Quiescent Current, Powered Down
Power Supply Rejection Ratio
Input Offset Voltage
–Input Current
+Input Current
DISABLE CHARACTERISTICS
Off Isolation
Off Output Impedance
Channel-to-Channel
Isolation
Turn-On Time
Turn-Off Time
2.4
TMIN–TMAX
Per Amplifier
3.2
3.0
0.4
0.4
VS = +3.0 V to +30 V
f = 5 MHz
G = +1
2 or 3 Channel
Mux, f = 5 MHz
Max
Units
dB
dB
3.5
25
mV
µA
36
4.0
4.0
5.0
0.6
0.5
V
mA
mA
mA
mA
mA
76
0.3
0.005
dB
µA/V
µA/V
+5 V, +3 V
+5 V, +3 V
+5 V, +3 V
–55
13
–65
dB
pF
dB
+5 V, +3 V
100
80
ns
ns
TRANSISTOR COUNT
111
NOTES
1
Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
2
Single supply differential gain and phase are measured with the ac coupled circuit of Figure 52.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Watts
Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 Watts
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range N, R . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD813A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . +300°C
ORDERING GUIDE
Model
AD813AN
AD813AR-14
AD813ACHIPS
AD813AR-REEL
AD813AR-REEL7
5962-9559601M2A*
Package
Description
Package
Options
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
14-Lead Plastic DIP N-14
14-Lead Plastic SOIC R-14
Die Form
13" REEL
7" REEL
–55°C to +125°C 20-Lead LCC
*Refer to official DSCC drawing for tested specifications and pin configuration.
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
14-Lead Plastic DIP Package: θJA = 75°C/W
14-Lead SOIC Package: θJA = 120°C/W
REV. B
Temperature
Range
–5–
AD813
2.5
Maximum Power Dissipation
TJ = +150 C
MAXIMUM POWER DISSIPATION – Watts
The maximum power that can be safely dissipated by the
AD813 is limited by the associated rise in junction temperature.
The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature
of the plastic, about 150°C. Exceeding this limit temporarily
may cause a shift in parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a
junction temperature of 175°C for an extended period can result
in device failure.
While the AD813 is internally short circuit protected, this may
not be enough to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To
ensure proper operation, it is important to observe the derating
curves.
2.0
14-LEAD DIP PACKAGE
1.5
14-LEAD SOIC
1.0
0.5
–50 –40 –30 –20 –10 0 10 20 30 40 50 60
AMBIENT TEMPERATURE – C
70
80 90
Figure 3. Maximum Power Dissipation vs. Ambient
Temperature
It must also be noted that in (noninverting) gain configurations
(with low values of gain resistor), a high level of input overdrive
can result in a large input error current, which may result in a
significant power dissipation in the input stage. This power
must be included when computing the junction temperature rise
due to total internal power.
METALIZATION PHOTO
Dimensions shown in inches and (mm).
+IN2
12
0.124
(3.15)
VS–
11
VS–
11
VS–
11
+IN3
10
9 –IN3
–IN2 13
8 OUT3
OUT2 14
0.057
(1.45)
7 OUT1
DISABLE1 1
DISABLE2 2
3
DISABLE3
4
VS+
5
+IN1
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD813 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–6–
6
–IN1
WARNING!
ESD SENSITIVE DEVICE
REV. B
AD813
20
18
15
VS = 615V
SUPPLY CURRENT – mA
COMMON-MODE VOLTAGE RANGE – 6Volts
20
10
5
16
14
VS = 65V
12
10
0
0
5
10
15
SUPPLY VOLTAGE – 6Volts
8
–60
20
–40
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE – C
Figure 4. Input Common-Mode Voltage Range vs.
Supply Voltage
Figure 7. Supply Current vs. Junction Temperature
20
13
TA = +25 C
SUPPLY CURRENT – mA
OUTPUT VOLTAGE – V p-p
12
15
NO LOAD
10
RL = 150V
5
11
10
9
0
0
5
10
15
SUPPLY VOLTAGE – 6Volts
8
20
2
4
6
10
8
12
14
16
SUPPLY VOLTAGE – ±Volts
Figure 8 Supply Current vs. Supply Voltage at Low
Voltages
Figure 5. Output Voltage Swing vs. Supply Voltage
25
30
615V SUPPLY
20
25
15
INPUT BIAS CURRENT – mA
OUTPUT VOLTAGE – V p-p
0
20
15
10
65V SUPPLY
5
10
–IB, VS = 65V
5
0
+IB, VS = 65V, 615V
–5
–IB, VS = 615V
–10
–15
–20
0
10
100
1k
–25
–60
10k
LOAD RESISTANCE – V
–20
0
20
40
60
80
100
120
140
JUNCTION TEMPERATURE – C
Figure 6. Output Voltage Swing vs. Load Resistance
REV. B
–40
Figure 9. Input Bias Current vs. Junction Temperature
–7–
AD813
4
70
VS = 65V
0
60
OUTPUT CURRENT – mA
INPUT OFFSET VOLTAGE – mV
2
–2
–4
VS = 615V
–6
–8
–10
–12
50
40
30
–14
–16
–60
–40
–20
0
20
40
60
80
100
120
20
140
0
5
JUNCTION TEMPERATURE – C
Figure 10. Input Offset Voltage vs. Junction
Temperature
20
1k
CLOSED-LOOP OUTPUT RESISTANCE – V
VS = 615V
SHORT CIRCUIT CURRENT – mA
15
Figure 13. Linear Output Current vs. Supply Voltage
160
140
SINK
120
100
SOURCE
80
60
40
–60
10
SUPPLY VOLTAGE – 6Volts
–40
–20
0
20
40
60
80
100
120
G = +2
100
10
1
5VS
0.1
15VS
0.01
10k
140
100k
1M
FREQUENCY – Hz
JUNCTION TEMPERATURE – C
Figure 11. Short Circuit Current vs. Junction
Temperature
10M
100M
Figure 14. Closed-Loop Output Resistance vs.
Frequency
1M
80
ΩOUTPUT RESISTANCE – V
OUTPUT CURRENT – mA
70
60
50
VS = 65V
40
VS = 615V
100k
10k
1k
30
20
–60
–40
–20
0
20
40
60
80
100
120
100
100k
140
JUNCTION TEMPERATURE – C
1M
10M
100M
FREQUENCY – Hz
Figure 12. Linear Output Current vs. Junction
Temperature
Figure 15. Output Resistance vs. Frequency, Disabled
State
–8–
REV. B
AD813
120
VS = 615V
PHASE
–45
10
10
VOLTAGE NOISE
TRANSIMPEDANCE – dB
INVERTING INPUT CURRENT NOISE
CURRENT NOISE – pA/ Hz
VOLTAGE NOISE – nV/ Hz
–90
GAIN
100
1k
FREQUENCY – Hz
VS = 3V
40
10k
VS = 615V
100k
1M
FREQUENCY – Hz
10M
100M
Figure 19. Open-Loop Transimpedance vs. Frequency
(Relative to 1 Ω)
Figure 16. Input Current and Voltage Noise vs.
Frequency
90
–30
681V
80
G = +2
VO = 2V p-p
VS = 615V: RL = 1kV
VS = 65V: RL = 150V
681V
VIN
VOUT
HARMONIC DISTORTION – dBc
COMMON-MODE REJECTION – dB
–180
60
1
100k
10k
VS = 3V
80
NONINVERTING INPUT
CURRENT NOISE
1
10
–135
100
PHASE – Degrees
0
100
100
70
681V
681V
60
50
VS = 3V
40
VS = 615V
30
–50
–70
2ND HARMONIC
VS = 65V
–90
3RD HARMONIC
VS = 65V
VS = 615V
–110
20
2ND
3RD
10
10k
100k
1M
FREQUENCY – Hz
10M
–130
100M
615V
OUTPUT SWING FROM 6V TO 0
POWER SUPPLY REJECTION – dB
10M
100M
GAIN = –1
VS = 615V
8
70
60
50
61.5V
30
20
10
6
4
2
1%
0
0.1%
0.025%
–2
–4
–6
–8
–10
100k
1M
FREQUENCY – Hz
10M
20
100M
40
60
SETTLING TIME – ns
80
Figure 21. Output Swing and Error vs. Settling Time
Figure 18. Power Supply Rejection vs. Frequency
REV. B
100k
1M
FREQUENCY – Hz
10
80
0
10k
10k
Figure 20. Harmonic Distortion vs. Frequency
Figure 17. Common-Mode Rejection vs. Frequency
40
1k
–9–
AD813
700
1000
VS = 615V
RL = 500V
900
600
G = +10
500
700
SLEW RATE – V/ms
SLEW RATE – V/ms
800
600
G = +10
500
400
G = –1
300
400
G = –1
300
G = +2
200
G = +2
200
100
100
G = +1
G = +1
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1.5
3.0
4.5
Figure 22. Slew Rate vs. Output Step Size
AAA
A
AA
A
A
AAA
AA
A
AAAA
AAAA
A
AAA
A
AA
A
A
A
A
A
AAAA
AA AAAAA
2V
500m V
100
VIN
90
VIN
10
VOUT
65V
–90
–180
+1
CLOSED-LOOP GAIN – dB
0
GAIN
–270
VS = 615V
65V
5V
20n s
90
0%
RL = 150V
3V
–3
15.0
140
–3dB BANDWIDTH – MHz
VS = 615V
–2
13.5
Figure 26. Small Signal Pulse Response, Gain = +1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)
PHASE SHIFT – Degrees
+90
–1
12.0
500m V
Figure 23. Large Signal Pulse Response, Gain = +1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)
0
10.5
1 00
2V
5V
9.0
10
VOUT
0%
3V
7.5
Figure 25. Maximum Slew Rate vs. Supply Voltage
50ns
PHASE
6.0
SUPPLY VOLTAGE – 6Volts
OUTPUT STEP SIZE – V p-p
120
100
RF = 750V
80
RF = 866V
60
RF = 1kV
40
–4
–5
–6
1
10
100
2
1000
FREQUENCY – MHz
Figure 24. Closed-Loop Gain and Phase vs. Frequency,
G = +1
4
6
8
10
12
SUPPLY VOLTAGE – 6Volts
14
16
Figure 27. –3 dB Bandwidth vs. Supply Voltage, G = +1
–10–
REV. B
AD813
100
100
90
VIN
90
VIN
10
VOUT
10
VOUT
0%
0%
500mV
500mV
G = +10
RL = 150V
65V
–90
5V
+1
–180
3V
GAIN
0
0
–270
VS = 615V
–1
5V
–2
–3
65V
3V
–4
–5
–6
1
10
100
VS = 615V
PHASE
CLOSED-LOOP GAIN (NORMALIZED) – dB
VS = 615V
PHASE SHIFT – Degrees
PHASE
+1
–180
5V
GAIN
0
–270
–1
VS = 615V
5V
–2
–3
65V
3V
–5
–6
1
10
100
FREQUENCY – MHz
G = +10
RL = 1kV
90
–3dB BANDWIDTH – MHz
–3dB BANDWIDTH – MHz
80
RF = 357V
60
RF = 154V
50
1000
Figure 32. Closed-Loop Gain and Phase vs. Frequency,
G = +10, RL = 1 kΩ
G = +10
RL = 150V
1dB
–360
–4
1000
Figure 29. Closed-Loop Gain and Phase vs. Frequency,
G = +10, RL = 150 Ω
PEAKING
0
–90
65V
3V
FREQUENCY – MHz
70
G = +10
RL = 1kV
RF = 649V
40
30
20
RF = 357V
80
70
60
50
RF = 649V
RF = 154V
40
30
20
2
4
6
8
10
12
14
16
2
SUPPLY VOLTAGE – 6Volts
4
6
8
10
12
14
16
SUPPLY VOLTAGE – 6Volts
Figure 30. –3 dB Bandwidth vs. Supply Voltage,
G = +10, RL = 150 Ω
REV. B
PHASE SHIFT – Degrees
Figure 31. Small Signal Pulse Response, Gain = +10,
(RF = 357 Ω, RL = 150 Ω, VS = ± 5 V)
Figure 28. Large Signal Pulse Response, Gain = +10,
(RF = 357 Ω, RL = 500 Ω, VS = ± 15 V)
CLOSED-LOOP GAIN (NORMALIZED) – dB
20ns
50mV
50ns
500mV
Figure 33. –3 dB Bandwidth vs. Supply Voltage,
G = +10, RL = 1 kΩ
–11–
AD813
2V
500m V
50ns
100
10 0
90
90
10
10
0%
0%
2V
500m V
65V
–90
3V
5V
CLOSED-LOOP GAIN – dB
+1
0
–180
GAIN
–270
VS = 615V
–1
PHASE
3V
–2
65V
–3
5V
–4
–5
–6
1
10
100
FREQUENCY – MHz
VS = 615V
65V
–90
+1
–180
5V
GAIN
0
–270
–1
VS = 615V
–2
3V
–3
65V
–4
5V
–5
–6
10
100
FREQUENCY – MHz
1000
Figure 38. Closed-Loop Gain and Phase vs. Frequency,
G = –10, RL = 1 kΩ
Figure 35. Closed-Loop Gain and Phase vs. Frequency,
G = –1, RL = 150 Ω
G = –1
RL = 150V
G = –10
RL = 1kV
110
80
100
–3dB BANDWIDTH – MHz
–3dB BANDWIDTH – MHz
0
3V
1
1000
G = –10
RL = 1kV
PHASE SHIFT – Degrees
G = –1
RL = 150V
CLOSED-LOOP GAIN (NORMALIZED) – dB
VS = 615V
PHASE
Figure 37. Small Signal Pulse Response, Gain = –1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)
PHASE SHIFT – Degrees
Figure 34. Large Signal Pulse Response, Gain = –1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)
0
2 0n s
PEAKING 1.0dB
RF = 681V
90
80
PEAKING 0.2dB
RF = 715V
70
60
50
70
RF = 357V
60
RF = 154V
50
RF = 649V
40
30
20
40
2
4
6
8
10
12
14
16
2
SUPPLY VOLTAGE – 6Volts
4
6
8
10
12
14
16
SUPPLY VOLTAGE – 6Volts
Figure 36. –3 dB Bandwidth vs. Supply Voltage, G = –1,
RL = 150 Ω
Figure 39. –3 dB Bandwidth vs. Supply Voltage,
G = –10, RL = 1 kΩ
–12–
REV. B
AD813
General Consideration
The AD813 is a wide bandwidth, triple video amplifier that
offers a high level of performance on less than 5.5 mA per amplifier of quiescent supply current. With its fast acting power
down switch, it is designed to offer outstanding functionality
and performance at closed-loop inverting or noninverting gains
of one or greater.
To estimate the –3 dB bandwidth for closed-loop gains or feedback resistors not listed in the above table, the following two
pole model for the AD813 may be used:
ACL =
Built on a low cost, complementary bipolar process, and achieving bandwidth in excess of 100 MHz, differential gain and phase
errors of better than 0.1% and 0.1° (into 150 Ω), and output
current greater than 40 mA, the AD813 is an exceptionally
efficient video amplifier. Using a conventional current feedback
architecture, its high performance is achieved through careful
attention to design details.
where:
RF
RG
f2
s
Choice of Feedback & Gain Resistors
Because it is a current feedback amplifier, the closed-loop bandwidth of the AD813 depends on the value of the feedback resistor. The bandwidth also depends on the supply voltage. In
addition, attenuation of the open-loop response when driving
load resistors less than about 250 Ω will also affect the bandwidth. Table I contains data showing typical bandwidths at
different supply voltages for some useful closed-loop gains when
driving a load of 150 Ω. (Bandwidths will be about 20% greater
for load resistances above a few hundred ohms.)
ACL =
G =
rIN =
CT =
=
=
=
=
G
(RF + Gr IN)CT 
S
+ S (R F + GrIN ) CT + 1

2 π f2


2


closed-loop gain from “transcapacitance”
1 + RF/RG
input resistance of the inverting input
“transcapacitance,” which forms the
open-loop dominant pole with the
transresistance
feedback resistor
gain resistor
frequency of second (nondominant) pole
2 πj f
Appropriate values for the model parameters at different supply
voltages are listed in Table II. Reasonable approximations for
these values at supply voltages not found in the table can be
obtained by a simple linear interpolation between those tabulated values which ‘bracket’ the desired condition.
Table II. Two Pole Model Parameters at Various Supplies
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and
Feedback Resistor , (RL = 150 V)
VS (V)
Gain
RF (V)
BW (MHz)
± 15
+1
+2
+10
–1
–10
866
681
357
681
357
125
100
60
100
55
+1
+2
+10
–1
–10
750
649
154
649
154
75
65
40
70
40
+1
+2
+10
–1
–10
715
619
154
619
154
60
50
30
50
30
+1
+2
+10
–1
–10
681
619
154
619
154
50
40
25
40
20
±5
+5
+3
VS (V)
rIN (V)
CT (pF)
f2 (MHz)
± 15
±5
+5
+3
85
90
105
115
2.5
3.8
4.8
5.5
150
125
105
95
As discussed in many amplifier and electronics textbooks (such
as Roberge’s Operational Amplifiers: Theory and Practice), the
–3 dB bandwidth for the 2-pole model can be obtained as:
[
f 3 = f n 1 − 2d 2 + (2 − 4d 2 + 4d 4 )1/2

1/2
1/2

f2

(
R
+
Gr
)
C
IN
T 
 F
where:
fn = 
and:
d=
[
1
f 2 (R F +Gr IN ) C T
2
]1/2
This model will predict –3 dB bandwidth within about 10% to
15% of the correct value when the load is 150 Ω. However, it is
not accurate enough to predict either the phase behavior or the
frequency response peaking of the AD813.
The choice of feedback resistor is not critical unless it is important to maintain the widest, flattest frequency response. The
resistors recommended in the table are those (metal film values)
that will result in the widest 0.1 dB bandwidth. In those applications where the best control of the bandwidth is desired, 1%
metal film resistors are adequate. Wider bandwidths can be
attained by reducing the magnitude of the feedback resistor (at
the expense of increased peaking), while peaking can be reduced
by increasing the magnitude of the feedback resistor.
REV. B
]
–13–
AD813
Printed Circuit Board Layout Guidelines
As with all wideband amplifiers, printed circuit board parasitics
can affect the overall closed-loop performance. Most important
for controlling the 0.1 dB bandwidth are stray capacitances at
the output and inverting input nodes. Increasing the space between signal lines and ground plane will minimize the coupling.
Also, signal lines connecting the feedback and gain resistors
should be kept short enough that their associated inductance
does not cause high frequency gain errors.
Power Supply Bypassing
Adequate power supply bypassing can be very important when
optimizing the performance of high speed circuits. Inductance
in the supply leads can (for example) contribute to resonant
circuits that produce peaking in the amplifier’s response. In
addition, if large current transients must be delivered to a load,
then large (greater than 1 µF) bypass capacitors are required to
produce the best settling time and lowest distortion. Although
0.1 µF capacitors may be adequate in some applications, more
elaborate bypassing is required in other cases.
A carefully laid-out PC board should be able to achieve the level
of crosstalk shown in the figure. The most significant contributors to difficulty in achieving low crosstalk are inadequate power
supply bypassing, overlapped input and/or output signal paths,
and capacitive coupling between critical nodes.
The bypass capacitors must be connected to the ground plane at
a point close to and between the ground reference points for the
loads. (The bypass of the negative power supply is particularly
important in this regard.) This requires careful planning as
there are three amplifiers in the package, and low impedance
signal return paths must be provided for each load. (Using a
parallel combination of 1 µF, 0.1 µF, and 0.01 µF bypass capacitors will help to achieve optimal crosstalk.)
The input and output signal return paths (to the bypass caps)
must also be kept from overlapping. Since ground connections
are not of perfectly zero impedance, current in one ground
return path can produce a voltage drop in another ground return path if they are allowed to overlap.
When multiple bypass capacitors are connected in parallel, it is
important to be sure that the capacitors themselves do not form
resonant circuits. A small (say 5 Ω) resistor may be required in
series with one of the capacitors to minimize this possibility.
Electric field coupling external to (and across) the package can
be reduced by arranging for a narrow strip of ground plane to be
run between the pins (parallel to the pin rows). Doing this on
both sides of the board can reduce the high frequency crosstalk
by about 5 dB or 6 dB.
As discussed below, power supply bypassing can have a significant impact on crosstalk performance.
Driving Capacitive Loads
Achieving Low Crosstalk
Measured crosstalk from the output of Amplifier 2 to the input
of Amplifier 1 of the AD813 is shown in Figure 40. All other
crosstalk combinations, (from the output of one amplifier to the
input of another), are a few dB better than this due to the additional distance between critical signal nodes.
When used with the appropriate output series resistor, any load
capacitance can be driven without peaking or oscillation. In
most cases, less than 50 Ω is all that is needed to achieve an
extremely flat frequency response. As illustrated in Figure 44,
the AD813 can be very attractive for driving large capacitive
loads. In this case, the AD813’s high output short circuit current allows for a 150 V/µs slew rate when driving a 510 pF
capacitor.
–10
RL = 150V
–20
RF
–30
+VS
0.1mF
CROSSTALK – dB
–40
–50
1.0mF
RG
–60
4
–70
–80
VIN
11
VO
1.0mF
CL
RL
RT
–90
0.1mF
–100
–110
100k
RS
AD813
1M
10M
FREQUENCY – Hz
–VS
100M
Figure 41. Circuit for Driving a Capacitive Load
Figure 40. Worst Case Crosstalk vs. Frequency
–14–
REV. B
AD813
CLOSED-LOOP GAIN – dB
VS = 65V
G = +2
RF = 750V
RL = 1kV
CL = 10pF
9
RS = 0
6
3
RS = 30V
0
RS = 50V
–3
Overload Recovery
There are three important overload conditions to consider.
They are due to: input common-mode voltage overdrive, output voltage overdrive, and input current overdrive. When the
amplifier is configured for low closed-loop gains, and the input
common-mode voltage range is exceeded, the recovery time will
be very fast, typically under 30 ns. When configured for a
higher gain, and overloaded at the output, the recovery time will
also be short. For example, in a gain of +10, with 6 dB of
input overdrive, the recovery time of the AD813 is about 25 ns
(see Figure 45).
1V
1
10
100
FREQUENCY – MHz
50ns
1000
100
90
Figure 42. Response to a Small Load Capacitor at
VS = ± 5 V
VS = 615V
G = +2
RF = 750V
RL = 1kV
10
0%
CLOSED-LOOP GAIN – dB
2V
9
6
Figure 45. 6 dB Overload Recovery, G = +10,
(RL = 500 Ω, RF = 357 Ω, VS = ± 5 V)
CL = 150pF, RS = 30V
3
In the case of high gains with very high levels of input overdrive,
a longer recovery time will occur. For example, if the input
common-mode voltage range is exceeded in the gain of +10, the
recovery time will be on the order of 100 ns. This is primarily
due to current overloading of the input stage.
0
CL = 510pF, RS = 15V
–3
1
10
100
FREQUENCY – MHz
1000
Figure 43. Response to a Large Load Capacitor at
VS = ± 15 V
5V
100
As noted in the warning under Maximum Power Dissipation, a
high level of input overdrive in a high noninverting gain circuit
can result in a large current flow in the input stage. Though this
current is internally limited to about 40 mA, its effect on the
total power dissipation may be significant.
1 00 n s
100
90
10
0%
5V
Figure 44. Circuit of Figure 38 Driving a 510 pF Load
Capacitor, VS = ± 15 V (RL = 1 kΩ, RF = RG = 750 Ω,
RS =15 Ω)
REV. B
–15–
AD813
High Performance Video Line Driver
RG
Figures 50 and 51 show the worst case matching; the match
between amplifiers 2 and 3 is typically much better than this.
RF
+VS
0.1mF
75V
75V CABLE
4
75V
CABLE
0.2
VOUT
AD813
VIN
G = +2
RL = 150V
NORMALIZED GAIN – dB
At a gain of +2, the AD813 makes an excellent driver for a back
terminated 75 Ω video line. Low differential gain and phase
errors and wide 0.1 dB bandwidth can be realized over a wide
range of power supply voltage. Excellent gain and group delay
matching are also attainable over the full operating supply voltage range.
615V
0.1
0
–0.1
65V
–0.2
3V
–0.3
5V
–0.4
75V
11
–0.5
0.1mF
75V
100k
–VS
0
–90
VS = 615V
65V
3V
–180
5V
–270
0
–1
2.5
1.5
VS = 615V
5V
–3
65V
–4
G = +2
RL = 150V
2.0
GAIN MATCHING – dB
CLOSED-LOOP GAIN (NORMALIZED) – dB
G = +2
RL = 150V
–2
3V
1.0
0.5
VS = 615V
0
–0.5
VS = 3V
–1.0
–1.5
–5
–2.0
–6
–2.5
1
10
100
1000
1
FREQUENCY – MHz
10
100
FREQUENCY – MHz
1000
Figure 50. Closed-Loop Gain Matching vs. Frequency
Figure 47. Closed-Loop Gain & Phase vs. Frequency for
the Line Driver
10
120
110
RF = 590V
8
100
RF = 681V
6
90
RF = 750V
4
GROUP DELAY – ns
–3dB BANDWIDTH – MHz
100M
Figure 49. Fine-Scale Gain (Normalized) vs. Frequency
PHASE SHIFT – Degrees
+90
PHASE
GAIN
10M
FREQUENCY – Hz
Figure 46. A Video Line Driver Operating at a Gain of
+2 (RF = RG from Table I)
+1
1M
80
NO PEAKING
70
60
50
2
VS = 3V
5V
65V
615V
DELAY
1.0
VS = 615V
0.5
40
0
30
–0.5
20
–1.0
100k
3V
DELAY MATCHING
0
2
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE – Volts
1M
10M
FREQUENCY – Hz
100M
Figure 51. Group Delay and Group Delay Matching vs.
Frequency, G = +2, RL = 150 Ω
Figure 48. –3 dB Bandwidth vs. Supply Voltage for
Gain = +2, RL = 150 Ω
–16–
REV. B
AD813
Operation Using a Single Supply
Disable Mode Operation
The AD813 will operate with total supply voltages from 36 V
down to 2.4 V. With proper biasing (see Figure 52) it can
make an outstanding single supply video amplifier. Since the
input and output voltage ranges extend to within 1 V of the
supply rails, it will handle a 1.3 V peak-to-peak signal on a
single 3.3 V supply, or a 3 V peak-to-peak signal on a single
5 V supply. The small signal 0.1 dB bandwidths will exceed
10 MHz in either case, and the large signal bandwidths will
exceed 6 MHz.
Pulling the voltage on any one of the Disable pins about 2.5 V
down from the positive supply will put the corresponding amplifier into a disabled, powered down, state. In this condition, the
amplifier’s quiescent supply current drops to about 0.5 mA, its
output becomes a high impedance, and there is a high level of
isolation from input to output. In the case of the gain of two
line driver for example, the impedance at the output node will
be about the same as for a 1.4 kΩ resistor (the feedback plus
gain resistors) in parallel with a 12.5 pF capacitor and the input
to output isolation will be about 65 dB at 1 MHz.
The capacitively coupled cable driver in Figure 52 will achieve
outstanding differential gain and phase errors of 0.05% and 0.05
degrees respectively on a single 5 V supply. Resistor R2, in this
circuit, is selected to optimize the differential gain and phase by
biasing the amplifier in its most linear region.
619V
619V
R3
1kV
C3
30mF
C2
1mF
R1
9kV
C1
2mF
COUT
75V
47mF 75V CABLE
AD813
VIN
Input voltages greater than about 1.5 V peak-to-peak will defeat
the isolation. In addition, large signals (greater than 3 V peakto-peak) applied to the output node will cause the output impedance to drop significantly.
+5V
4
VOUT
75V
11
R2
12.4kV
VS = 5V
G = +2
RF = 619V
RL = 150V
CLOSED-LOOP GAIN – dB
0.5
0
–90
–180
0
GAIN
–0.5
–270
PHASE SHIFT – Degrees
Figure 52. Biasing for Single Supply Operation
PHASE
Leaving the Disable pin disconnected (floating) will leave the
corresponding amplifier operational, in the enabled state. The
input impedance of the disable pins is about 35 kΩ in parallel
with a few pF. When grounded, about 50 µA flows out of a
disable pin on ± 5 V supplies.
When the Disable pins are driven by complementary output
CMOS logic (such as the 74HC04), the disable time is about
80 ns (until the output goes high impedance) and the enable
time is about 100 ns (to low impedance output) on ± 15 V supplies. When operated on ± 15 V supplies, the disable pins
should be driven by open drain logic. In this case, pull-up resistors from the disable pins to the plus supply will ensure minimum switching time.
464V
590V
+5V
4
6
–1.0
84V
7
–1.5
VIN1
–2.0
5
1
75V
–2.5
SELECT1
–3.0
464V
–3.5
1
10
100
590V
1000
FREQUENCY – MHz
Figure 53. Closed-Loop Gain and Phase vs. Frequency,
Circuit of Figure 52
13
VIN2
1V
84V
75V
CABLE
VOUT
14
50ns
12
75V
2
75V
100
VIN
90
SELECT2
464V
590V
9
84V
VOUT
8
10
VIN3
0%
75V
500mV
10
11
3
–5V
SELECT3
Figure 54. Pulse Response for the Circuit of Figure 52
with +VS = 5 V
REV. B
Figure 55. A Fast Switching 3:1 Video Mux
(Supply Bypassing Not Shown)
–17–
AD813
3:1 Video Multiplexer
Single Supply Differential Line Driver
Wiring the amplifier outputs together will form a 3:1 mux with
outstanding gain flatness. Figure 55 shows a recommended
configuration which results in –0.1 dB bandwidth of 20 MHz
and OFF channel isolation of 60 dB at 10 MHz on ± 5 V supplies. The time to switch between channels is about 180 ns.
Switching time is only slightly affected by signal level.
Due to its outstanding overall performance on low supply voltages, the AD813 makes possible exceptional differential transmission on very low power. The circuit of Figure 59 will convert
a single-ended, ground referenced signal to a differential signal
whose common-mode reference is set to one half the supply
voltage. This allows for a greater than 2 V peak-to-peak signal
swing on a single 3 V power supply. A bandwidth over 30 MHz
is achieved with 20 mA of output drive on only 30 mW of quiescent power (excluding load current).
500mV
500ns
100
715V
90
715V
VOUT+
1mF
+3V
RL1
4
2
+3V
715V
10
0%
1kV
1mF
715V
715V
VIN
5V
9kV
1
715V
Figure 56. Channel Switching Characteristic for the
3:1 Mux
1mF
715V
1mF
10kV
–10
3
VOUT–
–20
11
FEEDTHROUGH – dB
–30
RL2
–40
715V
–50
–60
715V
Figure 59. Single 3 V Supply Differential Line Driver
with 2 V Swing
–70
–80
–90
1V
50ns
–100
VIN
100
–110
100k
90
1M
10M
100M
FREQUENCY – Hz
Figure 57. 3:1 Mux OFF Channel Feedthrough vs.
Frequency
–45
–90
CLOSED-LOOP GAIN – dB
0.5
–135
–180
0
GAIN
VOUT+ – VOUT–
10
PHASE SHIFT – Degrees
0
PHASE
0%
1V
Figure 60. Differential Driver Pulse Response (VS = 3 V,
RL1 = RL2 = 200 Ω)
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
1
10
FREQUENCY – MHz
100
Figure 58. 3:1 Mux ON Channel Gain and Phase vs.
Frequency
–18–
REV. B
AD813
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
0.795 (20.19)
0.725 (18.42)
14
8
1
7
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
PIN 1
0.210 (5.33)
MAX
0.325 (8.25)
0.300 (7.62) 0.195 (4.95)
0.115 (2.93)
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.100 0.070 (1.77)
(2.54) 0.045 (1.15)
BSC
C1860b–0–5/98
14-Lead Plastic DIP
(N-14)
14-Lead SOIC
(R-14)
0.3444 (8.75)
0.3367 (8.55)
0.1574 (4.00)
0.1497 (3.80)
14
8
1
7
PIN 1
0.0098 (0.25)
0.0040 (0.10)
0.0688 (1.75)
0.0532 (1.35)
0.0192 (0.49)
0.0138 (0.35)
0.0099 (0.25)
0.0075 (0.19)
0.0196 (0.50)
x 45
0.0099 (0.25)
8
0
0.0500 (1.27)
0.0160 (0.41)
PRINTED IN U.S.A.
0.0500
SEATING (1.27)
PLANE BSC
0.2440 (6.20)
0.2284 (5.80)
REV. B
–19–