AD AD680JN Low power, low cost 2.5 v reference Datasheet

Low Power, Low Cost
2.5 V Reference
AD680
GENERAL DESCRIPTION
The AD680 is a band gap voltage reference that provides a fixed
2.5 V output from inputs between 4.5 V and 36 V. The
architecture of the AD680 enables the reference to be operated
at a very low quiescent current while still realizing excellent dc
characteristics and noise performance. Trimming of the high
stability thin-film resistors is performed for initial accuracy and
temperature coefficient, resulting in low errors over temperature.
The precision dc characteristics of the AD680 make it ideal for
use as a reference for DACs that require an external precision
reference. The device is also ideal for ADCs and, in general, can
offer better performance than the standard on-chip references.
Based upon its low quiescent current, which rivals that of many
incomplete 2-terminal references, the AD680 is recommended
for low power applications, such as hand-held, battery-operated
equipment.
A temperature output pin is provided on the 8-lead package
versions of the AD680. The temperature output pin provides an
output voltage that varies linearly with temperature and allows
the AD680 to be configured as a temperature transducer while
providing a stable 2.5 V output.
The AD680 is available in five grades. The AD680AN is specified for operation from −40°C to +85°C, while the AD680JN is
specified for 0°C to 70°C operation. Both the AD680AN and
AD680JN are available in 8-lead PDIP packages. The AD680AR
is specified for operation from −40°C to +85°C, while the
AD680JR is specified for 0°C to 70°C operation. Both are
available in 8-lead SOIC packages. The AD680JT is specified for
0°C to 70°C operation and is available in a 3-pin TO-92
package.
CONNECTION DIAGRAMS
TP* 1
+VIN 2
AD680
8
TP*
7
TP*
6 VOUT
TOP VIEW
(Not to Scale)
5 NC
GND 4
TEMP 3
NC = NO CONNECT
* TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
00813-003
Low quiescent current at 250 μA max
Laser trimmed to high accuracy
2.5 V ± 5 mV max (AN, AR grades)
Trimmed temperature coefficient
20 ppm/°C max (AN, AR grades)
Low noise at 8 μV p-p from 0.1 Hz to 10 Hz
250 nV/√Hz wideband
Temperature output pin (N, R packages)
Available in three package styles
8-lead PDIP, 8-lead SOIC, and 3-pin TO-92
Figure 1. 8-Lead PDIP and 8-Lead SOIC Pin Configuration
AD680
BOTTOM VIEW
(Not to Scale)
3
2
1
+VIN VOUT GND
00813-004
FEATURES
Figure 2. Connection Diagram TO-92
PRODUCT HIGHLIGHTS
1. High Accuracy.
The AD680 band gap reference operates on a very low
quiescent current which rivals that of many 2-terminal
references. This makes the complete, higher accuracy AD680
ideal for use in power-sensitive applications.
2. Low Errors.
Laser trimming of both initial accuracy and temperature coefficients results in low errors over temperature without the use
of external components. The AD680AN and AD680AR have
a maximum variation of 6.25 mV between −40°C and +85°C.
3. Low Noise.
The AD680 noise is low, typically 8 μV p-p from 0.1 Hz to
10 Hz. Spectral density is also low, typically 250 nV/√Hz.
4. Temperature Transducer.
The temperature output pin on the 8-lead package versions
enables the AD680 to be configured as a temperature
transducer.
5. Low Cost.
PDIP packaging provides machine insertability, while SOIC
packaging provides surface-mount capability. TO-92
packaging offers a cost-effective alternative to 2-terminal
references, offering a complete solution in the same package
in which 2-terminal references are usually found.
Rev. H
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2005 Analog Devices, Inc. All rights reserved.
AD680
TABLE OF CONTENTS
Specifications..................................................................................... 3
Load Regulation ............................................................................8
Absolute Maximum Ratings............................................................ 4
Temperature Performance............................................................8
Output Protection ........................................................................ 4
Temperature Output Pin ..............................................................9
ESD Caution.................................................................................. 4
Differential Temperature Transducer .........................................9
Pin Configuration and Connection Diagram............................... 5
Low Power, Low Voltage Reference for Data Converters ........9
Theory of Operation ........................................................................ 6
4.5 V Reference from a 5 V Supply .......................................... 10
Applying the AD680 .................................................................... 6
Voltage Regulator for Portable Equipment ............................. 10
Noise Performance ....................................................................... 6
Outline Dimensions ....................................................................... 11
Turn-on Time................................................................................ 7
Ordering Guide .......................................................................... 12
Dynamic Performance................................................................. 7
REVISION HISTORY
8/05—Rev. G to Rev. H
Changes to Ordering Guide ..........................................................11
12/04—Rev. F to Rev. G
Updated Format ................................................................. Universal
Changes to Ordering Guide ..........................................................11
5/04—Rev. E to Rev. F
Changes to ORDERING GUIDE ...................................................3
5/03—Rev. D to Rev. E
Changes to ORDERING GUIDE ...................................................3
Added ESD Caution ..........................................................................3
Changes to Figure 20.........................................................................7
Updated OUTLINE DIMENSIONS ...............................................8
7/01—Rev. C to Rev. D
Changes to SPECIFICATIONS........................................................2
Changes to ORDERING GUIDE ....................................................3
Table I added ......................................................................................6
Rev. H | Page 2 of 12
AD680
SPECIFICATIONS
TA = 25°C, VIN = 5 V, unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results
from these tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed.
Table 1.
Parameter
OUTPUT VOLTAGE
Output Voltage, VO
Initial Accuracy, VOERR
OUTPUT VOLTAGE DRIFT 1
0°C to 70°C
−40°C to +85°C
LINE REGULATION
4.5 V ≤ +VIN ≤ 15 V
(@ TMIN to TMAX)
15 V ≤ +VIN ≤ 36 V
(@ TMIN to TMAX)
LOAD REGULATION
0 < IOUT < 10 mA
(@ TMIN to TMAX)
QUIESCENT CURRENT
(@ TMIN to TMAX)
POWER DISSIPATION
OUTPUT NOISE
0.1 Hz to 10 Hz
Spectral Density, 100 Hz
CAPACITIVE LOAD
LONG-TERM STABILITY
SHORT-CIRCUIT CURRENT TO GROUND
TEMPERATURE PIN
Voltage Output @ 25°C
Temperature Sensitivity
Output Current
Output Resistance
TEMPERATURE RANGE
Specified Performance
Operating Performance 2
1
2
AD680AN/AD680AR
Min
Typ
Max
AD680JN/AD680JR
Min
Typ
Max
2.495
−5
−0.20
2.490
−10
−0.40
2.500
2.505
+5
+0.20
10
20
2.500
2.510
+10
+0.40
10
25
25
40
40
40
40
80
80
195
1
8
250
540
596
2
−5
100
100
250
280
1.25
80
80
195
10
8
250
1
50
2.510
+10
+0.40
V
mV
%
10
25
30
ppm/°C
ppm/°C
40
40
40
40
μV/V
μV/V
μV/V
μV/V
100
100
250
280
1.25
μV/mA
μV/mA
μA
μA
mW
10
μV p-p
nV/√Hz
nF
ppm/1,000 hr
mA
100
100
250
280
1.25
80
80
195
10
8
250
1
660
540
+5
−5
596
2
50
25
25
50
50
660
mV
mV/°C
μA
kΩ
+5
12
+85
+85
0
−40
70
+85
Unit
2.500
50
25
25
12
−40
−40
2.490
−10
−0.40
AD680JT
Typ
Max
40
40
40
40
50
25
25
Min
0
−40
70
+85
°C
°C
Maximum output voltage drift is guaranteed for all packages.
The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.
Rev. H | Page 3 of 12
AD680
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VIN to Ground
Power Dissipation (25°C)
Storage Temperature
Lead Temperature (Soldering, 10 sec)
Package Thermal Resistance θJA (All Packages)
Rating
36 V
500 mW
−65°C to +125°C
300°C
120°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
OUTPUT PROTECTION
Output safe for indefinite short to GND and momentary short
to −VIN.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. H | Page 4 of 12
AD680
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
TP* 1
8
TP*
AD680
7
TP*
TOP VIEW
(Not to Scale)
6
VOUT
5
NC
+VIN 2
TEMP 3
GND 4
00813-003
NC = NO CONNECT
* TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
Figure 3. 8-Lead PDIP and 8-Lead SOIC Pin Configuration
AD680
BOTTOM VIEW
(Not to Scale)
2
1
00813-004
3
+VIN VOUT GND
Figure 4. Connection Diagram
Table 3. Pin Function Descriptions
Pin No.
1, 7, 8
2
3
4
5
6
Mnemonic
TP
+VIN
TEMP
GND
NC
VOUT
Descriptions
Test Point. A factory test point. No connections are made to these pins.
Input Voltage.
Temperature Output.
Ground.
No Connect.
Output Voltage.
Rev. H | Page 5 of 12
AD680
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage operation. A typical precision band gap consists
of a reference core and buffer amplifier. Based on a new, patented band gap reference design (Figure 5), the AD680 merges
the amplifier and the core band gap function to produce a
compact, complete precision reference.
Central to the device is a high gain amplifier with an intentionally
large proportional to absolute temperature (PTAT) input offset.
This offset is controlled by the area ratio of the amplifier input
pair, Q1 and Q2, and is developed across Resistor R1. Transistor
Q12’s base emitter voltage has a complementary to absolute
temperature (CTAT) characteristic. Resistor R2 and the parallel
combination of Resistor R3 and Resistor R4 “multiply” the PTAT
voltage across the R1 resistor. Trimming the R3 and R4 resistors
to the proper ratio produces a temperature invariant of 2.5 V at
the output. The result is an accurate, stable output voltage
accomplished with a minimum number of components.
+VIN
Reference outputs are frequently required to handle fast
transients caused by input switching networks, commonly
found in ADCs and measurement instrumentation equipment.
Many of the dynamic problems associated with this situation
can be minimized with a few simple techniques. Using a series
resistor between the reference output and the load tends to
“decouple” the reference output from the transient source, or a
relatively large capacitor connected from the reference output to
ground can serve as a charge storage element to absorb and
deliver charge as required by the dynamic load. A 50 nF capacitor is recommended for the AD680 in this case; this is large
enough to store the required charge, but small enough not to
disrupt the stability of the reference.
The 8-lead PDIP and 8-lead SOIC packaged versions of the
AD680 also provide a temperature output pin. The voltage on
this pin is nominally 596 mV at 25°C. This pin provides an
output linearly proportional to temperature with a
characteristic of 2 mV/°C.
NOISE PERFORMANCE
Q9
The noise generated by the AD680 is typically less than 8 μV p-p
over the 0.1 Hz to 10 Hz band. Figure 6 shows the 0.1 Hz to 10 Hz
noise of a typical AD680. The noise measurement is made with a
band-pass filter made of a 1-pole high-pass filter, with a corner
frequency at 0.1 Hz, and a 2-pole low-pass filter, with a corner
frequency at 12.6 Hz, to create a filter with a 9.922 Hz bandwidth.
Q8
Q11
Q3
Q4
VOUT
Q5
Q1
1×
R1
Q2
R5
R3
8×
C1
R2
Q10
1s
Q12
100
90
Q6
Q7
TEMP
R4
R7
GND
00813-005
R6
5μV
Figure 5. Schematic Diagram
APPLYING THE AD680
The AD680 is simple to use in virtually all precision reference
applications. When power is applied to +VIN and the GND pin
is tied to ground, VOUT provides a 2.5 V output. The AD680
typically requires less than 250 μA of current when operating
from a supply of 4.5 V to 36 V.
To operate the AD680, the +VIN pin must be bypassed to the
GND pin with a 0.1 μF capacitor tied as close to the AD680 as
possible. Although the ground current for the AD680 is small,
typically 195 μA, a direct connection should be made between
the AD680 GND pin and the system ground plane.
10
00813-006
0%
Figure 6. 0.1 Hz to 10 Hz Noise
Noise in a 300 kHz bandwidth is approximately 800 μV p-p.
Figure 7 shows the broadband noise of a typical AD680.
Rev. H | Page 6 of 12
AD680
500μV
In some applications, a varying load may be both resistive and
capacitive in nature, or the load may be connected to the
AD680 by a long capacitive cable.
50μs
100
90
+VIN
500μV
0.1μF
AD680
VOUT
VOUT
10
VL
00813-007
0%
VOUT
0V
00813-009
249Ω
Figure 9. Transient Load Test Circuit
Figure 7. Broadband Noise at 300 kHz
TURN-ON TIME
2V
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. The turn-on settling time of the AD680 is about 20 μs
to within 0.025% of its final value, as shown in Figure 8.
VIN
1mV
5μs
VL
90
VOUT
10
10μs
0%
00813-010
5V
50mV
100
100
90
Figure 10. Large Scale Transient Response
VOUT
2V
10
5mV
5μs
100
VIN
90
00813-008
0%
Figure 8. Turn-On Settling Time
VOUT
10
0%
00813-011
The AD680 thermal settling characteristic benefits from its
compact design. Once initial turn-on is achieved, the output
linearly approaches its final value; the output is typically within
0.01% of its final value after 25 ms.
DYNAMIC PERFORMANCE
The output stage of the amplifier is designed to provide the
AD680 with static and dynamic load regulation superior to
less complete references. Figure 9 to Figure 11 display the characteristics of the AD680 output amplifier driving a 0 mA to
10 mA load. Longer settling times result if the reference is
forced to sink any transient current.
Rev. H | Page 7 of 12
Figure 11. Fine Scale Settling for Transient Load
AD680
+VIN
AD680
VOUT
CL
1000pF
VL
The AD680 is designed for reference applications where temperature performance is important. Extensive temperature
testing and characterization ensure that the device’s performance
is maintained over the specified temperature range.
VOUT
249Ω
VOUT
0V
00813-012
0.1μF
TEMPERATURE PERFORMANCE
Figure 12. Capacitive Load Transient Response Test Circuit
Figure 13 displays the output amplifier characteristics driving a
1,000 pF, 0 mA to 10 mA load.
2V
5mV
5μs
100
VL
90
Some confusion exists in the area of defining and specifying
reference voltage error over temperature. Historically, references
have been characterized using a maximum deviation per degree
centigrade, that is, ppm/°C. However, because of nonlinearities
in temperature characteristics that originated in standard Zener
references (such as “S” type characteristics), most manufacturers now use a maximum limit error band approach to specify
devices. This technique involves measuring the output at three
or more different temperatures to specify an output voltage
error band.
2.501
SLOPE = TC
VOLTS (V)
VOUT
=
VMAX – VMIN
(TMAX – TMIN) × 2.5V × 10–6
=
2.501 – 2.498
(85°C – (–40°C)) × 2.5V × 10–6
2.500
= 9.6ppm/°C
2.499
10
2.498
Figure 13. Output Response with Capacitive Load
–50
LOAD REGULATION
1mV
80
100
Figure 15 shows a typical output voltage drift for the AD680AN/
AD680AR and illustrates the test methodology. The box in
Figure 15 is bounded on the left and right sides by the operating temperature extremes, and on the top and bottom by the
maximum and minimum output voltages measured over the
operating temperature range.
100μs
100
VL
–10 0
20
40
60
TEMPERATURE (°C)
Figure 15. Typical AD680AN/AD680AR Temperature Drift
Figure 14 depicts the load regulation characteristics of
the AD680.
1V
–30
90
The maximum height of the box for the appropriate temperature
range and device grade is shown in Table 4. Duplication of these
results requires a combination of high accuracy and stable temperature control in a test system. Evaluation of the AD680 will
produce a curve similar to that in Figure 15, but output readings
could vary depending upon the test equipment used.
VOUT
10
00813-014
0%
Table 4. Maximum Output Change in mV
Figure 14. Typical Load Regulation Characteristics
Device Grade
AD680JN/AD680JR
AD680JT
AD680AN
Rev. H | Page 8 of 12
Maximum Output Change (mV)
0°C to 70°C
−40°C to +85°C
4.375
Not applicable
5.250
Not applicable
Not applicable
6.250
00813-015
00813-013
0%
AD680
TEMPERATURE OUTPUT PIN
The 8-lead package versions of the AD680 provide a temperature output pin on Pin 3 of each device. The output of Pin 3
(TEMP) is a voltage that varies linearly with temperature. VTEMP
at 25°C is 596 mV, and the temperature coefficient is 2 mV/°C.
Figure 16 shows the output of this pin over temperature.
The temperature pin has an output resistance of 12 kΩ and is
capable of sinking or sourcing currents of up to 5 μA without
disturbing the reference output. This enables the TEMP pin to
be buffered by many inexpensive operational amplifiers that
have bias currents below this value.
760
680
640
600
520
00813-016
440
–50 –40 –30 –20 –10
0 10 20 30 40
TEMPERATURE (°C)
50
60
70
80
The AD7701 is an ADC that is well-suited for the AD680.
Figure 18 shows the AD680 used as the reference for this
converter. The AD7701 is a 16-bit ADC with on-chip digital
filtering intended for the measurement of wide dynamic range
and low frequency signals, such as those representing chemical,
physical, or biological processes. It contains a charge balancing
(Σ–Δ) ADC, a calibration microcontroller with on-chip static
RAM, a clock oscillator, and a serial communications port.
This entire circuit runs on ±5 V supplies. The power dissipation
of the AD7701 is typically 25 mW and, when combined with
the power dissipation of the AD680 (1 mW), the entire circuit
consumes just 26 mW of power.
560
480
The AD680 has a number of features that make it ideally suited
for use with ADCs and DACs. The low supply voltage required
makes it possible to use the AD680 with today’s converters that
run on 5 V supplies without having to add a higher supply
voltage for the reference. The low quiescent current (195 μA),
combined with the completeness and accuracy of the AD680,
make it ideal for low power applications, such as hand-held,
battery-operated meters.
+5V
ANALOG
SUPPLY
90
0.1μF
10μF
AD7701
AVDD
Figure 16. TEMP Pin Transfer Characteristics
VIN
DIFFERENTIAL TEMPERATURE TRANSDUCER
Figure 17 shows a differential temperature transducer that can
be used to measure temperature changes in the environment of
the AD680. This circuit operates from a 5 V supply. The
temperature-dependent voltage from the TEMP pin of the
AD680 is amplified by a factor of 5 to provide wider full-scale
range and more current sourcing capability. An exact gain of 5
can be achieved by adjusting the trim potentiometer until the
output varies by 10 mV/°C. To minimize resistance changes
with temperature, use resistors with low temperature
coefficients, such as metal film resistors.
VOUT
0.1μF
DRDY
CS
SCLK
RANGE
SELECT
BP/UP
CALIBRATE
CAL
ANALOG
INPUT
AIN
ANALOG
GND
AGND
TEMP 3
AD680
3 +
6
ΔVOUT
= 10mV/°C
ΔT
SERIAL DATA
CLKOUT
SC1
0.1μF
DVSS
10μF
Figure 18. Low Power, Low Voltage Supply Reference
for the AD7701 16-Bit ADC
4
4
RF
6.98kΩ
1%
RBP
100Ω
00813-017
RB
1.69kΩ
1%
0.1μF
SERIAL CLOCK
CLKIN
DGND
–5V
ANALOG
SUPPLY
READ (TRANSMIT)
7
OP90
2 –
GND
SDATA
DATA READY
SC2
0.1μF
AVSS
5V
0.1μF
MODE
GND
VIN
0.1μF
SLEEP
VREF
AD680
5V
2
DVDD
Figure 17. Differential Temperature Transducer
Rev. H | Page 9 of 12
00813-018
TEMP PIN VOLTAGE (mV)
720
LOW POWER, LOW VOLTAGE REFERENCE FOR
DATA CONVERTERS
AD680
4.5 V REFERENCE FROM A 5 V SUPPLY
The AD680 can be used to provide a low power, 4.5 V reference,
as shown in Figure 19. In addition to the AD680, the circuit
uses a low power op amp and a transistor in a feedback configuration that provides a regulated 4.5 V output for a power
supply voltage as low as 4.7 V. The high quality tantalum 10 μF
capacitor (C1) in parallel with the ceramic 0.1 μF capacitor (C2)
and the 3.9 Ω resistor (R5) ensure a low output impedance up to
approximately 50 MHz (see Figure 19).
4.7V TO 15V
CC
3.3μF
2N2907A
VIN
VOUT
AD680
GND
–IN
7
3
V+
OUT
OP90
2
4
6
V–
CF
0.1μF
R4
3.57kΩ
+
C1
10μF
C2
0.1μF
CHARGER
INPUT
R5
3.9Ω
0.1μF
R3
510kΩ
2
R2
2.5kΩ
1%
R1
2kΩ
1%
00813-019
0.1μF
+IN
The AD680 is ideal for providing a stable, low cost, low power
reference voltage in portable equipment power supplies.
Figure 20 shows how the AD680 can be used in a voltage
regulator that not only has low output noise (as compared to a
switch mode design) and low power, but it also has a very fast
recovery after current surges. Some caution should be taken in
the selection of the output capacitors. Too high an ESR (effective
series resistance) could endanger the stability of the circuit. A solid
tantalum capacitor, 16 V or higher, and an aluminum electrolytic capacitor, 10 V or higher, are recommended for C1 and C2,
respectively. Also, the path from the ground side of C1 and C2
to the ground side of R1 should be kept as short as possible.
6V +
LEAD-ACID
BATTERY
Figure 19. 4.5 V Reference Running from a Single 5 V Supply
VIN
VOUT 6
AD680
TEMP 3
GND
2 –
7
OP777
3 +
6
IRF9530
4
4
R2
402kΩ 1%
R1
402kΩ 1%
+
C1
+
68μF
TANT
Figure 20. Voltage Regulator for Portable Equipment
Rev. H | Page 10 of 12
C2
1000μF
ELECT
00813-020
R3
1kΩ
VOLTAGE REGULATOR FOR PORTABLE
EQUIPMENT
AD680
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497) 1
0.25 (0.0098)
0.10 (0.0040)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
5
6.20 (0.2440)
4 5.80 (0.2284)
1.27 (0.0500)
BSC
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
0.50 (0.0196)
× 45°
0.25 (0.0099)
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
0.015 (0.38)
GAUGE
PLANE
SEATING
PLANE
0.005 (0.13)
MIN
0.430 (10.92)
MAX
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 22. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
0.050 (1.27)
MAX
0.019 (0.482)
SQ
0.016 (0.407)
0.165 (4.19)
0.125 (3.18)
0.055 (1.40)
0.045 (1.15)
3
2
0.105 (2.66)
0.095 (2.42)
0.135 (3.43)
MIN
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
Figure 21. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions show in millimeters and (inches)
0.205 (5.21)
0.175 (4.45)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015
(0.38)
MIN
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.210 (5.33)
0.170 (4.32)
0.060 (1.52)
MAX
0.210
(5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
1
0.115 (2.92)
0.080 (2.03)
0.500 (12.70) MIN
0.115 (2.92)
0.080 (2.03)
SEATING
PLANE
BOTTOM VIEW
COMPLIANT TO JEDEC STANDARDS TO-226AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 23. 3-Pin Plastic Header-Style Package [TO-92]
(T-3)
Dimensions shown in inches and (millimeters)
Rev. H | Page 11 of 12
AD680
ORDERING GUIDE
Model
AD680AR
AD680AR-REEL
AD680AR-REEL7
AD680ARZ 1
AD680ARZ-REEL71
AD680JR
AD680JR-REEL7
AD680JRZ1
AD680JRZ-REEL71
AD680AN
AD680ANZ1
AD680JN
AD680JNZ1
AD680JT
AD680JTZ1
1
Output
Voltage
VO (V)
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
Initial
Accuracy
(mV) (%)
5
0.20
5
0.20
5
0.20
5
0.20
5
0.20
10
0.40
10
0.40
10
0.40
10
0.40
5
0.20
5
0.20
10
0.40
10
0.40
10
0.40
10
0.40
Temperature
Coefficient
(ppm/°C)
20
20
20
20
20
25
25
25
25
20
20
25
25
30
30
Package
Description
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
PDIP
PDIP
TO-92
TO-92
Z = Pb-free part.
©2005 Analog Devices, Inc. All rights reserved. Trademarks
and registered trademarks are the property of their respective owners.
C00813–0–8/05(H)
Rev. H | Page 12 of 12
Package Option
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
N-8
N-8
N-8
N-8
T-3
T-3
Parts per
Reel
2,500
1,000
1,000
1,000
1,000
Temperature Range
(°C)
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
0 to 70
0 to 70
0 to 70
0 to 70
−40 to +85
−40 to +85
0 to 70
0 to 70
0 to 70
0 to 70