UMS CHR3694-QDG 37-40ghz integrated down converter Datasheet

CHR3694-QDG
RoHS COMPLIANT
37-40GHz Integrated Down converter
GaAs Monolithic Microwave IC in SMD package
Description
The CHR3694-QDG is a multifunction chip,
which integrates a balanced cold FET mixer, a
time two multiplier, and a RF LNA including
gain control.
It is designed for a wide range of applications,
typically commercial communication systems.
UMS
R3694
A3667A
A3688A
YYWW
YYWWG
The circuit is manufactured with a pHEMT
process, 0.25µm gate length, via holes through
the substrate and air bridges.
It is available in lead-free SMD package.
A mirror version versus RF & LO access is
available as CHR3794-QDG.
Conversion Gain (dB)
Conversion gain (Sup. Mode) @ IF=2GHz
Main Features
■ Broadband performance 37-40GHz
■ 12dB Gain
■ 15dBc Image Frequency Rejection
■ -5dBm IIP3
■ 4dB Gain control
■ DC power consumption: 4V, 150mA
■ 24L-QFN4x4
■ ESD protected
■ MSL Level 1
20
18
16
14
12
10
8
6
4
2
0
Gain @ 0V
36
37
38
Gain @ -2V
39
40
41
RF frequency (GHz)
Main Characteristics
Tamb = +25°C, VDL= VDX= 4V
Symbol
Parameter
Min
Typ
Max
Unit
FRF
RF frequency range
37
40
GHz
FLO
LO frequency range
17.5
21
GHz
FIF
IF frequency range
DC
3.5
GHz
G
Conversion gain @ VGC=-2V
Conversion gain @ VGC=0V
8
11
10
14
dB
dB
ESD Protections: Electrostatic discharge sensitive device observe handling precautions!
Ref. DSCHR3694-QDG1192 - 11 Jul 11
1/18
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Route Départementale 128 - BP46 - 91401 Orsay Cedex France
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
CHR3694-QDG
37-40GHz Down Converter
Electrical Characteristics
Tamb= +25°C, VDL= VDX= 4V, Typical VGX = -0.9V & VGM= -0.7V
Symbol
Parameter
Min
Typ
Max
Unit
FRF
RF frequency range
37
40
GHz
FLO
LO frequency range
17.5
21
GHz
FIF
IF frequency range
DC
3.5
GHz
G
Conversion gain @ VGC = -2V
Conversion gain @ VGC = 0V
8
11
10
14
dB
dB
1
dBm
15
dBc
PLO
LO Input power
IFR
Image Frequency Rejection (1)
NF
Noise Figure @ VGC = -2V, for IF>0.1GHz
Noise Figure @ VGC = 0V, for IF>0.1GHz
5
4.5
IIP3
Input IP3
-5
LO RL
Input LO Return Loss
-10
-8
dB
RF RL
Input RF Return Loss
-4
-3
dB
Gain control range
4
dB
VDL,VDX Drain bias voltage
4
V
Gc
VGC
Gain control voltage (2)
Idl + Idx
13
-2
Bias current @ VGC = -2V (3)
Bias current @ VGC = 0V (3)
100
110
140
150
6.5
6
dB
dB
dBm
0
V
180
190
mA
mA
(1) With external I/Q 90° hybrid coupler
(2) Idl=50mA@VGC=-2V, Idl= 60mA@VGC=0V
(3) Typically, Idl=60mA@VGC=0V, Idx=90mA
These values are representative of onboard measurements as defined on the drawing at
page 16 for CHR3694-QDG and page 17 for CHR3794-QDG.
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
2/18
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Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Absolute Maximum Ratings (1)
Tamb = +25°C
Symbol
Parameter
Values
Unit
VDL,VDX
Maximum drain bias voltage
4.5
V
Idl + Idx
Maximum drain bias current
200
mA
Gate bias voltage
-2.0 to +0
V
VGC
Control gain voltage
-3.0 to +4
V
P_RF
Maximum RF input power
10
dBm
P_LO
Maximum LO input power
10
dBm
Tch
Maximum channel temperature
175
°C
Ta
Operating temperature range
-40 to +85
°C
Storage temperature range
-55 to +125
°C
VGM,VGX
Tstg
(1) Operation of this device above anyone of these paramaters may cause permanent damage.
Ref.: DSCHR3694-QDG1192 - 11 Jul 11
3/18
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Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Device thermal performances
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode
considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below than the maximum value specified in the next table. So, the system PCB
must be designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature can not be
maintained below than the maximum temperature specified (see the curve Pdiss. Max) in
order to guarantee the nominal device life time (MTTF).
DEVICE THERMAL SPECIFICATION : CHR3694-QDG
Max. junction temperature (Tj max)
:
144
Max. continuous dissipated power @ Tcase=
85 °C :
0,6
(1)
=> Pdiss derating above Tcase =
85 °C :
10
Junction-Case thermal resistance (Rth J-C)(2)
:
<97
Min. package back side operating temperature(3)
:
-40
Max. package back side operating temperature(3)
:
85
Min. storage temperature
:
-55
Max. storage temperature
:
125
°C
W
mW/°C
°C/W
°C
°C
°C
°C
(1) Derating at junction temperature constant = Tj max.
(2) Rth J-C is calculated for a worst case where the hotter junction of the MMIC is considered.
(3) Tcase=Package back side temperature measured under the die-attach-pad (see the drawing below).
Tcase
0,7
0,6
0,4
0,3
0,2
Pdiss. Max. (W)
0,1
Pdiss. Max. (W)
0,5
Example of QFN 16L 3x3
back-side view, temperature
reference point (Tcase) location.
0
-50
-25
0
25
50
75
100
125
Tcase (°C)
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
4/18
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Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Typical Measured Performances
Tamb = +25°C, VDX=VDL = 4V, Typical VGX = -0.9V & VGM= -0.7V, P_LO=1dBm
These values are representative of onboard measurements (on connector access planes)
as defined on the drawing 97445 page 16 for CHR3694-QDG and drawing 97342 page 17
for CHR3794-QDG. The board loss is estimated to 2 to 3dB in the frequency range.
Conversion Gain @ Freq_IF= 2GHz, F_RF= 2xF_LO - F_IF, VGC=0V
versus temperature
Conversion Gain (dB)
20
18
16
14
12
10
8
6
4
2
0
Gc max @ -40°C
Gc max @ +25°C
Gc max @ +75°C
36
37
38
39
40
41
RF frequency (GHz)
Conversion Gain @ Freq_IF= 2GHz, F_RF= 2xF_LO - F_IF, VGC=-2V
versus temperature
Conversion Gain (dB)
20
18
16
14
12
10
8
6
4
2
0
Gc min @ -40°C
Gc min @ +25°C
Gc min @ +75°C
36
Ref.: DSCHR3694-QDG1192 - 11 Jul 11
37
38
39
RF frequency (GHz)
5/18
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40
41
Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Conversion Gain @ Freq_IF= 3.5GHz, F_RF= 2xF_LO + F_IF, VGC=0V
versus temperature
Conversion Gain (dB)
20
18
16
14
12
10
8
6
4
2
0
Gc max @ -40°C
Gc max @ +25°C
Gc max @ +75°C
36
37
38
39
40
41
RF frequency (GHz)
Conversion Gain @ Freq_IF= 3.5GHz, F_RF= 2xF_LO + F_IF, VGC=-2V
versus temperature
Conversion Gain (dB)
20
18
16
14
12
10
8
6
4
2
0
Gc min @ -40°C
Gc min @ +25°C
Gc min @ +75°C
36
37
38
39
40
41
RF frequency (GHz)
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
6/18
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Image rejection @ Freq_IF= 2GHz, VGC=0V
versus temperature
40
Image rejection (dB)
35
30
25
20
15
-40°C
+25°C
+75°C
10
5
0
17
17.5
18
18.5
19
LO frequency (GHz)
Noise figure @ Freq_IF= 3GHz, VGC=0V
versus temperature
8
7
Noise figure (dB)
6
5
4
3
NF @ -40°C
NF @ +25°C
NF @ +75°C
2
1
0
36
37
38
39
40
41
RF frequency (GHz)
Rem: The losses due to board are removed for noise measurements.
Ref.: DSCHR3694-QDG1192 - 11 Jul 11
7/18
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Noise figure @ Freq_IF= 3GHz
versus VGC at 25°C
8
7
Noise figure (dB)
6
5
4
3
NF @ 0V
2
NF @ -2V
1
0
36
37
38
39
40
41
RF frequency (GHz)
Rem: The losses due to board are removed for noise measurements.
Gain (dB)
Compression (Sup. mode) @ Freq_RF= 38GHz, Freq_IF= 2GHz
versus P_RF & temperature
20
18
16
14
12
10
8
6
4
2
0
P1dB 38GHz @ -40°C
P1dB 38GHz @ +25°C
P1dB 38GHz @ +75°C
-24 -22 -20 -18 -16 -14 -12 -10
-8
Input Power (dBm)
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
8/18
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Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Input IP3 @ Freq_RF= 37.5GHz & 39.5GHz, Freq_IF= 3.5GHz
versus VGC at 25°C
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
Input IP3 (dBm)
37.5GHz / VGC=0V
39.5GHz / VGC=0V
37.5GHz / VGC=-2V
39.5GHz / VGC=-2V
-30
-25
-20
-15
-10
Input power double carrier (dBm)
LO Return Loss (dB)
LO Return Loss versus frequency
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
14 15 16 17 18 19 20 21 22 23
Frequency (GHz)
Ref.: DSCHR3694-QDG1192 - 11 Jul 11
9/18
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
RF Return Loss versus frequency & VGC
RF Return Loss (dB)
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
VGC=0V
VGC=-2V
30 31 32 33 34 35 36 37 38 39 40
Frequency (GHz)
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
10/18
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Package outline CHR3694-QDG (1)
R3694
Matt
Free
tin,
Lead
(Green)
1-
Nc
13-
Gnd
Units
mm
2-
Gnd
14-
Gnd
From the standard
JEDEC MO-220
3-
Gnd
15-
RF
(VGGD)
4-
LO
16-
Gnd
5-
Gnd
17-
Gnd
6-
Gnd
18-
Nc
7-
Nc
19-
Nc
8-
VGX
20-
Nc
9-
VDX
21-
Q
10-
VGM
22-
Gnd
11-
VGC
23-
Gnd
12-
VDL
24-
I
25- GND
Ref.: DSCHR3694-QDG1192 - 11 Jul 11
11/18
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Package outline CHR3794-QDG (1)
R3794
Matt tin, Lead
Free
Units
From the standard
25-
(Green)
1-
Nc
13-
Gnd
mm
2-
Gnd
14-
Gnd
JEDEC MO-220
3-
Gnd
15-
LO
(VGGD)
4-
RF
16-
Gnd
GND
5-
Gnd
17-
Gnd
6-
Gnd
18-
Nc
7-
VDL
19-
I
8-
VGC
20-
Gnd
9-
VGM
21-
Gnd
10-
VDX
22-
Q
11-
VGX
23-
Nc
12-
Nc
24-
Nc
(1)
The package outline drawing included to this data-sheet is given for indication. Refer to the
application note AN0017 available at http://www.ums-gaas.com for exact package dimensions.
It is strongly recommended to ground all pins marked “Gnd” through the PCB board. Ensure that the
PCB board is designed to provide the best possible ground to the package.
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
12/18
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CHR3694-QDG
37-40GHz Down Converter
Definition of the Sij reference planes
The reference planes used for Sij
measurements
given
above
are
symmetrical from the symmetrical axis of
the package (see drawing beside). The
input and output reference planes are
located at 3.18mm offset (input wise and
output wise respectively) from this axis.
Then, the given Sij parameters incorporate
the land pattern of the evaluation
motherboard
recommended
at
the
page 16.
3.18
3.18
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
The SMD leadless package has been designed for high volume surface mount PCB
assembly process. The dimensions and footprint required for the PCB (motherboard) are
given in the drawings above.
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Ref.: DSCHR3694-QDG1192 - 11 Jul 11
13/18
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Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Notes
Due to ESD protection, LO and RF access are DC grounded, an external capacitance might
be requested to isolate the product from external voltage that could be present on the RF
access. ESD protections are also implemented on each gate access: VGX, VGM and VGC.
Refer to the application note AN0020 available at http://www.ums-gaas.com for general ESD
recommendations.
CHR3694-QDG
VD
VG
L
C
VGM VDX
VGX
RF
LO
Q
I
CHR3794-QDG
VDX VGM VG
VGX
C
VD
L
RF
LO
I
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
Q
14/18
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Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Notes
The biasing circuits of the stages of the circuit are given in the schemes below.
Vd=4V
1.9k
1.9k
1.9k
9
26
OUT
26
Stage 3
Stage 2
IN
Stage 1
Self-biased
100
Self-biased
Self-biased
Gain control 100
21
60
100
60
150
LNA
Vgc=-2V  0V
Vdx=4V
1.23k
8
42
1.23k
LO OUT
10
Stage Buffer 2
LO IN
Stage
2 times multiplier
Stage Buffer 1
Self-biased
Self-biased
57
200
38
LO
Vgx
1.2k
0.5
Vgm
0.5
Ref. : DSCHR3694-QDG – February 09
15/18
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Specifications subject to change without notice
CHR3694-QDG
37-40GHz Down Converter
Evaluation mother board







Compatible with the proposed footprint.
Based on typically Ro4003 / 8mils or equivalent.
Using a microstrip to coplanar transition to access the package.
Recommended for the implementation of this product on a module board.
Decoupling capacitors of 10nF 10% are recommended for all DC accesses.
Coupleur Anaren 2-4GHz
(See application note AN0017 for details).
Proposed Assembly board “97445” for CHR3694-QDG 24L-QFN4x4
products characterization
I
Q
Decoupling capacitor: 10nF
VGX
VGM
VDX
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
VDL
VGC
16/18
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CHR3694-QDG
37-40GHz Down Converter
Proposed Assembly board “97342” for CHR3794-QDG 24L-QFN4x4
products characterization
VDL
VGM
VGC
Ref. : DSCHR3694-QDG – February 09
VGX
VDX
17/18
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CHR3694-QDG
37-40GHz Down Converter
Ordering Information
QFN 4x4 RoHS compliant package
:
Stick: XY = 20
Tape & reel: XY = 21
CHR3694-QDG/XY
QFN 4x4 RoHS compliant package
:
Stick: XY = 20
Tape & reel: XY = 21
CHR3794-QDG/XY
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
Ref. : DSCHR3694-QDG1192 - 11 Jul 11
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Specifications subject to change without notice
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