LT6236/LT6237 Rail-to-Rail Output 215MHz, 1.1nV/√Hz Op Amp/SAR ADC Driver DESCRIPTION FEATURES n n n n n n n n n n n n Low Noise: 1.1nV/√Hz Low Supply Current: 3.5mA/Amp Max Low Offset Voltage: 350μV Max Fast Settling Time: 570ns to 18-Bit, 2VP-P Output Low Distortion: THD = –116.8dB at 2kHz Wide Supply Range: 3V to 12.6V Output Swings Rail-to-Rail 215MHz Gain-Bandwidth Product Specified Temperature Range: –40°C to 125°C LT6236 Shutdown to 10μA Max LT6236 in Low Profile (1mm) ThinSOT™ Package Dual LT6237 in 3mm × 3mm 8-Lead DFN and 8-Lead MSOP Packages APPLICATIONS n n n The LT®6236/LT6237 are single/dual low noise, rail-to-rail output op amps that feature 1.1nV/√Hz input referred noise voltage density and draw only 3.5mA of supply current per amplifier. These amplifiers combine very low noise and supply current with a 215MHz gain bandwidth product and a 70V/μs slew rate. Low noise, fast settling time and low offset voltage make this amplifier optimal to drive low noise, high speed SAR ADCs. The LT6236 includes a shutdown feature that can be used to reduce the supply current to less than 10μA. This amplifier family has an output that swings within 50mV of either supply rail to maximize the signal dynamic range in low supply applications and is specified on 3.3V, 5V and ±5V supplies. The LT6236/LT6237 are upgrades to the LT6230/LT6231, offering similar performance with reduced wideband noise beyond 100kHz. 16-Bit and 18-Bit SAR ADC Drivers Active Filters Low Noise, Low Power Signal Processing L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Differentially Driving a SAR ADC LT6237 Driving LTC2389-18 fIN = 2kHz, –1dBFS, 32768-Point FFT VS+= 6V + 1/2 LT6237 LOWPASS FILTERS 38.3Ω – 49.9Ω 270pF IN+ 270pF IN– 18-BIT LTC2389-18 38.3Ω – 2.5Msps 623637 TA01a 1/2 LT6237 IN– 49.9Ω + VS–= –2V AMPLITUDE (dBFS) IN+ 0 VOUT = 7.3VP-P –10 HD2 = –129.5dBc –20 HD3 = –118.7dBc –30 SFDR = 117.7dB –40 THD = –116.8dB –50 SNR = 99.7dB –60 SINAD = 98.9dB –70 –80 –90 –100 –110 –120 –130 –140 –150 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 FREQUENCY (MHz) 62367 TA01b 623637f 1 LT6236/LT6237 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V–) .............................. 12.6V Input Current (Note 2) ......................................... ±40mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4)... –40°C to125°C Specified Temperature Range (Note 5).....–40°C to125°C Maximum Junction Temperature .......................... 150°C Storage Temperature Range .................. –65°C to 150°C PIN CONFIGURATION TOP VIEW TOP VIEW OUT 1 V– 2 +IN 3 OUT A 1 8 V+ 6 V+ –IN A 2 7 OUT B 5 ENABLE +IN A 3 V– 4 4 –IN S6 PACKAGE 6-LEAD PLASTIC TSOT-23 TJMAX = 150°C, θJA = 192°C/W 9 6 –IN B 5 +IN B DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TOP VIEW OUT A –IN A +IN A V– 1 2 3 4 8 7 6 5 V+ OUT B –IN B +IN B MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 273°C/W TJMAX = 150°C, θJA = 43°C/W UNDERSIDE METAL CONNECTED TO V– (PCB CONNECTION OPTIONAL) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT6236CS6#PBF LT6236CS6#TRPBF LTGHM 6-Lead Plastic TSOT-23 0°C to 70°C LT6236IS6#PBF LT6236IS6#TRPBF LTGHM 6-Lead Plastic TSOT-23 –40°C to 85°C LT6236HS6#PBF LT6236HS6#TRPBF LTGHM 6-Lead Plastic TSOT-23 –40°C to 125°C LT6237CDD#PBF LT6237CDD#TRPBF LGHN 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LT6237IDD#PBF LT6237IDD#TRPBF LGHN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LT6237HDD#PBF LT6237HDD#TRPBF LGHN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT6237CMS8#PBF LT6237CMS8#TRPBF LTGHP 8-Lead Plastic MSOP 0°C to 70°C LT6237IMS8#PBF LT6237IMS8#TRPBF LTGHP 8-Lead Plastic MSOP –40°C to 85°C LT6237HMS8#PBF LT6237HMS8#TRPBF LTGHP 8-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 623637f 2 LT6236/LT6237 ELECTRICAL CHARACTERISTICS ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER VOS TA = 25°C, VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply, TYP MAX UNIT 100 50 75 500 350 450 μV μV μV 100 600 μV 5 10 μA IB Match (Channel-to-Channel) (Note 6) 0.1 0.9 μA Input Offset Current 0.1 0.6 μA Input Offset Voltage CONDITIONS MIN LT6236 LT6237MS8 LT6237DD8 Input Offset Voltage Match (Channel-to-Channel) (Note 6) IB IOS Input Bias Current Input Noise Voltage 0.1Hz to 10Hz 180 nVP-P en Input Noise Voltage Density f = 10kHz, VS = 5V 1.1 in Input Noise Current Density, Balanced Source Input Noise Current Density, Unbalanced Source f = 10kHz, VS = 5V, RS = 10k f = 10kHz, VS = 5V, RS = 10k 1 2.4 1.7 nV/√Hz pA/√Hz pA/√Hz RIN Input Resistance Common Mode Differential Mode 6.5 7.5 MΩ kΩ CIN Input Capacitance Common Mode Differential Mode 2.9 7.7 pF pF AVOL Large-Signal Gain VS = 5V, VO = 0.5V to 4.5V, RL = 10k to VS/2 VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 105 21 5.4 200 40 9 V/mV V/mV V/mV VS = 3.3V, VO = 0.65V to 2.65V, RL = 10k to VS/2 VS = 3.3V, VO = 0.65V to 2.65V, RL = 1k to VS/2 90 16.5 175 32 V/mV V/mV 1.5 1.15 VCM Input Voltage Range Guaranteed by CMRR, VS = 5V, 0V Guaranteed by CMRR, VS = 3.3V, 0V CMRR Common Mode Rejection Ratio VS = 5V, VCM = 1.5V to 4V VS = 3.3V, VCM = 1.15V to 2.65V 90 90 115 115 dB dB Power Supply Rejection Ratio VS = 3V to 10V 90 115 dB PSRR Minimum Supply Voltage (Note 7) 4 2.65 3 V V V VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA VS = 5V, ISINK = 20mA VS = 3.3V, ISINK = 15mA 4 85 240 185 40 190 460 350 mV mV mV mV VOH Output Voltage Swing High (Note 8) No Load ISOURCE = 5mA VS = 5V, ISOURCE = 20mA VS = 3.3V, ISOURCE = 15mA 5 90 325 250 50 200 600 400 mV mV mV mV ISC Short-Circuit Current VS = 5V VS = 3.3V IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = V+ – 0.35V 3.15 0.2 3.5 10 mA μA IENABLE ENABLE Pin Current ENABLE = 0.3V –25 –75 μA ±30 ±25 ±45 ±40 mA mA 623637f 3 LT6236/LT6237 ELECTRICAL CHARACTERISTICS ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER VL ENABLE Pin Input Voltage Low VH ENABLE Pin Input Voltage High TA = 25°C, VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply, CONDITIONS MIN TYP MAX UNIT 0.3 V 10 μA V+ – 0.35V V Output Leakage Current ENABLE = V+ – 0.35V, VO = 1.5V to 3.5V 0.2 tON Turn-On Time ENABLE = 5V to 0V, RL = 1k, VS = 5V 800 ns tOFF Turn-Off Time ENABLE = 0V to 5V, RL = 1k, VS = 5V 41 μs GBW Gain-Bandwidth Product Frequency = 1MHz, VS = 5V 200 MHz f–3db –3dB Bandwidth VS = 5V, RL = 100Ω 90 MHz SR Slew Rate VS = 5V, A V = –1, RL = 1k, VO = 1.5V to 3.5V 42 60 V/μs FPBW Full-Power Bandwidth VS = 5V, VOUT = 3VP-P (Note 9) 4.4 6.3 MHz tS Settling Time 0.1%, VS = 5V, VSTEP = 2V, AV = 1 0.01% 0.0015% (16-Bit) 4ppm (18-Bit) 50 60 240 570 ns ns ns ns 623637f 4 LT6236/LT6237 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the 0°C < TA < 70°C temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply, ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage LT6236 LT6237MS8 LT6237DD8 Input Offset Voltage Match (Channel-to-Channel) (Note 6) MAX UNIT l l l 600 450 550 μV μV μV l 800 μV 2.0 1.4 2.2 μV/°C μV/°C μV/°C l l l TYP VOS TC Input Offset Voltage Drift (Note 10) IB Input Bias Current l 11 μA IB Match (Channel-to-Channel) (Note 6) l 1 μA IOS Input Offset Current l AVOL Large-Signal Gain VCM Input Voltage Range LT6236 LT6237MS8 LT6237DD8 MIN 0.5 0.3 0.4 0.7 μA VS = 5V, VO = 0.5V to 4.5V, RL = 10k to VS/2 VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 l l l 78 17 4.1 V/mV V/mV V/mV VS = 3.3V, VO = 0.65V to 2.65V, RL = 10k to VS/2 VS = 3.3V, VO = 0.65V to 2.65V, RL = 1k to VS/2 l l 66 13 V/mV V/mV Guaranteed by CMRR VS = 5V, 0V Vs = 3.3V, 0V l l 1.5 1.15 4 2.65 V V CMRR Common Mode Rejection Ratio VS = 5V, VCM = 1.5V to 4V VS = 3.3V, VCM = 1.15V to 2.65V l l 90 85 dB dB PSRR Power Supply Rejection Ratio VS = 3V to 10V l 85 dB l 3 V Minimum Supply Voltage (Note 7) VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA VS = 5V, ISINK = 20mA VS = 3.3V, ISINK = 15mA l l l l 50 200 500 380 mV mV mV mV VOH Output Voltage Swing High (Note 8) No Load ISOURCE = 5mA VS = 5V, ISOURCE = 20mA VS = 3.3V, ISOURCE = 15mA l l l l 60 215 650 430 mV mV mV mV ISC Short-Circuit Current VS = 5V VS = 3.3V l l IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = V+ – 0.25V l l IENABLE ENABLE Pin Current ENABLE = 0.3V VL ±25 ±20 mA mA 4.2 mA μA l –85 μA ENABLE Pin Input Voltage Low l 0.3 V VH ENABLE Pin Input Voltage High l V+ – 0.25V SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 1.5V to 3.5V l 35 V/μs FPBW Full-Power Bandwidth (Note 9) VS = 5V, VOUT = 3VP-P l 3.7 MHz 1 V 623637f 5 LT6236/LT6237 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 85°C temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply, ENABLE = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage LT6236 LT6237MS8 LT6237DD8 Input Offset Voltage Match (Channel-to-Channel) (Note 6) VOS TC Input Offset Voltage Drift (Note 10) IB Input Bias Current LT6236 LT6237MS8 LT6237DD8 MIN MAX UNITS l l l 700 550 650 μV μV μV l 1000 μV l l l 2.0 1.4 2.2 μV/°C μV/°C μV/°C l 12 μA 1.1 μA 0.8 μA IB Match (Channel-to-Channel) (Note 6) l IOS Input Offset Current l AVOL Large-Signal Gain VCM Input Voltage Range TYP 0.5 0.3 0.4 l l l 72 16 3.6 V/mV V/mV V/mV VS = 3.3V, VO = 0.65V to 2.65V, RL = 10k to VS/2 l VS = 3.3V, VO = 0.65V to 2.65V, RL = 1k to VS/2 l 60 12 V/mV V/mV VS = 5V, VO = 0.5V to 4.5V, RL = 10k to VS/2 VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 Guaranteed by CMRR VS = 5V, 0V VS = 3.3V, 0V l l 1.5 1.15 4 2.65 V V CMRR Common Mode Rejection Ratio VS = 5V, VCM = 1.5V to 4V VS = 3.3V, VCM = 1.15V to 2.65V l l 90 85 dB dB PSRR Power Supply Rejection Ratio VS = 3V to 10V l 85 dB Minimum Supply Voltage (Note 7) l 3 V VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA VS = 5V, ISINK = 20mA VS = 3.3V, ISINK = 15mA l l l l 60 210 510 390 mV mV mV mV VOH Output Voltage Swing High (Note 6) No Load ISOURCE = 5mA VS = 5V, ISOURCE = 20mA VS = 3.3V, ISOURCE = 15mA l l l l 70 220 675 440 mV mV mV mV ISC Short-Circuit Current VS = 5V VS = 3.3V l l IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = V+ – 0.2V l l IENABLE ENABLE Pin Current ENABLE = 0.3V VL VH SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 1.5V to 3.5V l 31 V/μs FPBW Full-Power Bandwidth (Note 9) VS = 5V, VOUT = 3VP-P l 3.3 MHz ±15 ±15 mA mA 4.4 mA μA l –100 μA ENABLE Pin Input Voltage Low l 0.3 ENABLE Pin Input Voltage High l V+ – 0.2V 1 V V 623637f 6 LT6236/LT6237 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 125°C temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = VOUT = half supply, ENABLE = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage LT6236 LT6237MS8 LT6237DD8 Input Offset Voltage Match (Channel-to-Channel) (Note 6) VOS TC Input Offset Voltage Drift (Note 10) IB Input Bias Current LT6236 LT6237MS8 LT6237DD8 MIN MAX UNITS l l l 750 650 700 μV μV μV l 1000 μV l l l 2.0 1.4 2.2 μV/°C μV/°C μV/°C l 12 μA 1.1 μA 1.2 μA IB Match (Channel-to-Channel) (Note 6) l IOS Input Offset Current l AVOL Large-Signal Gain VCM Input Voltage Range TYP 0.5 0.3 0.4 l l l 62 14 3 V/mV V/mV V/mV VS = 3.3V, VO = 0.65V to 2.65V, RL = 10k to VS/2 l VS = 3.3V, VO = 0.65V to 2.65V, RL = 1k to VS/2 l 52 11 V/mV V/mV VS = 5V, VO = 0.5V to 4.5V, RL = 10k to VS/2 VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 Guaranteed by CMRR VS = 5V, 0V VS = 3.3V, 0V l l 1.5 1.15 4 2.65 V V CMRR Common Mode Rejection Ratio VS = 5V, VCM = 1.5V to 4V VS = 3.3V, VCM = 1.15V to 2.65V l l 90 85 dB dB PSRR Power Supply Rejection Ratio VS = 3V to 10V l 85 dB Minimum Supply Voltage (Note 7) l 3 V VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA VS = 5V, ISINK = 20mA VS = 3.3V, ISINK = 15mA l l l l 60 225 550 425 mV mV mV mV VOH Output Voltage Swing High (Note 8) No Load ISOURCE = 5mA VS = 5V, ISOURCE = 20mA VS = 3.3V, ISOURCE = 15mA l l l l 80 240 700 470 mV mV mV mV ISC Short-Circuit Current VS = 5V VS = 3.3V l l IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = V+ – 0.15V l l IENABLE ENABLE Pin Current ENABLE = 0.3V VL VH SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 1.5V to 3.5V l 31 V/μs FPBW Full-Power Bandwidth (Note 9) VS = 5V, VOUT = 3VP-P l 3.3 MHz ±15 ±15 mA mA 5 mA μA l –100 μA ENABLE Pin Input Voltage Low l 0.3 ENABLE Pin Input Voltage High l V+ – 0.15V 2 V V 623637f 7 LT6236/LT6237 ELECTRICAL CHARACTERISTICS TA = 25°C, VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage LT6236 LT6237MS8 LT6237DD8 MIN Input Offset Voltage Match (Channel-to-Channel) (Note 6) IB Input Bias Current TYP MAX UNITS 100 50 75 500 350 450 μV μV μV 100 600 μV 5 10 μA IB Match (Channel-to-Channel) (Note 6) 0.1 0.9 μA IOS Input Offset Current 0.1 0.6 μA Input Noise Voltage 0.1Hz to 10Hz 180 en Input Noise Voltage Density f = 10kHz 1.1 1.7 nV/√Hz in Input Noise Current Density, Balanced Source f = 10kHz, RS = 10k Input Noise Current Density, Unbalanced source f = 10kHz, RS = 10k 1 2.4 pA/√Hz pA/√Hz RIN Input Resistance Common Mode Differential Mode 6.5 7.5 MΩ kΩ CIN Input Capacitance Common Mode Differential Mode 2.4 6.5 pF pF AVOL Large-Signal Gain VO = ±4.5V, RL = 10k VO = ±4.5V, RL = 1k VO = ±2V, RL = 100Ω 260 65 16 V/mV V/mV V/mV 140 35 8.5 nVP-P VCM Input Voltage Range Guaranteed by CMRR –3 CMRR Common Mode Rejection Ratio VCM = –3V to 4V 95 120 dB PSRR Power Supply Rejection Ratio VS = ±1.5V to ±5V 90 115 dB VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA ISINK = 20mA 4 85 240 40 190 460 mV mV mV VOH Output Voltage Swing High (Note 8) No Load ISOURCE = 5mA ISOURCE = 20mA 5 90 325 50 200 600 mV mV mV ISC Short-Circuit Current IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = 4.65V 3.3 0.2 3.9 mA μA IENABLE ENABLE Pin Current ENABLE = 0.3V –35 –85 μA VL ENABLE Pin Input Voltage Low 0.3 V VH ENABLE Pin Input Voltage High 10 μA tON 4 ±30 mA 4.65 V Output Leakage Current ENABLE = V+ –0.35V, VO = ±1V 0.2 Turn-On Time ENABLE = 5V to 0V, RL = 1k 800 tOFF Turn-Off Time ENABLE = 0V to 5V, RL = 1k GBW Gain-Bandwidth Product Frequency = 1MHz SR Slew Rate AV = –1, RL = 1k, VO = –2V to 2V FPBW Full-Power Bandwidth VOUT = 3VP-P (Note 9) tS Settling Time 0.1%, VSTEP = 4V, AV = 1, 0.01% 0.0015% (16-Bit) 4ppm (18-Bit) V ns 62 μs 215 MHz 50 70 V/μs 5.3 7.4 MHz 150 60 80 470 1200 ns ns ns ns 623637f 8 LT6236/LT6237 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the 0°C < TA < 70°C temperature range. VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage LT6236 LT6237MS8 LT6237DD8 Input Offset Voltage Match (Channel-to-Channel) (Note 6) LT6236 LT6237MS8 LT6237DD8 MIN MAX UNITS l l l 600 450 550 μV μV μV l 800 μV 2.2 1.8 2.2 μV/°C μV/°C μV/°C 11 μA l l l VOS TC Input Offset Voltage Drift (Note 10) IB Input Bias Current l TYP 0.7 0.5 0.4 IB Match (Channel-to-Channel) (Note 6) l 1 μA IOS Input Offset Current l 0.7 μA AVOL Large-Signal Gain VO = ±4.5V, RL = 10k VO = ±4.5V, RL = 1k VO = ±2V, RL = 100Ω l l l 100 27 6 VCM Input Voltage Range Guaranteed by CMRR l –3 CMRR Common Mode Rejection Ratio VCM = –3V to 4V l 95 dB PSRR Power Supply Rejection Ratio VS = ±1.5V to ±5V l 85 dB 50 200 500 mV mV mV 60 215 650 mV mV mV 4.6 mA μA VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA ISINK = 20mA l l l VOH Output Voltage Swing High (Note 8) No Load ISOURCE = 5mA ISOURCE = 20mA l l l V/mV V/mV V/mV 4 V ISC Short-Circuit Current l IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = 4.75V l l IENABLE ENABLE Pin Current ENABLE = 0.3V l –95 μA VL ENABLE Pin Input Voltage Low l 0.3 V ±25 mA 1 VH ENABLE Pin Input Voltage High l 4.75 SR Slew Rate AV = –1, RL = 1k, VO = –2V to 2V l 44 V/μs FPBW Full-Power Bandwidth VOUT = 3VP-P (Note 9) l 4.66 MHz V 623637f 9 LT6236/LT6237 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 85°C temperature range. VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage LT6236 LT6237MS8 LT6237DD8 Input Offset Voltage Match (Channel-to-Channel) (Note 6) VOS TC Input Offset Voltage Drift (Note 10) IB Input Bias Current LT6236 LT6237MS8 LT6237DD8 MIN MAX UNITS l l l 700 550 650 μV μV μV l 1000 μV l l l TYP 0.7 0.5 0.4 2.2 1.8 2.2 μV/°C μV/°C μV/°C l 12 μA IB Match (Channel-to-Channel) (Note 6) l 1.1 μA IOS Input Offset Current l 0.8 μA AVOL Large-Signal Gain VO = ±4.5V, RL = 10k VO = ±4.5V, RL = 1k VO = ±2V, RL = 100Ω l l l 93 25 4.8 VCM Input Voltage Range Guaranteed by CMRR l –3 CMRR Common Mode Rejection Ratio VCM = –3V to 4V l 95 dB PSRR Power Supply Rejection Ratio VS = ±1.5V to ±5V l 85 dB 60 210 510 mV mV mV 70 220 675 mV mV mV VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA ISINK = 20mA l l l VOH Output Voltage Swing High (Note 8) No Load ISOURCE = 5mA ISOURCE = 20mA l l l ISC Short-Circuit Current l IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = 4.8V l l IENABLE ENABLE Pin Current ENABLE = 0.3V VL ENABLE Pin Input Voltage Low V/mV V/mV V/mV 4 ±15 V mA 4.85 mA μA l –110 μA l 0.3 V 1 VH ENABLE Pin Input Voltage High l 4.8 V SR Slew Rate AV = –1, RL = 1k, VO = –2V to 2V l 37 V/μs FPBW Full-Power Bandwidth VOUT = 3VP-P (Note 9) l 3.9 MHz 623637f 10 LT6236/LT6237 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 125°C temperature range. VS = ±5V, VCM = VOUT = 0V, ENABLE = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage LT6236 LT6237MS8 LT6237DD8 MIN Input Offset Voltage Match (Channel-to-Channel) (Note 6) VOSTC Input Offset Voltage Drift (Note 10) IB Input Bias Current MAX UNITS l l l 750 650 700 μV μV μV l 1000 μV l l l LT6236 LT6237MS8 LT6237DD8 TYP 0.7 0.5 0.4 2.2 1.8 2.2 μV/°C μV/°C μV/°C l 12 μA IB Match (Channel-to-Channel) (Note 6) l 1.1 μA IOS Input Offset Current l 1.2 μA AVOL Large-Signal Gain VO = ±4.5V, RL = 10k VO = ±4.5V, RL = 1k VO = ±2V, RL = 100Ω l l l 76 21 4.1 VCM Input Voltage Range Guaranteed by CMRR l –3 CMRR Common Mode Rejection Ratio VCM = –3V to 4V l 95 dB PSRR Power Supply Rejection Ratio VS = ±1.5V to ±5V l 85 dB 70 230 550 mV mV mV 78 240 710 mV mV mV 5.5 mA μA VOL Output Voltage Swing Low (Note 8) No Load ISINK = 5mA ISINK = 20mA l l l VOH Output Voltage Swing High (Note 8) No Load ISOURCE = 5mA ISOURCE = 20mA l l l V/mV V/mV V/mV 4 V ISC Short-Circuit Current l IS Supply Current per Amplifier Disabled Supply Current per Amplifier ENABLE = 4.85V l l IENABLE ENABLE Pin Current ENABLE = 0.3V l –110 μA VL ENABLE Pin Input Voltage Low l 0.3 V ±15 mA 10 VH ENABLE Pin Input Voltage High l 4.85 SR Slew Rate AV = –1, RL = 1k, VO = –2V to 2V l 37 V/μs FPBW Full-Power Bandwidth VOUT = 3VP-P (Note 9) l 3.9 MHz Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. Inputs are protected by back-to-back diodes. If the differential input voltage exceeds 0.7V, the input current must be limited to less than 40mA. Note 3. A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 4. The LT6236C/LT6236I/LT6236H and the LT6237C/LT6237I/LT6237H are guaranteed functional over the temperature range of –40°C and 125°C. Note 5. The LT6236C/LT6237C are guaranteed to meet specified performance from 0°C to 70°C. The LT6236I/LT6237I are guaranteed to meet specified performance from –40°C to 85°C. The LT6236H/LT6237H are guaranteed to meet specified performance from –40°C to 125°C. The V LT6236C/LT6237C are designed, characterized and expected to meet specified performance from –40°C to 85°C, but are not tested or QA sampled at these temperatures. Note 6. Matching parameters are the difference between the two amplifiers of the LT6237. Note 7. Minimum supply voltage is guaranteed by power supply rejection ratio test. Note 8. Output voltage swings are measured between the output and power supply rails. Note 9. Full-power bandwidth is calculated from the slew rate: FPBW = SR/2πVP Note 10. This parameter is not 100% tested. 623637f 11 LT6236/LT6237 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage (Per Amplifier) VOS Distribution 6 200 VS = ±2.5V 180 VCM = 0V MS8 160 2.0 120 100 80 60 40 4 TA = 125°C 3 TA = 25°C 2 TA = –55°C OFFSET VOLTAGE (mV) 140 1 0 0 2 4 8 10 12 6 TOTAL SUPPLY VOLTAGE (V) Input Bias Current vs Common Mode Voltage 10 TA = –55°C TA = 125°C TA = 25°C 2 8 0 4 5 3 2 COMMON MODE VOLTAGE (V) 1 7 VCM = 4V 6 VCM = 1.5V 5 3 –50 –25 6 0 50 75 25 TEMPERATURE (°C) Output Saturation Voltage vs Load Current (Output High) 125 1.0 VS = 5V, 0V TA = 125°C TA = –55°C TA = 25°C 0.01 0.01 100 62367 G07 10 0.1 1 LOAD CURRENT (mA) –0.4 100 62367 GO6 62367 GO9 0 –0.2 –1.0 0.1 1 10 LOAD CURRENT (mA) 0.001 62367 G08 0.2 –0.8 0.001 TA = 25°C 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 TOTAL SUPPLY VOLTAGE (V) 0.4 –0.6 0.01 0.01 70 60 SINKING TA = 125°C 50 40 TA = 25°C 30 20 TA = –55°C 10 0 –10 SOURCING TA = 125°C –20 TA = –55°C –30 –40 –50 TA = 25°C –60 –70 2 2.5 3.5 4 4.5 5 3 1.5 POWER SUPPLY VOLTAGE (±V) VCM = VS/2 0.6 0.1 TA = –55°C Output Short-Circuit Current vs Power Supply Voltage 0.8 1 TA = 125°C 0.1 Minimum Supply Voltage OFFSET VOLTAGE (mV) OUTPUT SATURATION VOLTAGE (V) 100 VS = 5V, 0V 62367 GO5 62367 GO4 10 TA = 125°C 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 INPUT COMMON MODE VOLTAGE (V) 1 OUTPUT SHORT-CIRCUIT CURRENT (mA) –1 TA = 25°C Output Saturation Voltage vs Load Current (Output Low) 10 4 0 –2 TA = –55°C –1.0 62367 GO3 VS = 5V, 0V 9 INPUT BIAS CURRENT (μA) INPUT BIAS CURRENT (μA) 12 4 –0.5 –2.0 14 OUTPUT SATURATION VOLTAGE (V) 10 6 0 Input Bias Current vs Temperature VS = 5V, 0V 8 0.5 62367 GO2 62367 GO1 14 1.0 –1.5 20 0 –225 –175 –125 –75 –25 25 75 125 175 225 INPUT OFFSET VOLTAGE (μV) VS = 5V, 0V 1.5 5 SUPPLY CURRENT (mA) NUMBER OF UNITS Offset Voltage vs Input Common Mode Voltage TA = –55°C TA = 125°C TA = 25°C 623637f 12 LT6236/LT6237 TYPICAL PERFORMANCE CHARACTERISTICS Open-Loop Gain 2.5 Open-Loop Gain 2.5 VS = 3V, 0V TA = 25°C 2.0 VS = 5V, 0V TA = 25°C 2.0 1.5 0.5 RL = 1k 0 RL = 100Ω –0.5 –1.0 1.0 0.5 RL = 1k 0 RL = 100Ω –0.5 –1.0 1.0 0.5 –0.5 –1.5 –1.5 –2.0 –2.0 –2.5 –2.5 1 1.5 2 OUTPUT VOLTAGE (V) 2.5 3 30 CHANGE IN OFFSET VOLTAGE (μV) 1.5 TA = –55°C 0.5 0 TA = 25°C –0.5 TA = 125°C –1.0 –1.5 100 TA = 25°C VS = ±5V 24 22 VS = ±2.5V 20 VS = ±1.5V 18 16 10 1 0 20 AMPLIFIER NOISE VOLTAGE 8 5 5 4 4 3 3 NOISE CURRENT 2 2 NOISE VOLTAGE 1 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) 0 10M 100M 62367 G16 100k 62367 G15 Gain Bandwidth and Phase Margin vs Temperature CL = 5pF RL = 1k VCM = VS/2 VS = ±2.5V 100nV –100nV 70 PHASE MARGIN 60 VS = ±5V 50 VS = 3V, 0V 240 40 VS = ±5V 220 200 VS = 3V, 0V 180 GAIN BANDWIDTH PHASE MARGIN (DEG) 6 6 100 1k 10k SOURCE RESISTANCE (Ω) 10 GAIN BANDWIDTH (MHz) 7 100nV/DIV VS = ±2.5V TA = 25°C VCM = 0V 0.1 40 60 80 100 120 140 160 TIME AFTER POWER-UP (s) 0.1Hz to 10Hz Input Voltage Noise UNBALANCED NOISE CURRENT (pA/√Hz) INPUT VOLTAGE NOISE DENSITY (nV/√Hz) RESISTOR NOISE 62367 G14 Noise Voltage and Unbalanced Noise Current vs Frequency 0 TOTAL NOISE 14 62367 G13 7 VS = ±2.5V VCM = 0V f = 100kHz UNBALANCED SOURCE 10 RESISTORS 12 –2.0 –75 –60 –45 –30 –15 0 15 30 45 60 75 OUTPUT CURRENT (mA) 8 5 Total Noise vs Total Source Resistance 28 26 4 62367 G12 Warm-Up Drift vs Time VS = ±5V 1.0 –5 –4 –3 –2 –1 0 1 2 3 OUTPUT VOLTAGE (V) 62367 G11 Offset Voltage vs Output Current 2.0 –2.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 OUTPUT VOLTAGE (V) TOTAL NOISE (nV/√Hz) 0.5 RL = 100Ω –1.0 –2.0 0 RL = 1k 0 –1.5 62367 G10 OFFSET VOLTAGE (mV) INPUT VOLTAGE (mV) INPUT VOLTAGE (mV) 1.0 VS = ±5V TA = 25°C 2.0 1.5 1.5 INPUT VOLTAGE (mV) Open-Loop Gain 2.5 160 140 –55 5s/DIV 62367 G17 –25 65 35 5 TEMPERATURE (°C) 95 125 62367 G18 623637f 13 LT6236/LT6237 TYPICAL PERFORMANCE CHARACTERISTICS Gain Bandwidth and Phase Margin vs Supply Voltage 120 70 PHASE 60 CL = 5pF RL = 1k 100 VCM = VS/2 80 30 20 20 0 VS = ±5V 10 –20 GAIN 0 –40 VS = 3V, 0V –10 –20 100k 1M 10M 100M FREQUENCY (Hz) 1G 40 240 220 200 GAIN BANDWIDTH 180 160 –80 140 2 0 10 12 8 6 TOTAL SUPPLY VOLTAGE (V) 4 AV = 1 0.1 80 60 40 20 VS = 5V, 0V VCM = VS/2 0 10k 100M 100k NEGATIVE SUPPLY 40 1M 10M FREQUENCY (Hz) 100M 1G –90 –100 –110 –120 –140 100k 100M 62367 G25 1M 10M FREQUENCY (Hz) 62367 G24 50 40 40 VS = 5V, 0V 45 AV = 2 35 RS = 10Ω 30 25 RS = 20Ω 20 15 100M Series Output Resistance and Overshoot vs Capacitive Load RS = 50Ω RL = 50Ω RS = 10Ω 35 30 RS = 20Ω 25 20 15 RS = 50Ω RL = 50Ω 10 5 0 10M –80 –130 5 0 1M 100k FREQUENCY (Hz) –70 50 10 20 10k AV = 1 –50 TA = 25°C VS = ±5V –60 VS = 5V, 0V 45 AV = 1 OVERSHOOT (%) POWER SUPPLY REJECTION RATIO (dB) 60 1k 62367 G21 Series Output Resistance and Overshoot vs Capacitive Load POSITIVE SUPPLY 5 25 45 65 85 105 125 TEMPERATURE (°C) 62367 G23 VS = 5V, 0V TA = 25°C VCM = VS/2 80 VS = ±2.5V RISING Channel Separation vs Frequency 100 Power Supply Rejection Ratio vs Frequency 100 VS = ±2.5V FALLING 50 –40 62367 G22 120 60 20 –55 –35 –15 14 CHANNEL SEPARATION (dB) AV = 2 1M 10M FREQUENCY (Hz) 70 62367 G20 COMMON MODE REJECTION RATIO (dB) OUTPUT IMPEDANCE (Ω) AV = 10 1 80 VS = ±5V RISING 30 120 100 VS = ±5V FALLING 90 Common Mode Rejection Ratio vs Frequency VS = 5V, 0V 0.01 100k 100 40 –60 Output Impedance vs Frequency 10 50 PHASE MARGIN 62367 G19 1k AV = –1 110 RF = RG = 1k 60 OVERSHOOT (%) GAIN (dB) 40 PHASE (dB) VS = ±5V VS = 3V, 0V 40 60 120 PHASE MARGIN (DEG) 50 Slew Rate vs Temperature 70 TA = 25°C CL = 5pF RL = 1k GAIN BANDWIDTH (MHz) 80 SLEW RATE (V/μs) Open-Loop Gain vs Frequency 0 10 100 CAPACITIVE LOAD (pF) 1000 62367 G26 10 100 CAPACITIVE LOAD (pF) 1000 62367 G27 623637f 14 LT6236/LT6237 TYPICAL PERFORMANCE CHARACTERISTICS 18-Bit Settling Time to 4VP-P Output Step 1.5 15 1.0 0 0.5 –15 VOUT 0.0 –30 OUTPUT VOLTAGE (V) 30 SETTLING RESIDUE 1 DIV = 18-BIT ERROR 60 VS = ±5V AV = 1 45 200 30 150 4 3 2 0 1 –15 VOUT 0 –45 –60 –60 SETTLING TIME (ns) 500Ω – VOUT + 100 1mV 50 –4 10mV –3 –2 –1 1 2 0 OUTPUT STEP (V) 3 4 AV = 2 8 7 6 5 –3 –2 –110 4 VOUT = 2VP-P, HD3 100k 1M FREQUENCY (Hz) 10M 62367 G32 3 4 –90 HD3 –110 HD2 V = ±5V 3 T S = 25°C A HD2, HD3 < –40dBc 2 100k 1M 10k FREQUENCY (Hz) –120 –130 10M 10k 1k 100k 1M FREQUENCY (Hz) 62367 G31 Distortion vs Frequency VS = ±5V –60 AV = –1 RL = 1k VOUT = 4VP-P, HD3 –70 –70 –80 VOUT = 4VP-P, HD2 –90 10M –50 VOUT = 4VP-P, HD3 –80 –90 VOUT = 4VP-P, HD2 –100 –110 VOUT = 2VP-P, HD2 2 –1 1 0 OUTPUT STEP (V) –80 –100 DISTORTION (dBc) DISTORTION (dBc) DISTORTION (dBc) –4 VS = ±2.5V –60 AV = 1 VOUT = 2VP-P –70 RL = 1k –100 10k 10mV Distortion vs Frequency AV = –1 VS = ±2.5V –50 AV = –1 RL = 1k –60 VOUT = 4VP-P, HD2 –100 1k 1mV 62367 G28 Distortion vs Frequency VOUT = 4VP-P, HD3 –130 0 –40 –70 –120 1mV –50 9 Distortion vs Frequency –90 100 62367 G30 –50 –80 500Ω 10mV 10 62367 G29 VS = ±5V –60 AV = 1 RL = 1k + 50 DISTORTION (dBc) VS = ±5V TA = 25°C AV = –1 500Ω 0 VOUT VIN Maximum Undistorted Output Signal vs Frequency OUTPUT VOLTAGE SWING (VP-P) 200 10mV – 62367 G27b Settling Time vs Output Step (Inverting) 1mV VS = ±5V TA = 25°C AV = 1 0.5μs/DIV 62367 G27a VIN –30 –45 0.5μs/DIV 150 15 SETTLING RESIDUE 1 DIV = 18-BIT ERROR SETTLING RESIDUE (μV) 2.0 SETTLING RESIDUE (μV) OUTPUT VOLTAGE (V) 60 VS = ±2.5V AV = 1 45 Settling Time vs Output Step (Noninverting) SETTLING TIME (ns) 18-Bit Settling Time to 2VP-P Output Step VOUT = 2VP-P, HD2 VOUT = 2VP-P, HD2 –110 –120 –120 VOUT = 2VP-P, HD3 –130 1k 10k 100k 1M FREQUENCY (Hz) VOUT = 2VP-P, HD3 –130 10M 62367 G33 1k 10k 100k 1M FREQUENCY (Hz) 10M 62367 G34 623637f 15 LT6236/LT6237 TYPICAL PERFORMANCE CHARACTERISTICS Large-Signal Response Small-Signal Response 50mV/DIV 1V/DIV 2V 0V 0V –2V 200ns/DIV VS = ±2.5V AV = –1 RL = 1k 62367 G35 VS = ±2.5V AV = 1 RL = 1k Output Overdrive Recovery VIN 1V/DIV 5V 0V VOUT 2V/DIV Large-Signal Response 2V/DIV 62367 G36 200ns/DIV 0V 0V –5V VS = ±5V AV = 1 RL = 1k 200ns/DIV 62367 G37 VS = ±2.5V AV = 3 200ns/DIV 62367 G38 (LT6236) ENABLE Characteristics ENABLE Pin Current vs ENABLE Pin Voltage 30 4.5 TA = –55°C TA = 125°C 25 TA = 25°C 3.0 2.5 VS = ±2.5V AV = 1 TA = –55°C 2.0 1.5 1.0 20 TA = 25°C 10 5 0.5 0 VS = ±2.5V –2.0 0 1.0 –1.0 PIN VOLTAGE (V) 2.0 62367 G39 5V 0V 15 T = 125°C A VOUT 3.5 ENABLE PIN CURRENT (μA) SUPPLY CURRENT (mA) 4.0 ENABLE Pin Response Time ENABLE PIN Supply Current vs ENABLE Pin Voltage 0 –2.0 0 1.0 –1.0 PIN VOLTAGE (V) 2.0 0.5V 0V VS = ±2.5V VIN = 0.5V AV = 1 RL = 1k 100μs/DIV 62367 G41 62367 G40 623637f 16 LT6236/LT6237 APPLICATIONS INFORMATION +V +V Q5 Q3 Q4 CM DESD5 VOUT –V +V DESD1 DESD6 C1 DESD2 DIFFERENTIAL DRIVE GENERATOR –V Q1 –VIN D1 –V Q2 Q6 D2 +V +VIN DESD3 DESD4 –V I1 BIAS ENABLE +V –V 62367 F01 Figure 1. Simplified Schematic Figure 1 is a simplified schematic of the LT6236/LT6237, which has a pair of low noise input transistors Q1 and Q2. A simple current mirror Q3/Q4 converts the differential signal to a single-ended output, and these transistors are degenerated to reduce their contribution to the overall noise. Capacitor C1 reduces the unity cross frequency and improves the frequency stability without degrading the gain bandwidth of the amplifier. Capacitor CM sets the overall amplifier gain bandwidth. The differential drive generator supplies current to transistors Q5 and Q6 that provide rail-to-rail output swing. Input Protection Back-to-back diodes, D1 and D2, limit the differential input voltage to ±0.7V. The inputs of the LT6236/LT6237 do not have internal resistors in series with the input transistors. This technique is often used to protect the input devices from over voltage that causes excessive current to flow. The addition of these resistors would significantly degrade the voltage noise of these amplifiers. For instance, a 100Ω resistor in series with each input would generate 1.8nV/√Hz of noise, and the total amplifier noise voltage would rise from 1.1nV/√Hz to 2.1nV/√Hz. Once the input differential voltage exceeds ±0.7V, steady state current conducted through the protection diodes should be limited to ±40mA. This implies 25Ω of protection resistance is necessary per volt of overdrive beyond ±0.7V. These input diodes are rugged enough to handle transient currents due to amplifier slew rate overdrive and clipping without protection resistors. Figure 2 shows the output response to an input overdrive with the amplifier connected as a voltage follower. With the input signal low, current source I1 saturates and the differential drive generator drives Q6 into saturation so the output voltage swings all the way to V–. The input can swing positive until transistor Q2 saturates into current mirror Q3/Q4. When saturation occurs, the output tries to phase invert, but diode D2 conducts current from the signal source to the output through the feedback connection. The output is clamped a diode drop below the input. In Figure 2, the input signal generator is limiting at about 20mA. With the amplifier connected in a gain of AV ≥ 2, the output can invert with very heavy overdrive. To avoid this inversion, limit the input overdrive to 0.5V beyond the power supply rails. 2.5V 1V/DIV Functional Description 0V –2.5V 500μs/DIV 62367 F02 Figure 2. VS = ±2.5V, AV = 1 with Large Overdrive 623637f 17 LT6236/LT6237 APPLICATIONS INFORMATION ESD The LT6236/LT6237 have reverse-biased ESD protection diodes on all inputs and outputs as shown in Figure 1. If these pins are forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to 100mA or less, no damage to the device will occur. Noise The noise voltage of the LT6236/LT6237 is equivalent to that of a 75Ω resistor, and for the lowest possible noise it is desirable to keep the source and feedback resistance at or below this value, i.e. RS + RG||RFB ≤ 75Ω. With RS + RG||RFB = 75Ω the total noise of the amplifier is: eN = (1.1nV)2 +(1.1nV)2 = 1.55nV / Hz Below this resistance value, the amplifier dominates the noise, but in the region between 75Ω and about 3k, the noise is dominated by the resistor thermal noise. As the total resistance is further increased beyond 3k, the amplifier noise current multiplied by the total resistance eventually dominates the noise. The product of eN • √ISUPPLY is an interesting way to gauge low noise amplifiers. Most low noise amplifiers have high ISUPPLY. In applications that require low noise voltage with the lowest possible supply current, this product can be helpful. be used with a pull-up resistor to ensure that the amplifier remains off. When the ENABLE pin is left floating, the amplifier is inactive. However, care should be taken to control the leakage current through the pin so the amplifier is not inadvertently turned on. See Typical Performance Characteristics. The output leakage current when disabled is very low; however, current can flow into the input protection diodes, D1 and D2, if the output voltage exceeds the input voltage by a diode drop. Power Dissipation The LT6237MS8 combines high speed with large output current in a small package. Due to the wide supply voltage range, it is possible to exceed the maximum junction temperature under certain conditions. Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) as follows: TJ = TA + (PD • θJA) The power dissipation in the IC is the function of the supply voltage, output voltage and the load resistance. For a given supply voltage, the worst-case power dissipation PD(MAX) occurs at the maximum quiescent supply current and at the output voltage which is half of either supply voltage (or the maximum swing if it is less than half the supply voltage). PD(MAX) is given by: PD(MAX) = (V+– V–)( IS(MAX)) + (V+/2)2/RL The LT6236/LT6237 have an eN • √ISUPPLY of only 1.9 per amplifier, yet it is common to see amplifiers with similar noise specifications to have eN • √ISUPPLY as high as 13.5. For a complete discussion of amplifier noise, see the LT1028 data sheet. Example: An LT6237HMS8 in the 8-Lead MSOP package has a thermal resistance of θJA = 273°C/W. Operating on ±5V supplies with one amplifier driving a 1k load, the worst-case power dissipation is given by: ENABLE Pin In this example, the maximum ambient temperature that the part is allowed to operate is: The LT6236 includes an ENABLE pin that shuts down the amplifier to 10μA maximum supply current. For normal operation, the ENABLE pin must be pulled to at least 2.7V below V+. The ENABLE pin must be driven high to within 0.35V of V+ to shut down the amplifier. This can be accomplished with simple gate logic; however care must be taken if the logic and the LT6236 operate from different supplies. If this is the case, open drain logic can PD(MAX) = (10V)(11mA) + (2.5V)2/1000Ω= 116mW TA = TJ - (PD(MAX) × 273°C/W) TA = 150°C – (116mW)(273°C/W) = 118.3°C To operate the device at a higher ambient temperature for the same conditions, switch to using two LT6236 in the 6-Lead TSOT-23, or a single LT6237 in the 8-Lead DFN package. 623637f 18 LT6236/LT6237 APPLICATIONS INFORMATION Interfacing to ADCs When driving an ADC, a single-pole, passive RC filter should be used between the outputs of the LT6236/LT6237 and the inputs of the ADC. The sampling process of ADCs creates a charge transient from the switching of the ADC sampling capacitor. This momentarily “shorts” the output of the amplifier as charge is transferred between amplifier and sampling capacitor. The amplifier must recover and settle from this load transient before the acquisition period has ended for a valid representation of the input signal. The RC network between the outputs of the driver and the inputs of the ADC decouples the sampling transient of the ADC. The capacitance serves to provide the bulk of the charge during the sampling process, while the two resistors at the outputs of the LT6236/LT6237 are used to dampen and attenuate any charge injected by the ADC. The RC filter provides the benefit of band limiting broadband output noise. Thanks to the very low wideband noise of the LT6236/ LT6237, a wideband filter can be used between the amplifier and the ADC without impacting SNR. This is especially important with ADCs or applications that require full settling in between each conversion. The selection of an appropriate filter depends on the specific ADC, however the following procedure is suggested for choosing filter component values. Begin by selecting an appropriate RC time constant for the input signal. Generally, longer time constants improve SNR at the expense of settling time. Output transient settling to 18-bit accuracy will require over twelve RC time constants. To select the resistor value, the resistors in the decoupling network should be at least 10Ω. Keep in mind that these resistors also serve to decouple the LT6236/LT6237 outputs from load capacitance. Too large of a resistor will leave insufficient settling time. Too small of a resistor will not properly dampen the load transient of the sampling process, and prolong the time required for settling. For lowest distortion, choose capacitors with low dielectric absorption such as a C0G multilayer ceramic capacitor. In general, large capacitor values attenuate the fixed nonlinear charge kickback, however very large capacitor values will detrimentally load the driver at the desired input frequency and cause driver distortion. Smaller input swings allow for larger filter capacitor values due to decreased loading demands on the driver. This property may be limited by the particular input amplitude dependence of differential nonlinear kickback for the specific ADC used. Series resistors should typically be placed at the inputs to the ADC in order to further improve distortion performance. These series resistors function with the ADC sampling capacitor to filter potential ground bounce or other high speed sampling disturbances. Additionally the resistors limit the rise time of residual filter glitches that manage to propagate to the driver outputs. Restricting possible glitch propagation rise time to within the small signal bandwidth of the driver enables less disturbed output settling. 623637f 19 LT6236/LT6237 TYPICAL APPLICATIONS Single Supply, Low Noise, Low Power, Bandpass Filter with Gain = 10 Frequency Response Plot of Bandpass Filter 23 C2 47pF f0 = V+ 1 = 1MHz 2πRC GAIN (dB) R1 732Ω C = √C1C2, R = R1 = R2 C1 1000pF ( – VIN LT6236 + R4 10k C3 0.1μF ) f0 = 732Ω MHz, MAXIMUM f0 = 1MHz R f–3dB = f0 2.5 AV = 20dB at f0 EN = 4μVRMS INPUT REFERRED IS = 3.7mA FOR V+ = 5V 0.1μF R3 10k R2 732Ω VOUT EN 3 –7 100k 1M FREQUENCY (Hz) 10M 62367 TA03 62367 TA02 Driving a Fully Differential ADC LOWPASS FILTERS 6V VA 4.096V 4.096V 38.3Ω 49.9Ω IN+ 270pF 1/2 LT6237 4.096V OR 0V – + LTC2389-18 OR 0V 0V 1/2 LT6237 VB + – 270pF 38.3Ω 49.9Ω IN– 62367 TA04 –2V Driving a Single-Ended ADC LOWPASS FILTER 6V 4.096V 0V + – –2V 49.9Ω 10Ω LT6236 IN+ 1nF LTC2389-18 49.9Ω IN– 62367 TA05 623637f 20 LT6236/LT6237 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) 1.90 BSC S6 TSOT-23 0302 NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 623637f 21 LT6236/LT6237 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 ±0.10 (4 SIDES) R = 0.125 TYP 5 0.40 ±0.10 8 1.65 ±0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 0509 REV C 0.200 REF 0.75 ±0.05 4 0.25 ±0.05 1 0.50 BSC 2.38 ±0.10 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 623637f 22 LT6236/LT6237 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 0.889 ±0.127 (.035 ±.005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 3.00 ±0.102 (.118 ±.004) (NOTE 3) 0.65 (.0256) BSC 0.42 ± 0.038 (.0165 ±.0015) TYP 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 1 0.53 ±0.152 (.021 ±.006) DETAIL “A” 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 ±0.0508 (.004 ±.002) MSOP (MS8) 0307 REV F NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 623637f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LT6236/LT6237 TYPICAL APPLICATION The LT6236 is configured as a transimpedance amplifier with an I-to-V conversion gain of 1.5kΩ set by R1. The LT6236 is ideally suited to this application because of its low input offset voltage and current, and its low noise. This is because the 1.5k resistor has an inherent thermal noise of 5nV/√Hz or 3.4pA/√Hz at room temperature, while the LT6236 contributes only 1.1nV/√Hz and 2.4pA/√Hz. So, with respect to both voltage and current noises, the LT6236 is actually quieter than the gain resistor. The circuit uses an avalanche photodiode with the cathode biased to approximately 200V. When light is incident on the photodiode, it induces a current IPD which flows into the amplifier circuit. The amplifier output falls negative to maintain balance at its inputs. The transfer function is therefore VOUT = –IPD • 1.5k. C1 ensures stability and good settling characteristics. Output offset was measured at 280μV, so low in part because R2 serves to cancel the DC effects of bias current. Output noise was measured at 1.1mVP–P on a 100MHz measurement bandwidth, with C2 shunting R2’s thermal noise. As shown in the scope photo, the rise time is 17ns, indicating a signal bandwidth of 20MHz. Low Power Avalanche Photodiode Transimpedance Amplifier IS = 3.3mA Photodiode Amplifier Time Domain Response ≈200V BIAS C1 4.7pF WWW.ADVANCEDPHOTONIX.COM R1 1.5k – R2 1.5k 30mV/DIV ADVANCED PHOTONIX 012-70-62-541 5V LT6236 + –5V 50ns/DIV ENABLE C2 0.1μF 62367 TA07 62367 TA06 OUTPUT OFFSET = 500μV TYPICAL BANDWIDTH = 20MHz OUTPUT NOISE = 1.1mVP-P (100MHz MEASUREMENT BW) RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT6230/LT6231 Single, Dual Low noise, rail-to-rail output. 1.1nV/√Hz LT6350 Low Noise, Single-Ended to Differential Converter/ADC Driver 4.8mA, -97dBc distortion at 100kHz, 4VP–P Output LTC6246/LTC6247/LTC6248 Single/Dual/Quad 180MHz Rail-to-Rail Low Power Op Amps 1mA/Amplifier, 4.2nV/√Hz LTC6360 1GHz Very Low Noise Single-Ended SAR ADC Driver with True Zero Output HD2 = –103dBc and HD3 = –109dBc for 4VP-P Output at 40kHz LTC2389-18 Low power 18-bit SAR ADC 2.5 Msps LTC2389-16 Low power 16-bit SAR ADC 2.5 Msps LTC2379-18 LTC2378-18 LTC2377-18 LTC2376-18 Low power 18-bit SAR ADC 1.6 Msps 1 Msps 500 ksps 250 ksps OPERATIONAL AMPLIFIERS ADCs 623637f 24 Linear Technology Corporation LT 1212 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2012