LTC6431-15 50Ω Gain Block IF Amplifier Features n n n n n n n n n n n n n n n n Description 20MHz to 1700MHz Bandwidth 15.5dB Power Gain 47dBm OIP3 at 240MHz into a 50Ω Load NF = 3.33dB at 240MHz 1nV/√Hz Total Input Noise S11 < –15dB Up to 1.2GHz S22 < –15dB Up to 1.2GHz > 2VP-P Linear Output Swing P1dB = 20.6dBm DC Power = 450mW 50Ω Single-Ended Operation Insensitive to VCC Variation A-Grade 100% OIP3 Tested at 240MHz Input/Output Internally Matched to 50Ω Single 5V Supply Unconditionally Stable The LTC®6431-15 is a gain-block amplifier with excellent linearity at frequencies beyond 1000MHz and with low associated output noise. The unique combination of high linearity, low noise and low power dissipation make this an ideal candidate for many signal-chain applications. The LTC6431-15 is easy to use, requiring a minimum of external components. It is internally input/output matched to 50Ω and it draws only 90mA from a single 5V supply. On-chip bias and temperature compensation maintain performance over environmental changes. The LTC6431-15 uses a high performance SiGe BiCMOS process for excellent repeatability compared with similar GaAs amplifiers. All A-grade LTC6431-15 devices are tested and guaranteed for OIP3 at 240MHz. The LTC6431-15 is housed in a 4mm × 4mm 24-lead QFN package with an exposed pad for thermal management and low inductance. Applications n n n Single-Ended IF Amplifier ADC Driver CATV L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Single-Ended IF Amplifier OIP3 vs Frequency 50 5V 1000pF 48 RF CHOKE, 560nH 46 1000pF LTC6431-15 RSOURCE 50Ω RLOAD 50Ω 643115 TA01a OIP3 (dBm) VCC = 5V 44 42 40 VCC = 5V, T = 25°C POUT = 2dBm/TONE fSPACE = 1MHz ZIN = ZOUT = 50Ω 38 36 0 200 400 600 FREQUENCY (MHz) 800 1000 643115 TA01b 643115f 1 LTC6431-15 Absolute Maximum Ratings Pin Configuration (Note 1) Total Supply Voltage (VCC to GND)...........................5.5V Amplifier Output Current (OUT)............................105mA RF Input Power, Continuous, 50Ω (Note 2)..........15dBm RF Input Power, 100µs Pulse, 50Ω (Note 2).........20dBm Operating Case Temperature Range (TCASE)...........................................–40°C to 85°C Storage Temperature Range................... –65°C to 150°C Junction Temperature (TJ)..................................... 150°C DNC DNC DNC VCC GND IN TOP VIEW 24 23 22 21 20 19 DNC 1 18 OUT DNC 2 17 GND DNC 3 16 T_DIODE 25 GND DNC 4 15 DNC DNC 5 14 DNC DNC 6 DNC DNC DNC DNC 9 10 11 12 VCC 8 GND 13 DNC 7 UF PACKAGE 24-LEAD (4mm × 4mm) PLASTIC QFN TJMAX = 150°C, θJC = 54°C/W EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC6431AIUF-15#PBF LTC6431AIUF-15#TRPBF 43115 24-Lead (4mm × 4mm) Plastic QFN –40°C to 85°C LTC6431BIUF-15#PBF LTC6431BIUF-15#TRPBF 43115 24-Lead (4mm × 4mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ DC Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω. Typical measured DC electrical performance using Test Circuit A. SYMBOL PARAMETER VS Operating Supply Range IS,TOT Total Supply Current IS,OUT ICC,OUT Total Supply Current to OUT Pin Current to VCC Pin CONDITIONS MIN TYP MAX UNITS 4.75 5.0 5.25 V 75 67 85.1 l 100 112 mA mA 62 55 71 l 92 95 mA mA 12 12.5 14 l 16 16.5 mA mA All VCC Pins Plus OUT Current to OUT Either VCC Pin May Be Used 643115f 2 LTC6431-15 AC Electrical Characteristics TA = 25°C (Note 3), VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Small Signal BW –3dB Bandwidth De-Embedded to Package (Low Frequency Cutoff 20MHz) 2000 MHz S11 Input Return Loss, 20MHz to 2000MHz De-Embedded to Package –10 dB S21 Forward Power Gain, 50MHz to 300MHz De-Embedded to Package 15.5 dB S12 Reverse Isolation, 20MHz to 3000MHz De-Embedded to Package –19 dB S22 Output Return Loss, 20MHz to 1700MHz De-Embedded to Package –10 dB 15.5 dB Frequency = 50MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 46.0 45.0 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –88.0 –86.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –58.0 dBc HD3 Third Harmonic Distortion POUT = 6dBm –88.0 dBc P1dB Output 1dB Compression Point 20.5 dBm NF Noise Figure De-Embedded to Package 3.06 dB 15.5 dB Frequency = 140MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 47.0 46.0 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –90.0 –88.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –58.0 dBc HD3 Third Harmonic Distortion POUT = 6dBm –88.0 dBc P1dB Output 1dB Compression Point 20.7 dBm NF Noise Figure 3.20 dB De-Embedded to Package Frequency = 240MHz S21 Power Gain De-Embedded to Package l 14.5 14.2 15.6 16.5 16.7 dB dB OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 8MHz A-Grade B-Grade 44.0 47.0 45.5 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 8MHz A-Grade B-Grade –84 –90.0 –87.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –59.0 dBc HD3 Third Harmonic Distortion POUT = 6dBm –88.0 dBc P1dB Output 1dB Compression Point 20.6 dBm NF Noise Figure 3.33 dB De-Embedded to Package 643115f 3 LTC6431-15 AC Electrical Characteristics TA = 25°C (Note 3), VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Frequency = 300MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz HD2 Second Harmonic Distortion HD3 Third Harmonic Distortion P1dB Output 1dB Compression Point NF Noise Figure 15.5 dB A-Grade B-Grade 46.5 45.5 dBm dBm A-Grade B-Grade –89.0 –87.0 dBc dBc POUT = 6dBm –60.0 dBc POUT = 6dBm –86.0 dBc 20.6 dBm De-Embedded to Package 3.41 dB 15.4 dB Frequency = 380MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 46.0 45.0 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –88.0 –86.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –57.0 dBc HD3 Third Harmonic Distortion POUT = 6dBm –87.0 dBc 20.6 dBm De-Embedded to Package 3.48 dB 15.3 dB P1dB Output 1dB Compression Point NF Noise Figure Frequency = 500MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 44.5 43.5 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –85.0 –83.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –55.6 dBc HD3 Third Harmonic Distortion POUT = 6dBm –77.0 dBc 20.6 dBm De-Embedded to Package 3.60 dB 15.3 dB P1dB Output 1dB Compression Point NF Noise Figure Frequency = 600MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 41.5 40.5 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –79.0 –77.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –53.6 dBc HD3 Third Harmonic Distortion POUT = 6dBm –69.0 dBc 20.6 dBm De-Embedded to Package 3.67 dB P1dB Output 1dB Compression Point NF Noise Figure 643115f 4 LTC6431-15 AC Electrical Characteristics TA = 25°C (Note 3), VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Frequency = 700MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz HD2 Second Harmonic Distortion HD3 Third Harmonic Distortion P1dB Output 1dB Compression Point NF Noise Figure 15.2 dB A-Grade B-Grade 40.0 39.0 dBm dBm A-Grade B-Grade –76.0 –74.0 dBc dBc POUT = 6dBm –51.9 dBc POUT = 6dBm –69.0 dBc 20.3 dBm De-Embedded to Package 3.75 dB 15.2 dB Frequency = 800MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 39.0 38.0 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –74 –72 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –49.2 dBc HD3 Third Harmonic Distortion POUT = 6dBm –65.0 dBc 20.1 dBm De-Embedded to Package 3.83 dB 15.1 dB P1dB Output 1dB Compression Point NF Noise Figure Frequency = 900MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 38.5 37.5 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –73.0 –71.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –46.7 dBc HD3 Third Harmonic Distortion POUT = 6dBm –63.0 dBc 19.9 dBm De-Embedded to Package 3.90 dB 15.0 dB P1dB Output 1dB Compression Point NF Noise Figure Frequency = 1000MHz S21 Power Gain De-Embedded to Package OIP3 Output Third-Order Intercept Point POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade 38.0 37.0 dBm dBm IM3 Third-Order Intermodulation POUT = 2dBm/Tone, Δf = 1MHz A-Grade B-Grade –72.0 –70.0 dBc dBc HD2 Second Harmonic Distortion POUT = 6dBm –45.0 dBc HD3 Third Harmonic Distortion POUT = 6dBm –59.0 dBc 19.5 dBm De-Embedded to Package 3.99 dB P1dB Output 1dB Compression Point NF Noise Figure Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by design and characterization. This parameter is not tested. Note 3: The LTC6431-15 is guaranteed functional over the case operating temperature range of –40°C to 85°C. Note 4: Small-signal parameters S and noise are de-embedded to the package pins, while large-signal parameters are measured directly from the circuit. 643115f 5 LTC6431-15 Typical Performance Characteristics TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4). Stability Factor K vs Frequency Over Temperature 10 20 9 STABILITY FACTOR K (UNITLESS) 25 15 S11 S21 S12 S22 10 MAG (dB) 5 0 –5 –10 –15 –20 8 TCASE = 100°C 85°C 60°C 35°C 25°C 0°C –20°C –40°C 8 7 6 5 4 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 6 5 2 2 1 0 1000 643115 G01 3000 4000 2000 FREQUENCY (MHz) S11 vs Frequency Over Temperature 0 –15 TCASE = 100°C 85°C 60°C 35°C 25°C 0°C –20°C –40°C 10 8 –25 0 2 2500 3000 S12 vs Frequency Over Temperature 500 TCASE = 100°C –5 85°C 60°C 35°C –10 25°C 0°C –20°C –15 –40°C 2500 3000 643115 G05 TCASE = 100°C 85°C 60°C 35°C 25°C 0°C –20°C –40°C –5 –20 1000 1500 2000 FREQUENCY (MHz) S22 vs Frequency Over Temperature 0 MAG S22 (dB) MAG S12 (dB) 0 643115 G04 0 –10 –15 –20 –25 –25 –30 643115 G03 14 12 4 1000 1500 2000 FREQUENCY (MHz) 400 600 800 1000 1200 1400 FREQUENCY (MHz) 16 6 500 200 18 –20 0 0 643115 G02 S21 vs Frequency Over Temperature MAG S21 (dB) MAG S11 (dB) –10 0 5000 20 TCASE = 100°C 85°C 60°C 35°C 25°C 0°C –20°C –40°C –5 4 3 3 0 TCASE = –40°C 25°C 85°C 7 1 –25 –30 Noise Figure vs Frequency Over Temperature NF (dB) S Parameters vs Frequency 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 643115 G06 –30 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 643115 G07 643115f 6 LTC6431-15 Typical Performance Characteristics A-Grade TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4). OIP3 vs Frequency Over OIP3 vs Frequency VCC Voltage OIP3 vs Power Out Over Frequency 52 50 OIP3 (dBm) 46 44 42 40 46 44 42 40 38 36 VCC = 5V, T = 25°C = 2dBm/ TONE P 38 OUT fSPACE = 1MHz ZIN = ZOUT = 50Ω 36 400 200 0 FREQUENCY (MHz) 30 –10 –8 –6 –4 –2 0 2 4 6 RF POWER OUT (dBm/TONE) 1000 643115 G08 50MHz 100MHz 200MHz 240MHz 300MHz 400MHz 500MHz 600MHz 643115 G09 34 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 643115 G10 45 40 OIP3 (dBm) OIP3 (dBm) 10 50 46 44 42 35 30 40 25 38 36 8 4.5V 4.75V 5V 5.25V 5.5V OIP3 vs Frequency Over Case Temperature VCC = 5V, T = 25°C POUT = 2dBm/TONE ZIN = ZOUT = 50Ω 48 40 700MHz 800MHz 900MHz 1000MHz OIP3 vs Tone Spacing Over Frequency 50 42 36 32 800 44 38 34 600 T = 25°C POUT = 2dBm/TONE fSPACE = 1MHz ZIN = ZOUT = 50Ω 48 OIP3 (dBm) 48 OIP3 (dBm) 50 VCC = 5V 50 POUT = 2dBm/TONE 48 fSPACE = 1MHz ZIN = ZOUT = 50Ω 46 0 2 4 50MHz 100MHz 200MHz 240MHz 6 8 10 12 14 16 18 20 TONE SPACING (MHz) 643115 G11 300MHz 400MHz 500MHz 600MHz 20 85°C 60°C 25°C 0°C –20°C –30°C –40°C VCC = 5V POUT = 2dBm/TONE fSPACE = 1MHz ZIN = ZOUT = 50Ω 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 643115 G12 700MHz 800MHz 900MHz 1000MHz 643115f 7 LTC6431-15 Typical Performance Characteristics TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 50Ω, unless otherwise noted. Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4). HD2 vs Frequency Over POUT HD3 vs Frequency Over POUT POUT = 6dBm 8dBm 10dBm POUT = 6dBm 8dBm –20 10dBm –30 HD3 (dBc) –30 –40 –40 –70 –80 –80 –90 –90 –100 TCASE = 25°C 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 643115 G14 95 98 90 96 85 ITOT (mA) ITOT (mA) 70 VCC = 5V 92 90 88 60 4.25 4.5 4.75 5.25 5.5 5.75 VCC (V) –20 20 12 0 –10 –8 –6 –4 –2 0 2 4 INPUT POWER (dBm) 500MHz 600MHz 700MHz 800MHz 900MHz 1000MHz 6 643115 G17 8 10 643115 G19 0 5 10 15 20 643115 G21 20 14.0 60MHz 100MHz 140MHz 200MHz 240MHz 300MHz 400MHz 13.5 13.0 12.5 12.0 –5 P1dB vs Frequency 21 14.5 –10 RF INPUT POWER (dBm) 15.5 14 2 50 –15 100 22 16 4 80 16.0 15.0 GAIN (dB) OUTPUT POWER (dBm) 18 6 0 20 40 60 TEMPERATURE (°C) Gain vs Output Power Over Frequency 22 60MHz 100MHz 140MHz 200MHz 240MHz 300MHz 400MHz 65 55 Output Power vs Input Power Over Frequency 8 70 84 643115 G16 10 75 60 –40 VCC = 5V T = 25°C 80 86 82 6 5 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 643115 G15 Total Current vs RF Input Power 100 94 4 –60 –70 Total Current (ITOT) vs Case Temperature 80 50 –50 –100 Total Current (ITOT) vs VCC 90 –40 –60 –60 100 –10 –50 –50 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 643115 G13 POUT = 6dBm 8dBm –20 10dBm –30 –10 P1dB (dBm) HD2 (dBc) –20 –70 0 HD4 (dBc) –10 HD4 vs Frequency Over POUT 0 TOTAL CURRENT (mA) 0 0 5 500MHz 600MHz 700MHz 800MHz 900MHz 1000MHz 10 15 OUTPUT POWER (dBm) 19 18 17 16 20 643115 G20 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 643115 G21 643115f 8 LTC6431-15 Pin Functions GND (Pins 8, 17, 23, Exposed Pad Pin 25): Ground. For best RF performance, all ground pins should be connected to the printed circuit board ground plane. The exposed pad should have multiple via holes to an underlying ground plane for low inductance and good thermal dissipation. IN (Pin 24): Signal Input Pin. This pin has an internally generated 2V DC bias. A DC blocking capacitor is required. See the Applications Information section for specific recommendations. VCC (Pins 9, 22): Positive Power Supply. Either VCC pin should be connected to the 5V supply. Bypass the VCC pin with 1000pF and 0.1µF capacitors. The 1000pF capacitor should be physically close to Pin 22. OUT (Pin 18): Amplifier Output Pin. A choke inductor is necessary to provide power from the 5V supply and to provide RF isolation. For best performance select a choke with low loss and high self-resonant frequency (SRF). A DC blocking capacitor is also required. See the Applications Information section for specific recommendations. DNC (Pins 1 to 7, 10 to 15, 19 to 21): Do Not Connect. Do not connect these pins; allow them to float. Failure to float these pins may impair operation of the LTC6431-15. T_DIODE (Pin 16): Optional Diode. The T_DIODE can be forward-biased to ground with 1mA of current. The measured voltage will be an indicator of chip temperature. Block Diagram VCC 9, 22 BIAS AND TEMPERATURE COMPENSATION 24 IN 15dB GAIN OUT T_DIODE 18 16 GND 8, 17, 23, 25 (EXPOSED PAD) 643115 BD 643115f 9 LTC6431-15 Test Circuit A C1 60pF C5 1nF C6 0.1µF OPTIONAL STABILITY NETWORK L1 560nH DNC DNC IN R1 350Ω DNC VCC = 5V VCC C7 1000pF GND PORT INPUT DNC OUT DNC GND DNC T_DIODE DNC DNC DNC DNC DNC VCC GND DNC DNC PORT OUTPUT DNC LTC6431-15 DNC C3 1000pF DNC 643115 F01 Figure 1. Application, Test Circuit A Operation The LTC6431-15 is a highly linear, fixed-gain amplifier that is configured to operate single ended. Its core signal path consists of a single amplifier stage minimizing stability issues. The input is a Darlington pair for high input impedance and high current gain. Additional circuit enhancements increase the output impedance and minimize the effects of internal Miller capacitance. The LTC6431-15 starts with a classic RF gain-block topology but adds additional enhancements to achieve dramati- cally improved linearity. Shunt and series feedback are added to lower the input/output impedance and match them simultaneously to the 50Ω source and load. Meanwhile, an internal bias controller optimizes the internal operating point for peak linearity over environmental changes. This circuit architecture provides low noise, excellent RF power handling capability and wide bandwidth—characteristics that are desirable for IF signal chain applications. 643115f 10 LTC6431-15 Applications Information The LTC6431-15 is a highly linear fixed-gain amplifier which is designed for ease of use. Implementing an RF gain stage is often a multistep project. Typically an RF designer must choose a bias point and design a bias network. Next the designer needs to address impedance matching with input and output matching networks and, finally, add stability networks to ensure stable operation in and out of band. These tasks are handled internally within the LTC6431-15. The LTC6431-15 has an internal self-biasing network which compensates for temperature variation and keeps the device biased for optimal linearity. Therefore, input and output DC blocking capacitors are required. Both the input and output are internally impedance matched to 50Ω from 20MHz to 1700MHz. Similarly, an RF choke is required at the output to deliver DC current to the device. The RF choke acts as a high impedance (isolation) to the DC supply which is at RF ground. Thus, the internal LTC6431-15 impedance matching is unaffected by the biasing network. The open collector output topology can deliver much more power than an amplifier whose collector is biased through a resistor or active load. Choosing the Right RF Choke Not all choke inductors are created equal. It is always important to select an inductor with low RLOSS, as this will drop the available voltage to the device. Also look for an inductor with high self-resonant frequency (SRF) as this will limit the upper frequency where the choke is useful. Above the SRF, the parasitic capacitance dominates and the choke impedance will drop. For these reasons, wire wound inductors are preferred, and multilayer ceramic chip inductors should be avoided for an RF choke. Since the LTC6431-15 is capable of such wideband operation, a single choke value will probably not result in optimized performance across its full frequency band. Table 1 lists target frequency bands and suggested corresponding inductor values. Table 1. Target Frequency Bands and Suggested Inductor Values FREQUENCY BAND INDUCTOR VALUE (MHz) (nH) MODEL NUMBER 20 to 100 1500nH 0805LS 100 to 500 560nH 0603LS 500 to 1000 100nH 0603LS 1000 to 2000 51nH 0603LS MANUFACTURER Coilcraft www.coilcraft.com DC Blocking Capacitor The role of a DC blocking capacitor is straightforward: block the path of DC current and allow a low series impedance path for the AC signal. Lower frequencies require a higher value of DC blocking capacitance. Generally, 1000pF to 10000pF will suffice for operation down to 20MHz. The LTC6431-15 is relatively insensitive to the choice of blocking capacitor. RF Bypass Capacitor RF bypass capacitors act to shunt AC signals to ground with a low impedance path. It is best to place them as close as possible to the DC power supply pins of the device. Any extra distance translates into additional series inductance which lowers the self-resonant frequency and useful bandwidth of the bypass capacitor. The suggested bypass capacitor network consists of two capacitors: a low value 1000pF capacitor to handle high frequencies in parallel with a larger 0.1µF capacitor to handle lower frequencies. Use ceramic capacitors of an appropriate physical size for each capacitance value (e.g., 0402 for the 1000pF, 0805 for the 0.1µF) to minimize the equivalent series resistance (ESR) of the capacitor. 643115f 11 LTC6431-15 Applications Information Low Frequency Stability Most RF gain blocks suffer from low frequency instability. To avoid any stability issues, the LTC6431-15 has an internal feedback network that lowers the gain and matches the input and output impedances at frequencies above 20MHz. This feedback network contains a series capacitor, so if at some low frequency the feedback fails, the gain increases and gross impedance mismatches occur—indeed a recipe for instability. Luckily, this situation is easily resolved with a parallel capacitor and resistor network on the input, as seen in Figure 1. This network provides resistive loss at low frequencies and is bypassed by the parallel capacitor within the desired band of operation. However, if the LTC6431-15 is preceeded by a low frequency termination, such as a choke, the input stability network is NOT required. Test Circuit The test circuit shown in Figure 2 is designed to allow evaluation of the LTC6431-15 with standard single-ended 50Ω test equipment. The circuit requires a minimum of external components. Since the LTC6431-15 is a wideband part, the evaluation test circuit is optimized for wideband operation. Obviously, for narrowband applications the circuit can be further optimized. As mentioned earlier, input and output DC blocking capacitors are required as this device is internally biased for optimal operation. A frequency appropriate choke and decoupling capacitors are required to provide DC bias to the RF out node. A 5V supply should also be applied to both of the VCC pins on the device. A suggested parallel 60pF, 350Ω network has been added to the input to ensure low frequency stability. The 60pF capacitance can be increased to improve low frequency (<150MHz) performance. However, the designer needs to be sure that the impedance presented at low frequency will not create instability. Please note that a number of DNC pins are connected on the demo board. These connections are not necessary for normal circuit operation. Exposed Pad and Ground Plane Considerations As with any RF device, minimizing ground inductance is critical. Care should be taken with board layouts using these exposed pad packages. The maximum allowable number of minimum diameter via holes should be placed underneath the exposed pad and connect to as many ground plane layers as possible. This will provide good RF ground and low thermal impedance. Maximizing the copper ground plane will also improve heat spreading and lower inductance. It is a good idea to cover the via holes with a solder mask on the backside of the PCB to prevent the solder from wicking away from the critical PCB to the exposed pad interface. The LTC6431-15 is a wide bandwidth part, but it is not intended for operation down to DC. The lower frequency cutoff (20MHz) is limited by on-chip matching elements. 643115f 12 LTC6431-15 Applications Information 5 4 6 C17 1000pF 1 DATE 08-18-11 CAL OUT 2 4 6 8 3 5 7 C7 VCC 1000pF C8 62pF 1 SMA-R JP2 HD2X4-100 OPT VCC R2 348 C 3 4 5 6 7 8 9 10 DNC 21 DNC 20 DNC 19 U1 *1 +OUT 18 GND 17 DNC 2 DNC 3 DNC C21 1000pF J10 C3 1000pF * +OUT SMA-R GND 14 DNC 13 6 DNC DNC 25 7 C22 0.1uF T_DIODE 16 DNC 15 4 DNC 5 DNC 11 12 L1 560nH VCC DNC 2 DNC 1 DNC JP1 HD2X6-100 OPT L11 OPT 1008 J11 12 SMA-R VCC C1 1000pF R6 348 11 J7 +IN C C13 1000pF APPROVED JOHN C. D 10 4 PRODUCTION J6 +IN 24 GND 23 VCC 22 3 E6 DESCRIPTION 3 5 GND GND 2 REVISION HISTORY SEE BOM 4 C19 1000pF C18 1000pF C12 62pF REV T2 9 GND R5 348 6 5 J18 1 __ C16 1000pF GND SMA-R C10 62pF 8 SEE BOM 1 D C11 1000pF T1 J5 2 ECO OPTIONAL CIRCUIT CAL IN 3 B E3 2 4 6 8 3 5 7 C20 1000pF 1 VCC B +5V +5V JP3 HD2X4-100 OPT NOTE: UNLESS OTHERWISE SPECIFIED 1. ALL RESISTORS ARE IN OHMS, 0402. ALL CAPACITORS ARE 0402. A * ASSY -C U1 LTC6431IUF-15 FREQ. 100-1200 MHz CUSTOMER NOTICE T3, T4 OPT R3, R4 OPT R13,R14,R17,R18 0 OHM J8 OPT J10 STUFF LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 4 APPROVALS PCB DES. KIM T. APP ENG. JOHN C. TECHNOLOGY TITLE: SCHEMATIC SIZE N/A SCALE = NONE 3 2 DATE: 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only IF AMP/ADC DRIVER IC NO. LTC643XIUF FAMILY DEMO CIRCUIT 1774A Monday, June 25, 2012 A REV. 1 SHEET 1 OF 1 1 Figure 2. DC1774A-C Demo Board Schematic 643115 F03 Figure 3. Demo Board 643115f 13 LTC6431-15 S Parameters 5V, 90mA, Z = 50Ω, T = 25°C, De-Embedded to Package Pins FREQUENCY (MHz) S11 (Mag) S11 (Ph) S21 (Mag) S21 (Ph) S12 (Mag) S12 (Ph) S22 (Mag) S22 (Ph) GTU (Max) Stability (K) 23.5 –14.90 –93.74 15.94 166.13 –19.01 8.83 –15.39 –77.56 16.21 0.99 83.5 –21.83 –128.88 15.54 169.51 –18.92 –3.42 –26.58 –72.76 15.58 1.07 143 –22.33 –142.38 15.54 166.10 –18.98 –8.97 –31.71 –52.44 15.57 1.07 203 –22.14 –153.70 15.54 161.63 –19.04 –13.69 –36.22 –29.74 15.57 1.08 263 –21.88 –162.35 15.52 156.90 –19.10 –18.05 –36.75 –13.45 15.55 1.08 323 –21.02 –168.55 15.49 152.16 –19.15 –22.46 –35.10 –3.73 15.52 1.08 383 –20.39 –172.14 15.42 147.41 –19.23 –26.61 –31.62 0.84 15.46 1.09 443 –19.55 –175.07 15.41 142.91 –19.29 –30.83 –29.46 –1.01 15.46 1.09 503 –18.88 –177.54 15.37 138.07 –19.37 –34.91 –26.62 –2.90 15.44 1.09 563 –18.39 179.31 15.35 133.30 –19.44 –39.04 –25.06 –7.32 15.43 1.09 623 –18.02 175.72 15.32 128.48 –19.53 –43.16 –23.84 –14.68 15.41 1.10 683 –17.70 171.89 15.29 123.64 –19.61 –47.19 –22.46 –23.42 15.39 1.10 743 –17.37 168.02 15.26 118.80 –19.71 –51.39 –21.37 –30.32 15.37 1.10 803 –17.06 164.02 15.20 113.94 –19.82 –55.31 –20.17 –37.91 15.33 1.11 863 –16.73 160.39 15.17 109.07 –19.92 –59.53 –19.13 –44.68 15.31 1.11 923 –16.35 156.50 15.12 104.20 –20.04 –63.43 –18.11 –50.82 15.29 1.11 983 –16.05 152.86 15.07 99.34 –20.16 –67.53 –17.31 –57.37 15.26 1.12 1049 –15.76 149.53 15.02 94.39 –20.29 –71.52 –16.51 –63.98 15.24 1.12 1109 –15.51 146.42 14.98 89.31 –20.42 –75.48 –15.82 –70.79 15.22 1.13 1160 –15.29 143.29 14.90 84.36 –20.55 –79.56 –15.22 –78.18 15.16 1.13 1220 –15.13 141.27 14.87 79.21 –20.70 –83.45 –14.56 –85.99 15.16 1.14 1280 –14.93 138.82 14.80 74.05 –20.84 –87.50 –13.94 –93.89 15.12 1.14 1340 –14.75 137.08 14.72 69.04 –21.01 –91.46 –13.37 –101.73 15.07 1.15 1400 –14.52 135.84 14.67 63.48 –21.14 –95.38 –12.79 –109.91 15.06 1.16 1460 –14.26 134.03 14.55 58.17 –21.34 –99.38 –12.27 –117.55 14.98 1.17 1520 –13.88 132.68 14.43 52.80 –21.47 –103.25 –11.71 –125.53 14.91 1.18 1580 –13.48 130.52 14.27 47.38 –21.63 –107.46 –11.24 –134.17 14.80 1.19 1640 –13.07 128.54 14.06 42.05 –21.83 –111.37 –10.62 –142.12 14.67 1.20 1700 –12.67 126.19 13.82 37.06 –22.01 –115.95 –10.07 –150.09 14.51 1.22 1760 –12.21 123.77 13.60 32.36 –22.30 –119.76 –9.51 –158.23 14.39 1.24 1820 –11.77 120.88 13.31 27.42 –22.49 –123.59 –9.02 –165.81 14.19 1.26 1880 –11.38 117.51 13.02 23.82 –22.74 –127.66 –8.65 –172.96 13.98 1.29 1940 –10.95 114.44 12.83 19.28 –23.04 –131.54 –8.28 179.92 13.89 1.31 2000 –10.57 110.59 12.51 15.92 –23.17 –134.66 –7.97 172.64 13.66 1.34 2060 –10.19 106.94 12.46 12.13 –23.59 –139.47 –7.71 166.43 13.71 1.36 2120 –9.78 103.11 12.20 7.92 –23.73 –141.66 –7.49 159.51 13.53 1.38 2180 –9.44 99.15 12.20 4.71 –23.99 –146.81 –7.32 153.38 13.62 1.39 2240 –9.02 95.22 12.10 –0.60 –24.32 –149.09 –7.17 146.92 13.60 1.41 2300 –8.67 91.22 12.07 –5.36 –24.53 –152.92 –7.05 140.33 13.66 1.41 643115f 14 LTC6431-15 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UF Package 24-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1697 Rev B) 0.70 ±0.05 4.50 ±0.05 2.45 ±0.05 3.10 ±0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 4.00 ±0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD R = 0.115 TYP 0.75 ±0.05 PIN 1 NOTCH R = 0.20 TYP OR 0.35 × 45° CHAMFER 23 24 PIN 1 TOP MARK (NOTE 6) 0.40 ±0.10 1 2 2.45 ±0.10 (4-SIDES) (UF24) QFN 0105 REV B 0.200 REF 0.00 – 0.05 0.25 ±0.05 0.50 BSC NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 643115f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC6431-15 Typical Application VCC = 5V RSOURCE 50Ω 0.1µF 5V RF CHOKE, L = 560nH 9, 22 C = 1000pF 24 LTC6431-15 1000pF C =1000pF 18 RLOAD 50Ω 8, 17, 23, 25 643115 TA02 Related Parts PART NUMBER DESCRIPTION COMMENTS Fixed Gain IF Amplifiers/ADC Drivers LTC6417 1.6GHz Low Noise High Linearity Differential Buffer/ ADC Driver OIP3 = 41dBm at 300MHz; Can Drive 50Ω Differential Output; High Speed Voltage Clamping Protects Subsequent Circuitry LTC6416 2GHz, 16-Bit Differential ADC Buffer –72dBc IM2 at 300MHz 2VP-P Composite; IS = 42mA; eN = 2.8nV/√Hz; A V = 0dB; 300MHz LTC6410-6 1.4GHz Differential IF Amplifier with Configurable Input Impedance OIP3 = 36dBm at 70MHz; Flexible Interface to Mixer IF Port LTC6400-8/LTC6400-14/ LTC6400-20/LTC6400-26 1.8GHz Low Noise, Low Distortion Differential ADC Drivers –71dBc IM3 at 240MHz 2VP-P Composite; IS = 90mA; A V = 8dB/ 14dB/ 20dB/ 26dB LTC6420-20 Dual 1.8GHz Low Noise, Low Distortion Differential ADC Drivers Dual Version of the LTC6400-20; A V = 20dB LT1993-2/LT1993-4/ LT1993-10 800MHz Differential Amplifier/ADC Drivers –72dBc IM3 at 70MHz 2VP-P Composite; A V = 2V/V, 4V/V, 10V/V Variable Gain IF Amplifiers/ADC Drivers LTC6412 800MHz, 31dB Range Analog-Controlled VGA OIP3 = 35dBm at 240MHz; Continuously Adjustable Gain Control Baseband Differential Amplifiers LT6411 Low Power Differential ADC Driver/Dual Selectable Gain Amplifier –83dBc IM3 at 70MHz 2VP-P Composite; A V = 1, –1 or 2; 16mA; Excellent for Single-Ended to Differential Conversion LTC6406 3GHz Rail-to-Rail Input Differential Amplifier/ ADC Driver –65dBc IM3 at 50MHz 2VP-P Composite; Rail-to-Rail Inputs; eN = 1.6nV/√Hz; 18mA LTC6404-1/LTC6404-2 Low Noise Rail-to-Rail Output Differential Amplifier/ ADC Driver 16-Bit SNR, SFDR at 10MHz; Rail-to-Rail Outputs; eN = 1.5nV/√Hz; LTC6404-1 Is Unity-Gain Stable, LTC6404-2 Is Gain-of-Two Stable LTC6403-1 Low Noise Rail-to-Rail Output Differential 16-Bit SNR, SFDR at 3MHz; Rail-to-Rail Outputs; eN = 2.8nV/√Hz LT1994 Low Noise, Low Distortion Differential Amplifier/ADC Driver 16-Bit SNR, SFDR at 1MHz; Rail-to-Rail Outputs LTC2208/LTC2209 16-Bit, 130Msps/160Msps ADCs 78dBFS/77dBFS Noise Floor, 100dB SFDR, 2.25VP-P or 1.5VP-P Input Range LTC2259-16 16-Bit, 80Msps, 1.8V ADC 89mW, 73.1dB SNR, 88dB SFDR, 1VP-P to 2VP-P Input Range LTC2160/LTC2161/ LTC2162/LTC2163/ LTC2164/LTC2165 16-Bit, 25Msps/40Msps/65Msps/80Msps/105Msps/ 125Msps, 1.8V ADCs 77dB SNR, 90dB SFDR, 1VP-P to 2VP-P Input Range High Speed ADCs LTC2150-14/LTC2151-14/ 14-Bit, 170Msps/210Msps/250Msps/310Msps, 1.8V ADCs LTC2152-14/LTC2153-14 Single ADCs, >68dB SNR, >88dB SFDR, 1.32VP-P Input Range LTC2155-14/LTC2156-14/ 14-Bit, 170Msps/210Msps/250Msps/310Msps, 1.8V ADCs LTC2157-14/LTC2158-14 Dual ADCs, >68dB SNR, >88dB SFDR, 1.32VP-P Input Range 643115f 16 Linear Technology Corporation LT 0712 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2012