Ordering number : EN6804A
Monolithic Linear IC
LA75503V
For PAL TV/VCR Adjustment Free
VIF/SIF Signal Processing IC
Overview
The LA75503V is an adjustment free VIF/SIF signal processing IC for PAL TV/VCR. It supports 38MHz, 38.9MHz, and
39.5MHz as the IF frequencies, as well as PAL sound multi-system (M/N, B/G, I, D/K), and contains an on-chip sound
carrier trap and sound carrier BPF. To adjust the VCO circuit, AFT circuit, and sound filter, 4MHz external crystal or
4MHz external signal is needed.
Features
• Internal VCO adjustment free circuit eliminating need for VCO coil adjustments.
• Internal sound carrier BPF and sound carrier trap enable easy configuration of PAL sound multi-system at low cost.
• Considerably reduces the number of required peripheral parts.
• Use of digital AFT eliminates problem of AFT tolerance.
• Package: SSOP30 (275 mil)
Functions
• VIF amplifier
• VCO adjustment free PLL detection circuit
• Digital AFT circuit
• RF AGC
• Buzz canceller
• Equalizer amplifier
• Internal sound carrier BPF
• Internal sound carrier trap
• PLL-FM detector
• Reference oscillation circuit
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
N1407 MS B8-5611 / 41301RM (OT) No.6804-1/15
LA75503V
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Circuit voltage
Circuit current
Symbol
Conditions
Ratings
Unit
VCC max
7
V
V16
VCC
V
V18
VCC
I30
-1
mA
I17
+0.5
mA
I6
-10
mA
I4
Allowable power dissipation
Pd max
Ta ≤ 75°C *
V
-3
mA
550
mW
Operating temperature
Topr
-20 to 70
°C
Storage temperature
Tstg
-55 to +150
°C
* Mounted on a printed circuit board: 65mm ¯ 72mm ¯ 1.6mm, paper phenol.
Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage
Operating voltage range
Symbol
Conditions
Ratings
Unit
VCC
VCC op
5
V
4.5 to 5.5
V
Electrical Characteristics at Ta = 25°C, VCC = 5.0V, fp = 38.9MHz
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
VIF Block
Circuit current
I17
Maximum RF AGC voltage
V14H
Minimum RF AGC voltage
V14L
Input sensitivity
AGC range
64.0
Collector load 30kΩ VC2 = 9 V
8.5
Vi
33
73.6
mA
0.3
0.7
V
39
45
dBµV
9
V
GR
58
Vi max
92
97
No-signal video output voltage
V4
3.3
3.6
3.9
Synchronizing signal tip voltage
Maximum allowable input
dB
dBµV
V
V4tip
1.0
1.3
1.6
V
Video output level
VO
1.7
2.0
2.3
Vp-p
Video signal-to-noise ratio
S/N
B/G
48
52
C-S beating
IC-S
P/S = 10dB
26
32
38
Differential gain
DG
Vin = 80dBµ
3
10
%
Differential phase
DP
2
10
deg
Black noise threshold voltage
VBTH
0.7
Black noise clamp voltage
dB
dB
V
VBCL
1.8
VIF input resistance
Ri
2.5
3.0
kΩ
VIF input capacitance
Ci
3
6
pF
Maximum AFT voltage
V13H
4.3
4.7
5.0
V
Maximum AFT voltage
V13L
0
0.2
0.7
V
AFT tolerance 1
dfa1
f = 38.9MHz
±35
±70
kHz
AFT tolerance 2
dfa2
f = 38.0MHz
±35
±70
kHz
AFT tolerance 3
dfa3
f = 39.5MHz
±35
±70
kHz
40
80
120
mV/kHz
30
60
RL = 100kΩ // 100kΩ
V
AFT detection sensitivity
Sf
AFT dead zone
fda
APC pull-in range (U)
fpu
1.5
2.0
MHz
APC pull-in range (L)
fpl
1.5
2.0
MHz
VCO maximum frequency range (U)
dfu
1.5
2.0
NHz
VCO maximum frequency range (L)
dfl
1.5
2.0
MHz
VCO control sensitivity
β
2.0
4.0
8.0
kHz
kHz/mV
Continued on next page.
No.6804-2/15
LA75503V
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
N trap1 (4.75MHz)
NT1
wrt 1MHz
-30
-35
dB
N trap2 (5.25MHz)
NT2
wrt 1MHz
-19
-24
dB
BG trap1 (5.75MHz)
BT1
wrt 1MHz
-27
-32
dB
BG trap2 (6.1MHz)
BT2
wrt 1MHz
-20
-25
dB
BG trap3 (5.85MHz)
BT3
wrt 1MHz
-27
-32
dB
I trap1 (6.25MHz)
IT1
wrt 1MHz
-25
-30
dB
I trap2 (6.8MHz)
IT2
wrt 1MHz
-15
-20
dB
DK trap1 (6.75MHz)
DT1
wrt 1MHz
-25
-30
dB
Group delay 1 NTSC (3.0MHz)
Group delay 1-1 NTSC (3.5MHz)
Group delay 2 BG (4MHz)
Group delay 2-1 BG (4.4MHz)
Group delay 3 I (4MHz)
NGD1
wrt 1MHz
10
40
70
ns
NGD1-1
wrt 1MHz
70
120
170
ns
BGD2
wrt 1MHz
30
60
90
ns
BGD2-1
wrt 1MHz
100
150
200
ns
IGD3
wrt 1MHz
0
30
60
ns
Group delay 3-1 I (4.4MHz)
IGD3-1
wrt 1MHz
30
60
90
ns
Group delay 4 DK (4MHz)
DGD4
wrt 1MHz
0
15
30
ns
DGD4-1
wrt 1MHz
0
30
60
ns
26
32
38
dB
Group delay 4-1 DK (4.4MHz)
1st SIF Block
Conversion gain
SIF carrier output level
Vg
fp = 5.5MHz, Vi = 500µV
So
Vi = 10mV
100
so ±2dB
106
mVrms
First SIF maximum input
Si max
First SIF input resistance
Ris
5.0
6.0
dBµV
kΩ
First SIF input capacitance
Cis
3
6
pF
46
52
58
dBµV
560
700
850
mVrms
50
60
SIF Block
Limiting sensitivity
FM detector output voltage
Vi(lim)
fp = 5.5MHz, ∆F = ±30kHz at 400Hz
VO(FM)
AM rejection ratio
AMR
AM = 30% at 400Hz
Total harmonic distortion
THD
fp = 5.5MHz, ∆F = ±30kHz
FM detector output S/N
S/N(FM)
0.3
55
dB
1.0
%
60
dB
±100
kHz
PAL de-emphasis
Pdeem
fm = 3kHz
-3
dB
NTSC de-emphasis
Ndeem
fm = 2kHz
-3
dB
6
dB
BPF 3dB bandwidth
PAL/NT audio voltage gain difference
BW
GD
Others
4MHz level (during external input)
X4MIN
SIF system SW threshold voltage
V10, V11
IF system SW threshold resistance
V12
Split/inter SW
V16
Terminated
86
dBµ
1.4
V
270
0.5
kΩ
V
No.6804-3/15
LA75503V
Package Dimensions
unit : mm (typ)
3191B
9.75
0.5
5.6
7.6
16
30
1
15
0.65
0.15
0.22
1.5max
0.1
(1.3)
(0.33)
SANYO : SSOP30(275mil)
Pin Assignment
30 FM DET OUT
SIF INPUT 1
29 FM NOISE FILTER
FM FILTER 2
28 RF AGC VR
NC 3
27 SIF PLL FILTER
1st SIF OUT 4
26 NC
NC 5
25 FILTER CONTROL CAPACITOR
VIDEO DET OUT 6
SIF AGC FILTER 8
APC FILTER 9
LA75503V
EQ FILTER 7
FLL FILTER 10
24 VIF INPUT
23 VIF INPUT
22 GND
21 VCC
VCO COIL 11
20 1st SIF INPUT
VCO COIL 12
19 NC
SYSTEM SW [A] 13
18 IF AGC FILTER
SYSTEM SW [B] 14
17 RF AGC OUT
REF OSC 15
16 AFT OUT
Top view
No.6804-4/15
LA75503V
System Switch
Block Diagram and Test Circuit 1
No.6804-5/15
LA75503V
Test circuit 2
Input Impedance Measuring Circuit (VIF, First SIF input impedance)
Impedance analyzer
VIF INPUT
1st SIF INPUT
VCC
+
100µF
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
10
11
12
13
14
15
10kΩ
15kΩ
LA75503V
2
3
4
5
6
7
8
9
1kΩ
1
Top View
System Switching
• SIF system switch
The SIF system is switched by setting pins A (pin 13) and B (pin 14) to GND or OPEN.
A
B
GND
GND
GND
OPEN
OPEN
GND
OPEN
OPEN
B/G
I
D/K
M/N
FM DET LEVEL
De-emphasis
{
6dB
75µs
0dB
50µs
0dB
50µs
0dB
50µs
{
{
{
Note: "{" indicates that the system is selected.
• IF system switch
38.9MHz is selected as the IF frequency by leaving pin 15 (crystal oscillation) open. 38MHz is selected by adding
220kΩ between pin 15 and GND. This device can also select 39.5MHz operation by adding a 220kΩ resistor between
pin 15 and VCC.
• Split/inter carrier switch
Inter carrier is selected by setting the first SIF input (pin 20) to GND.
Sound Trap
The trapping point of the sound trap is set approximately 250kHz above the SIF center frequency of each mode to
improve the video S/N. Therefore, design using split specifications is preferable.
No.6804-6/15
LA75503V
Pin Function
Pin No.
Pin name
1
SIF INPUT
Pin function
Equivalent circuit
Inputs the SIF signal from the first SIF output.
Set the input level to 90dBµV or lower because of
the dynamic range of the internal filter.
2
FM FILTER
This is the FM feedback filter pin. It is composed
of a C and R filters.
1µF is normally used as the capacitance.
If the capacitance is a low value, the audio output
level is small at low frequencies.
Moreover, the audio output level can be made
smaller by increasing the resistance connected in
series.
Use a resistance of 3kΩ or higher.
3
NC
4
1st SIF OUT
Not connected.
This is the first SIF output.
In case of inter carrier, the chroma carrier is bigger
than split carrier applications, so that it is
recommended to connect a filter externally.
Filter example
5
NC
Not connected.
Continued on next page.
No.6804-7/15
LA75503V
Continued from preceding page.
Pin No.
Pin name
6
VIDEO-OUT
7
EQ-OUT
Pin function
Equivalent circuit
Pin 6 is the video output pin.
The EQ amplifier can be thought of as shown
below.
Therefore, the peak gain of the EQ amplifier is
determined by Av = 1 + R/Z.
However, note that the LA75503V being an IC
with VCC = 5V, setting too large an amplitude
causes distortion in the VCC side. Use so that the
white level is 4V or less.
8
SIF AGC FILTER
Pin 8 is the SIF AGC filter pin.
Use this pin with a capacitance between 0.01µF
and 0.1µF.
9
APC FILTER
Pin 9 is the PLL detector APC filter pin.
10
FLL FILTER
Normally the following are used:
R = 330Ω
C1 = 0.47µF to 1µF
C2 = 100pF
C1 = 1µF is effective for the over-modulation
characteristics.
When the PLL is locked, the signal passes via the
Time
constant switch
path marked A in the figure, and when PLL is
unlocked and in weak signal, the signal passes via
the path marked B in the figure. The PLL loop gain
Output
can thus be switched in this manner.
Pin 10 is a VCO automatic control FLL filter pin.
Since it operates always on a small current, using
a larger capacitance results in a slower response.
Normally, a capacitance between 0.47µF and 1
µF is used.
Moreover, the control range for this pin is between
about 3V to 4.7V. Since this range is determined
when adjusting the VCO tank circuit, set the
Output
design
center of L and C of VCO so that the voltage of pin
10 is 3.6 V.
Continued on next page.
No.6804-8/15
LA75503V
Continued from preceding page.
Pin No.
Pin name
Pin function
11
VCO COIL
This is the VCO tank circuit for the PLL detector.
12
Equivalent circuit
Use a tuning capacitance of 24pF.
Use L and C specifications that are accurate to
±2%. Also, design the L and C values so that the
voltage of pin 10 is 3.6V when PLL is locked while
using the IF center frequency.
13
SYSTEM SW [A]
This is the system switch pin.
14
SYSTEM SW [B]
The transistor turns ON when the pin voltage from
the circuit becomes approx. 1.4V.
15
REF OSC
This pin can be used both as the crystal resonator
pin and IF switch.
The 38MHz mode is selected by inserting 220kΩ
between pin 15 and GND, the 38.9MHz mode by
leaving the pin open, and the 39.5MHz mode by
inserting 220kΩ between pin 15 and VCC.
4MHz input is possible from this pin.
In the case of 4MHz external input, input 86dBµ
Continued on next page.
No.6804-9/15
LA75503V
Continued from preceding page.
Pin No.
Pin name
16
AFT OUT
Pin function
Equivalent circuit
Pin 16 is the AFT output pin.
Use external resistors of 47kΩ and a filter
capacitance 0.1µF.
The AFT circuit generates the AFT voltage by
comparing the signal obtained by dividing the
4MHz reference frequency with the signal
obtained by dividing VCO.
Since it uses a digital phase comparator, a dead
zone exists in the AFT center.
waveform
17
RF AGC OUT
Pin 17 is the RF AGC output.
RF AGC max is determined by R1 and R2.
RF AGC min is determined by R3 and R4.
Capacitor C1 prevents oscillation and capacitor
C2 is the RF AGC filter.
Normally 30kΩ is used for R1, but if the tuner's F/E
transistor is GaAS, the gate's impedance is lower,
Comparator
so use approx. 10kΩ.
18
IF AGC FILTER
Pin 18 is the IF AGC filter pin.
Normally, 0.01µF to 0.02 µF polyester film
capacitor is used.
Determine the impedance based on H-SAG and
AGC speed.
19
NC
Not connected.
Continued on next page.
No.6804-10/15
LA75503V
Continued from preceding page.
Pin No.
Pin name
20
1st SIF INPUT
Pin function
Equivalent circuit
Pin 20 can be used both as the First SIF IN and
inter/split switch pins.
In the case of inter carrier, connect pin 20 to GND.
When a sound saw filter is added, the matching
loss can be decreased by inserting L to neutralize
the IC input capacitance and saw filter output
capacitance.
21
VCC
Connect the decoupling capacitor as close as
possible.
22
GND
23
VIF INPUT
24
Pins 23 and 24 are VIF input pins.
To reduce the loss of signal through a saw filter,
input resistors are set to 2kΩ.
VIF amplifier has three capacitive coupling
amplifiers, direct connection from a saw filter is
available.
Continued on next page.
No.6804-11/15
LA75503V
Continued from preceding page.
Pin No.
Pin name
25
FILTER CONTROL
CAPACITOR
Pin function
Equivalent circuit
Internal filters (i.e. sound carrier BPF and sound
carrier trap) are tuned using the capacitor
connected to pin 25.
A value between 0.47µF and 1µF is considered
desirable taking video S/N, and AM and PM noise
into consideration.
26
NC
27
SIF PLL FILTER
Not connected.
Pin 27 is the SIF PLL filter pin.
Normally use the following values.
R: 3kΩ
C1: 0.01µF
C2: 1000pF
Small R value
Large R value
A large R value (6kΩ or lower) results in high-pass
FM detection output noise. A smaller R value
results in low-pass noise.
Continued on next page.
No.6804-12/15
LA75503V
Continued from preceding page.
Pin No.
Pin name
28
RF AGC VR
Pin function
Equivalent circuit
Pin 28 is the RF AGC VR pin.
When this pin is connected to GND, no signal is
appeared on pin 6 and pin 30.
output
29
FM FILTER
Pin 29 is the FM filter pin.
Use a capacitance between 0.01µF and 1µF.
30
FM DET OUT
Pin 30 is the FM output pin.
The built-in differential amplifier determines and
switches the de-emphasis resistance value.
PAL: 5kΩ ¯ 0.01µF
NT: 7.5kΩ ¯0.01µF
No.6804-13/15
LA75503V
Application Circuit Example
System Switch
AB
BG
I
DK
MN
GAIN
00
6 dB
01
0 dB
10
0 dB
11
0 dB
1: OPEN
0: GND
No.6804-14/15
LA75503V
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
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Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
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intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of November, 2007. Specifications and information herein are subject
to change without notice.
PS No.6804-15/15