Austin MT5C2564C-20/XT 64k x 4 sram sram memory array Datasheet

SRAM
MT5C2564
Austin Semiconductor, Inc.
64K x 4 SRAM
SRAM MEMORY ARRAY
PIN ASSIGNMENT
(Top View)
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-88681
• SMD 5962-88545
• MIL-STD-883
24-Pin DIP (C)
(300 MIL)
A1
A0
NC
Vcc
NC
28-Pin LCC (EC)
3 2 1 28 27
FEATURES
•
•
•
•
High Speed: 15, 20, 25, 35, 45, 55, and 70
Battery Backup: 2V data retention
Low power standby
High-performance, low-power, CMOS double-metal
process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
OPTIONS
MARKING
• Timing
15ns access
20ns access
25ns access
35ns access
45ns access
55ns access
70ns access
-15
-20
-25
-35
-45
-55*
-70*
• Package(s)
Ceramic DIP (300 mil)
Ceramic LCC
Ceramic Flatpack
C
EC
F
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
A15
A14
A13
A12
A11
A10
DQ4
DQ3
DQ2
DQ1
WE\
A2
A3
A4
A5
A6
A7
A8
A9
CE\
26
25
24
23
22
21
20
19
18
4
5
6
7
8
9
10
11
12
A15
A14
A13
A12
A11
A10
DQ4
DQ3
DQ2
13 14 15 16 17
DQ1
WE\
NC
Vss
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE\
Vss
28-Pin Flat Pack (F)
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE\
NC
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
A15
A14
A13
A12
A11
A10
NC
NC
DQ3
DQ2
DQ1
DQ0
WE\
No. 106
No. 204
GENERAL DESCRIPTION
• Operating Temperature Ranges
Industrial (-40oC to +85oC)
IT
Military (-55oC to +125oC)
XT
• 2V data retention/low power
The Austin Semiconductor SRAM family employs
high-speed, low-power CMOS and are fabricated using doublelayer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Austin Semiconductor offers chip enable (CE\) on all
organizations. This enhancement can place the outputs in
High-Z for additional flexibility in system design. The x4
configuration features common data input and output.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW. Reading is
accomplished when WE\ remains HIGH and CE\ goes LOW.
The device offers a reduced power standby mode when
disabled. This allows system designs to achieve low standby
power requirements.
These devices operate from a single +5V power
supply and all inputs and outputs are fully TTL compatible.
L
*Electrical characteristics identical to those provided for the 45ns
access devices.
For more products and information
please visit our web site at
www.austinsemiconductor.com
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
SRAM
MT5C2564
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM
VCC
GND
A0
A1
A4
A5
A13
I/O CONTROL
A3
DQ4
ROW DECODER
A2
262,144-BIT
MEMORY ARRAY
DQ1
A14
A15
CE\
COLUMN DECODER
WE\
A6
A7
A8
A9
A10
A11
A12
POWER
DOWN
TRUTH TABLE
MODE
STANDBY
READ
WRITE
MT5C2564
Rev. 3.1 6/05
CE\
H
L
L
WE\
X
H
L
DQ
HIGH-Z
Q
D
POWER
STANDBY
ACTIVE
ACTIVE
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
SRAM
MT5C2564
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
Voltage on Any Pin Relative to Vss..................................-0.5V to +7V
Voltage on Vcc Supply Relative to Vss.............................-0.5V to +7V
Storage Temperature......................................................-65oC to +150oC
Power Dissipation..............................................................................1W
Short Circuit Output Current.........................................................50mA
Lead Temperature (soldering 10 seconds)....................................+260oC
Junction Temperature..................................................................+175oC
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TC < 125oC; VCC = 5V +10%)
DESCRIPTION
Input High (Logic 1) Voltage
CONDITIONS
SYM
MIN
MAX
UNITS
NOTES
VIH
2.2
VCC+0.5
V
1
VIL
-0.5
0.8
V
1, 2
0V<VIN<VCC
ILI
-10
10
µA
Output(s) disabled
0V<VOUT<VCC
ILO
-10
10
µA
Output High Voltage
IOH=-4.0mA
VOH
2.4
Output Low Voltage
IOL=8.0mA
VOL
Input Low (Logic 0) Voltage
Input Leakage Current
Output Leakage Current
PARAMETER
Power Supply
Current: Operating
Power Supply
Current: Standby
CONDITIONS
CE\ < VIL; VCC = MAX
f = MAX = 1/tRC (MIN)
Output Open
0.4
V
1
V
1
SYM
-15
-20
MAX
-25
-35
-45
Icc
165
150
140
120
120
mA
ISBT2
45
45
40
25
25
mA
ISBC2
20
20
20
20
20
mA
ISBC2
4
4
4
4
4
mA
UNITS NOTES
3
CE\ > VIH; All Other Inputs
< VIL or > VIH, VCC = MAX
f = 0 Hz
CE\ > VCC -0.2V; VCC = MAX
VIL < VSS +0.2V
VIH > VCC -0.2V; f = 0 Hz
"L" Version Only
CAPACITANCE
DESCRIPTION
Input Capacitance
Output Capacitance
MT5C2564
Rev. 3.1 6/05
CONDITIONS
o
TA = 25 C, f = 1MHz
VCC = 5V
SYM
MAX
UNITS
NOTES
CI
10
pF
4
CO
12
pF
4
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
SRAM
MT5C2564
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55oC < TC < 125oC; VCC = 5V +10%)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip Enable access time
Output hold from address change
Chip Enable to output in Low-Z
Chip disable to output in High-Z
Chip Enable to power-up time
Chip disable to power-down time
WRITE CYCLE
WRITE cycle time
Chip Enable to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-Z
Write Enable to output in High-Z
MT5C2564
Rev. 3.1 6/05
-15
-20
-25
-35
-45
SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
tRC
tAA
tACE
tOH
tLZCE
tHZCE
tPU
tPD
15
tWC
tCW
tAW
tAS
tAH
tWP
tDS
tDH
15
12
12
0
2
12
7
0
0
0
tLZWE
tHZWE
20
15
15
3
3
25
20
20
3
3
8
0
3
3
10
0
15
7
3
3
0
10
11
7
6, 7
4
4
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
6, 7
3
3
0
20
0
35
35
30
30
0
5
30
20
0
0
0
45
ns
ns
ns
ns
ns
ns
ns
ns
45
45
20
25
25
18
18
0
2
17
12
0
0
0
45
35
35
10
20
20
15
15
0
2
15
10
0
0
0
35
25
25
20
45
40
40
0
5
40
20
0
0
0
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
SRAM
MT5C2564
Austin Semiconductor, Inc.
AC TEST CONDITIONS
Input pulse levels ...................................... Vss to 3.0V
Input rise and fall times ......................................... 5ns
Input timing reference levels ................................ 1.5V
Output reference levels ....................................... 1.5V
Output load ................................. See Figures 1 and 2
167Ω
Q
30pF
167Ω
VTH = 1.73V Q
Fig. 2 Output Load
Equivalent
Fig. 1 Output Load
Equivalent
allowing for actual tester RC time constant.
At any given temperature and voltage condition,
tHZCE is less than tLZCE, and tHZWE is less than tLZWE and
tHZOE is less than tLZOE.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip enable is held in
its active state.
10. Address valid prior to, or coincident with, latest
occurring chip enable.
11. tRC = Read Cycle Time.
12. Chip enable (CE\) and write enable (WE\) can initiate and
terminate a WRITE cycle.
NOTES
1.
2.
3.
4.
5.
6.
VTH = 1.73V
5pF
7.
All voltages referenced to VSS (GND).
-3V for pulse width < 20ns
ICC is dependent on output loading and cycle rates.
The specified value applies with the outputs
unloaded, and f =
1
Hz.
t
RC (MIN)
This parameter is guaranteed but not tested.
Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
tLZCE, tLZWE, tLZOE, tHZCE, tHZOE and tHZWE are
specified with CL = 5pF as in Fig. 2. Transition is
measured ±200mV typical from steady state voltage,
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
DESCRIPTION
VCC for Retention Data
CONDITIONS
Data Retention Current
CE\ > (VCC - 0.2V)
VCC = 2V
VIN > (VCC - 0.2V)
or < 0.2V
VCC = 3V
Chip Deselect to Data
Retention Time
Operation Recovery Time
SYM
MIN
MAX
UNITS
VDR
2
---
V
1
mA
2
mA
---
ns
4
ns
4, 11
ICCDR
tCDR
0
tR
tRC
NOTES
LOW Vcc DATA RETENTION WAVEFORM
DATA RETENTION MODE
VCC
CE\
4.5V
VIH
VIL
1234
12345678
123
12345678
123
1234
12345678
123
1234
12345678
123
1234
VDR > 2V
t CDR
4.5V
tR
V DR
12345678
1234
12
12345678
1234
12
12345678
1234
12
12345678
1234
12
123
123
123
123 DON’T CARE
1234
1234
1234
1234UNDEFINED
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
SRAM
MT5C2564
Austin Semiconductor, Inc.
READ CYCLE NO. 1 8, 9
ttRC
RC
ADDRESS
VALID
ttAA
AA
ttOH
OH
DQ
PREVIOUS DATA VALID
DATA VALID
READ CYCLE NO. 2
7, 8, 10
ttRC
RC
CE\
ttLZCE
LZCE
tACE
tACE
t
HZCE
tHZCE
DQ
DATA VALID
ttPU
PU
ttPD
PD
Icc
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
SRAM
MT5C2564
Austin Semiconductor, Inc.
WRITE CYCLE NO. 1 12
(Chip Enabled Controlled)
t
WC
tWC
ADDRESS
tAW
tAW
ttAS
AS
t
AH
tAH
tCW
tCW
CE\
t WP
tWP1
123456789012345678901
1
1
WE\ 123456789012345678901
1123456789012345678901234567890121234567890
1123456789012345678901234567890121234567890
t DH
tDH
ttDS
DS
D
DATA VAILD
Q
HIGH Z
WRITE CYCLE NO. 2 7, 12
(Write Enabled Controlled)
tWC
tWC
ADDRESS
tAW
tAW
12345678901234567
12
12
12345678901234567
12345678901234567
121
CE\
ttAS
AS
WE\
ttAH
AH
tCW
tCW
12345678901234567890123
1
1212345678901234567890123
112345678901234567890123
t WP
tWP1
123456789
123456789
123456789
tDS
1234567890123456
11234
1 tHZWE
1234567890123456
11234
1
11234
1
Q 1234567890123456
11234
1
1234567890123456
D
DATA VALID
HIGH-Z
t DH
tDH
12123456
1
tLZWE1234
1234
12123456
1
1234
12123456
1
1234
12123456
1
123
123 DON’T CARE
123
1234
1234
1234
1234 UNDEFINED
NOTE: Output enable (OE\) is inactive (HIGH).
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
SRAM
MT5C2564
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #106 (Package Designator C)
SMD #5962-88681, Case Outline L
D
A
Q
L
Pin 1
S1
e
b
b2
E
NOTE
0o to 15o
c
eA
SMD SPECIFICATIONS
MIN
MAX
SYMBOL
A
--0.200
b
0.014
0.026
b2
0.045
0.065
c
0.008
0.018
D
--1.280
E
0.220
0.310
eA
0.300 BSC
e
0.100 BSC
L
0.125
0.200
Q
0.015
0.060
S1
0.005
--NOTE: These dimensions are per the SMD. ASI's package dimensional limits
may differ, but they will be within the SMD limits.
*All measurements are in inches.
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
SRAM
MT5C2564
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #204 (Package Designator EC)
SMD# 5962-88681, Case Outline X
D1
B2
D2
L2
e
E3
E
E1
E2
h x 45o
D
L
hx45o
B1
D3
A
A1
SYMBOL
A
A1
B1
B2
D
D1
D2
D3
E
E1
E2
E3
e
h
L
L2
SMD SPECIFICATIONS
MIN
MAX
0.060
0.120
0.050
0.088
0.022
0.028
0.072 REF
0.342
0.358
0.200 BSC
0.100 BSC
--0.358
0.540
0.560
0.400 BSC
0.200 BSC
--0.558
0.050 BSC
0.040 REF
0.045
0.055
0.075
0.095
NOTE: These dimensions are per the SMD. ASI's package dimensional limits
may differ, but they will be within the SMD limits.
*All measurements are in inches.
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
SRAM
MT5C2564
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case (Package Designator F)
SMD 5962-88681 & 5962-88545, Case Outline Y
e
b
D
S
Top View
E
L
A
c
Q
E2
E3
SYMBOL
A
b
c
D
E
E2
E3
e
L
Q
S
SMD SPECIFICATIONS
MIN
MAX
0.090
0.130
0.015
0.022
0.004
0.009
--0.740
0.380
0.420
0.180
--0.030
--0.050 BSC
0.250
0.370
0.026
0.045
0.000
---
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
* All measurements are in inches.
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
SRAM
MT5C2564
Austin Semiconductor, Inc.
ORDERING INFORMATION
EXAMPLE: MT5C2564EC-45/XT
EXAMPLE: MT5C2564C-20L/IT
Device
Number
Package Speed
Options** Process
Type
ns
Device
Number
Package Speed
Options** Process
Type
ns
MT5C2564
C
-15
L
/*
MT5C2564
EC
-15
L
/*
MT5C2564
C
-20
L
/*
MT5C2564
EC
-20
L
/*
MT5C2564
C
-25
L
/*
MT5C2564
EC
-25
L
/*
MT5C2564
C
-35
L
/*
MT5C2564
EC
-35
L
/*
MT5C2564
C
-40
L
/*
MT5C2564
EC
-40
L
/*
MT5C2564
C
-55
L
/*
MT5C2564
EC
-55
L
/*
MT5C2564
C
-70
L
/*
MT5C2564
EC
-70
L
/*
EXAMPLE: MT5C2564F-35/883C
Device
Number
Package Speed
Options** Process
ns
Type
MT5C2564
F
-15
L
/*
MT5C2564
F
-20
L
/*
MT5C2564
F
-25
L
/*
MT5C2564
F
-35
L
/*
MT5C2564
F
-40
L
/*
MT5C2564
F
-55
L
/*
MT5C2564
F
-70
L
/*
*AVAILABLE PROCESSES
IT = Industrial Temperature Range
XT = Extended Temperature Range
883C = Full Military Processing
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
** OPTIONS
L = 2V Data Retention/Low Power
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
SRAM
Austin Semiconductor, Inc.
MT5C2564
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
ASI Package Designator C
ASI Package Designator EC
ASI Part #
MT5C2564C-20/883C
MT5C2564C-25/883C
MT5C2564C-35/883C
MT5C2564C-45/883C
MT5C2564C-55/883C
MT5C2564C-70/883C
SMD Part #
5962-8868106LA
5962-8868105LA
5962-8868101LA
5962-8868102LA
5962-8868103LA
5962-8868104LA
ASI Part #
MT5C2564EC-20/883C
MT5C2564EC-25/883C
MT5C2564EC-35/883C
MT5C2564EC-45/883C
MT5C2564EC-55/883C
MT5C2564EC-70/883C
SMD Part #
5962-8868106XA
5962-8868105XA
5962-8868101XA
5962-8868102XA
5962-8868103XA
5962-8868104XA
MT5C2564C-35L/883C
MT5C2564C-45L/883C
MT5C2564C-55L/883C
MT5C2564C-70L/883C
5962-8854501LA
5962-8854502LA
5962-8854503LA
5962-8854504LA
MT5C2564EC-35L/883C
MT5C2564EC-45L/883C
MT5C2564EC-55L/883C
MT5C2564EC-70L/883C
5962-8854501XA
5962-8854502XA
5962-8854503XA
5962-8854504XA
ASI Package Designator F
ASI Part #
MT5C2564F-20/883C
MT5C2564F-25/883C
MT5C2564F-35/883C
MT5C2564F-45/883C
MT5C2564F-55/883C
MT5C2564F-70/883C
SMD Part #
5962-8868106YA
5962-8868105YA
5962-8868101YA
5962-8868102YA
5962-8868103YA
5962-8868104YA
MT5C2564F-35L/883C
MT5C2564F-45L/883C
MT5C2564F-55L/883C
MT5C2564F-70L/883C
5962-8854501YA
5962-8854502YA
5962-8854503YA
5962-8854504YA
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
MT5C2564
Rev. 3.1 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
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