Product Folder Order Now Technical Documents Support & Community Tools & Software DRV8871-Q1 SLVSDH4 – MARCH 2017 DRV8871-Q1 3.6-A Brushed DC Motor Driver With Internal Current Sense (PWM Control) 1 Features 3 Description • • The DRV8871-Q1 device is a brushed-DC motor driver for printers, appliances, industrial equipment, and other small machines. Two logic inputs control the H-bridge driver, which consists of four N-channel MOSFETs that can control motors bidirectionally with up to 3.6-A peak current. The inputs can be pulsewidth modulated (PWM) to control motor speed, using a choice of current-decay modes. Setting both inputs low enters a low-power sleep mode. 1 • • • • • • • • • Qualified for Automotive Applications AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C4B H-Bridge Motor Driver – Drives One DC Motor, One Winding of a Stepper Motor, or Other Loads Wide 6.8-V to 45-V Operating Voltage 565-mΩ Typical RDS(on) (HS + LS) 3.6-A Peak Current Drive PWM Control Interface Current Regulation Without a Sense Resistor Low-Power Sleep Mode Small Package and Footprint – 8-Pin HSOP With PowerPAD™ – 4.9 × 6 mm Integrated Protection Features – VM Undervoltage Lockout (UVLO) – Overcurrent Protection (OCP) – Thermal Shutdown (TSD) – Automatic Fault Recovery The DRV8871-Q1 device has advanced currentregulation circuitry that does not use an analog voltage reference or external sense resistor. This novel solution uses a standard low-cost, low-power resistor to set the current threshold. The ability to limit current to a known level can significantly reduce the system power requirements and bulk capacitance needed to maintain stable voltage, especially for motor startup and stall conditions. The device is fully protected from faults and short circuits, including undervoltage (UVLO), overcurrent (OCP), and overtemperature (TSD). When the fault condition is removed, the device automatically resumes normal operation. Device Information PART NUMBER DRV8871-Q1 PACKAGE HSOP (8) (1) BODY SIZE (NOM) 4.90 mm × 6.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 2 Applications • • • • Automotive Infotainment HUD Projector Adjustment Motorized Shifter Knobs On-board chargers Peak Current Regulation Simplified Schematic 6.8 to 45 V DRV8871-Q1 IN1 Controller IN2 ILIM 3.6 A Brushed DC Motor Driver BDC Current Sense and Regulation Fault Protection Copyright © 2017, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DRV8871-Q1 SLVSDH4 – MARCH 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 6.1 6.2 6.3 6.4 6.5 6.6 3 3 4 4 5 6 9 Power Supply Recommendations...................... 14 9.1 Bulk Capacitance .................................................... 14 10 Layout................................................................... 15 10.1 10.2 10.3 10.4 Layout Guidelines ................................................. Layout Example .................................................... Thermal Considerations ........................................ Power Dissipation ................................................. 15 15 15 15 11 Device and Documentation Support ................. 17 11.1 11.2 11.3 11.4 11.5 11.6 Detailed Description .............................................. 7 7.1 7.2 7.3 7.4 8 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. 8.1 Application Information............................................ 11 8.2 Typical Application ................................................. 11 Overview ................................................................... 7 Functional Block Diagram ......................................... 7 Feature Description................................................... 8 Device Functional Modes........................................ 10 Documentation Support ........................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 17 17 17 17 17 17 12 Mechanical, Packaging, and Orderable Information ........................................................... 17 Application and Implementation ........................ 11 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 2 DATE REVISION NOTES March 2017 * Initial release. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com SLVSDH4 – MARCH 2017 5 Pin Configuration and Functions DDA Package 8-Pin HSOP Top View GND 1 IN2 2 IN1 3 ILIM 4 Thermal Pad 8 OUT2 7 PGND 6 OUT1 5 VM Pin Functions PIN NAME NO. TYPE DESCRIPTION GND 1 PWR Logic ground Connect to board ground ILIM 4 I Current limit control Connect a resistor to ground to set the current chopping threshold IN1 3 IN2 2 I Logic inputs Controls the H-bridge output. Has internal pulldowns (see Table 1). OUT1 6 OUT2 8 O H-bridge output Connect directly to the motor or other inductive load. PGND 7 PWR High-current ground path Connect to board ground. 6.8-V to 45-V power supply Connect a 0.1-µF bypass capacitor to ground, as well as sufficient bulk capacitance, rated for the VM voltage. Thermal pad Connect to board ground. For good thermal dissipation, use large ground planes on multiple layers, and multiple nearby vias connecting those planes. VM 5 PWR PAD — — 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Power supply voltage (VM) –0.3 50 V Logic input voltage (IN1, IN2) –0.3 7 V Continuous phase node pin voltage (OUT1, OUT2) –0.7 VM + 0.7 V Current sense input pin voltage (ISEN) (2) –0.5 1 V 0 3.5 A Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C Output current (100% duty cycle) (1) (2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Transients of ±1 V for less than 25 ns are acceptable 6.2 ESD Ratings VALUE Human-body model (HBM), per AEC Q100-002 (1) V(ESD) (1) Electrostatic discharge Charged-device model (CDM), per AEC Q100-011 UNIT ±2000 All pins ±500 Corner pins (1, 4, 5, and 8) ±750 V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 3 DRV8871-Q1 SLVSDH4 – MARCH 2017 www.ti.com 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VM Power supply voltage 6.8 45 VI Logic input voltage (IN1, IN2) 0 5.5 fPWM Logic input PWM frequency (IN1, IN2) 0 200 (1) Ipeak Peak output current (2) 0 3.6 A –40 125 °C TA (1) (2) Operating ambient temperature (2) V V kHz The voltages applied to the inputs should have at least 800 ns of pulse width to ensure detection. Typical devices require at least 400 ns. If the PWM frequency is 200 kHz, the usable duty cycle range is 16% to 84%. Power dissipation and thermal limits must be observed 6.4 Thermal Information DRV8871-Q1 THERMAL METRIC (1) DDA (HSOP) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 41.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 53.7 °C/W RθJB Junction-to-board thermal resistance 12.4 °C/W ψJT Junction-to-top characterization parameter 3 °C/W ψJB Junction-to-board characterization parameter 12.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 2.6 °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com SLVSDH4 – MARCH 2017 6.5 Electrical Characteristics Over recommended operating conditions unless otherwise noted. Typical limits apply for TA = 25°C and VVM = 24 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY (VM) VM VM operating voltage IVM VM operating supply current IVMSLEEP tON (1) 6.8 3 VM sleep current VM = 12 V Turnon time VM > VUVLO with IN1 or IN2 high 40 45 V 10 mA 13 µA 50 µs 0.5 V LOGIC-LEVEL INPUTS (IN1, IN2) VIL Input logic-low voltage VIH Input logic-high voltage VHYS Input logic hysteresis IIL Input logic-low current VIN = 0 V IIH Input logic-high current VIN = 3.3 V RPD Pulldown resistance To GND 100 tPD Propagation delay INx to OUTx change (see Figure 6) 0.7 1 μs tsleep Time to sleep Inputs low to sleep 1 1.5 ms 1.6 V 0.5 –1 V 1 33 μA 100 μA kΩ MOTOR DRIVER OUTPUTS (OUT1, OUT2) RDS(ON) High-side FET on resistance VM = 24 V, I = 1 A, fPWM = 25 kHz 307 610 mΩ RDS(ON) Low-side FET on resistance VM = 24 V, I = 1 A, fPWM = 25 kHz 258 500 mΩ tDEAD Output dead time Vd Body diode forward voltage 250 IOUT = 1 A ns 0.8 1 V 64 69 kV CURRENT REGULATION VILIM Constant for calculating current regulation (see Equation 1) tOFF PWM off-time tBLANK PWM blanking time VM = 24 V, IOUT = 1 A 59 25 µs 2 µs PROTECTION CIRCUITS VM falls until UVLO triggers 6.3 6.5 VM rises until operation recovers 6.4 6.7 Rising to falling threshold 180 VUVLO VM undervoltage lockout VUV,HYS VM undervoltage hysteresis IOCP Overcurrent protection trip level tOCP Overcurrent deglitch time 2 μs tRETRY Overcurrent retry time 3 ms TSD Thermal shutdown temperature 180 °C THYS Thermal shutdown hysteresis 40 °C (1) 3.7 155 4.5 V mV 6.6 A tON applies when the device initially powers up, and when it exits sleep mode. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 5 DRV8871-Q1 SLVSDH4 – MARCH 2017 www.ti.com 6.6 Typical Characteristics 65 1.8 1.6 64 VILIM (kV) Normalized RDS(on) / RDS(on)_25qC 2 1.4 1.2 63 1 0.8 0.6 -40 -20 0 20 40 60 80 100 Ambient Temperature (qC) 120 62 -40 140 -20 0 20 d001 Figure 1. RDS(on) vs Temperature 40 60 80 Temperature (°C) 100 120 140 D003 Figure 2. VILIM vs Temperature 10 IV M S L E E P (µ A ) 8 6 4 2 0 0 5 10 15 20 25 30 35 VM (V) 40 45 D004 Figure 3. IVMSLEEP vs VM at 25°C 6 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com SLVSDH4 – MARCH 2017 7 Detailed Description 7.1 Overview The DRV8871-Q1 device is an optimized 8-pin device for driving brushed DC motors with 6.8 to 45 V and up to 3.6-A peak current. The integrated current regulation restricts motor current to a predefined maximum. Two logic inputs control the H-bridge driver, which consists of four N-channel MOSFETs that have a typical Rds(on) of 565 mΩ (including one high-side and one low-side FET). A single power input, VM, serves as both device power and the motor winding bias voltage. The integrated charge pump of the device boosts VM internally and fully enhances the high-side FETs. Motor speed can be controlled with pulse-width modulation, at frequencies between 0 to 100 kHz. The device has an integrated sleep mode that is entered by bringing both inputs low. An assortment of protection features prevent the device from being damaged if a system fault occurs. 7.2 Functional Block Diagram Power VM bulk VM VCP VCP Charge Pump 0.1 µF VM OUT1 Gate Driver OCP GND BDC PPAD VCP VM OUT2 Gate Driver IN1 Core Logic OCP IN2 PGND Internal Current Sense RILIM Protection Features Overcurrent Monitoring Temperature Sensor ILIM Voltage Monitoring Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 7 DRV8871-Q1 SLVSDH4 – MARCH 2017 www.ti.com 7.3 Feature Description 7.3.1 Bridge Control The DRV8871-Q1 output consists of four N-channel MOSFETs that are designed to drive high current. They are controlled by the two logic inputs IN1 and IN2, according to Table 1. Table 1. H-Bridge Control IN1 IN2 OUT1 OUT2 0 0 High-Z High-Z DESCRIPTION 0 1 L H Reverse (Current OUT2 → OUT1) 1 0 H L Forward (Current OUT1 → OUT2) 1 1 L L Brake; low-side slow decay Coast; H-bridge disabled to High-Z (sleep entered after 1 ms) The inputs can be set to static voltages for 100% duty cycle drive, or they can be pulse-width modulated (PWM) for variable motor speed. When using PWM, it typically works best to switch between driving and braking. For example, to drive a motor forward with 50% of its max RPM, IN1 = 1 and IN2 = 0 during the driving period, and IN1 = 1 and IN2 = 1 during the other period. Alternatively, the coast mode (IN1 = 0, IN2 = 0) for fast current decay is also available. The input pins can be powered before VM is applied. VM VM 1 Reverse drive 1 Forward drive 2 Slow decay (brake) 2 Slow decay (brake) 1 1 OUT1 3 High-Z (coast) 3 High-Z (coast) OUT2 OUT1 OUT2 2 2 3 3 FORWARD REVERSE Figure 4. H-Bridge Current Paths 7.3.2 Sleep Mode When IN1 and IN2 are both low for time tSLEEP (typically 1 ms), the DRV8871-Q1 device enters a low-power sleep mode, where the outputs remain High-Z and the device uses IVMSLEEP (microamps) of current. If the device is powered up while both inputs are low, sleep mode is immediately entered. After IN1 or IN2 are high for at least 5 µs, the device will be operational 50 µs (tON) later. 7.3.3 Current Regulation The DRV8871-Q1 device limits the output current based on a standard resistor attached to pin ILIM, according to this equation: 8 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com ITRIP (A) SLVSDH4 – MARCH 2017 VILIM (kV) RILIM (k :) 64 (kV) RILIM (k :) (1) For example, if RILIM = 32 kΩ, the DRV8871-Q1 device limits motor current to 2 A no matter how much load torque is applied. The minimum allowed RILIM is 15 kΩ. System designers should always understand the min and max ITRIP, based on the RILIM resistor component tolerance and the DRV8871-Q1 specified VILIM range. When ITRIP has been reached, the device enforces slow current decay by enabling both low-side FETs, and it does this for time tOFF (typically 25 µs). Motor Current (A) ITRIP tBLANK tDRIVE tOFF Figure 5. Current Regulation Time Periods After tOFF has elapsed, the output is re-enabled according to the two inputs INx. The drive time (tDRIVE) until reaching another ITRIP event heavily depends on the VM voltage, the motor’s back-EMF, and the motor’s inductance. 7.3.4 Dead Time When an output changes from driving high to driving low, or driving low to driving high, dead time is automatically inserted to prevent shoot-through. tDEAD is the time in the middle when the output is High-Z. If the output pin is measured during tDEAD, the voltage will depend on the direction of current. If current is leaving the pin, the voltage will be a diode drop below ground. If current is entering the pin, the voltage will be a diode drop above VM. This diode is the body diode of the high-side or low-side FET. IN1 IN2 OUT1 tPD tDEAD tR tPD tDEAD tF tPD tDEAD tF tPD tDEAD tR OUT2 Figure 6. Propagation Delay Time Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 9 DRV8871-Q1 SLVSDH4 – MARCH 2017 www.ti.com 7.3.5 Protection Circuits The DRV8871-Q1 device is fully protected against VM undervoltage, overcurrent, and overtemperature events. 7.3.5.1 VM Undervoltage Lockout (UVLO) If at any time the voltage on the VM pin falls below the undervoltage lockout threshold voltage, all FETs in the Hbridge will be disabled. Operation will resume when VM rises above the UVLO threshold. 7.3.5.2 Overcurrent Protection (OCP) If the output current exceeds the OCP threshold IOCP for longer than tOCP, all FETs in the H-bridge are disabled for a duration of tRETRY. After that, the H-bridge will be re-enabled according to the state of the INx pins. If the overcurrent fault is still present, the cycle repeats; otherwise normal device operation resumes. 7.3.5.3 Thermal Shutdown (TSD) If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled. After the die temperature has fallen to a safe level, operation automatically resumes. Table 2. Protection Functionality FAULT CONDITION H-BRIDGE STATUS RECOVERY VM undervoltage lockout (UVLO) VM < VUVLO Disabled VM > VUVLO Overcurrent (OCP) IOUT > IOCP Disabled tRETRY Thermal Shutdown (TSD) TJ > 150°C Disabled TJ < TSD – T HYS 7.4 Device Functional Modes The DRV8871-Q1 device can be used in multiple ways to drive a brushed DC motor. 7.4.1 PWM With Current Regulation This scheme uses all of the device capabilities. ITRIP is set above the normal operating current, and high enough to achieve an adequate spin-up time, but low enough to constrain current to a desired level. Motor speed is controlled by the duty cycle of one of the inputs, while the other input is static. Brake/slow decay is typically used during the off-time. 7.4.2 PWM Without Current Regulation If current regulation is not needed, a 15-kΩ to 18-kΩ resistor should be used on pin ILIM. This mode provides the highest possible peak current: up to 3.6 A for a few hundred milliseconds (depending on PCB characteristics and the ambient temperature). If current exceeds 3.6 A, the device might reach overcurrent protection (OCP) or overtemperature shutdown (TSD). If that happens, the device disables and protects itself for about 3 ms (tRETRY) and then resumes normal operation. 7.4.3 Static Inputs With Current Regulation IN1 and IN2 can be set high and low for 100% duty cycle drive, and ITRIP can be used to control the current, speed, and torque capability of the motor. 7.4.4 VM Control In some systems it is desirable to vary VM as a means of changing motor speed. See Motor Voltage for more information. 10 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com SLVSDH4 – MARCH 2017 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The DRV8871-Q1 device is typically used to drive one brushed DC motor. 8.2 Typical Application 3.3 V GND OUT2 IN2 PGND Controller BDC DRV8871-Q1 IN1 OUT1 ILIM VM PPAD 30 NŸ 0.1 µF + 6.8 to 45 V ± Power Supply 47 µF Copyright © 2017, Texas Instruments Incorporated Figure 7. Typical Connections 8.2.1 Design Requirements Table 3 lists the design parameters. Table 3. Design Parameters DESIGN PARAMETER Motor voltage Motor RMS current Motor startup current REFERENCE EXAMPLE VALUE VM 24 V IRMS 0.8 A ISTART 2A Motor current trip point ITRIP 2.1 A ILIM resistance RILIM 30 kΩ PWM frequency fPWM 5 kHz 8.2.2 Detailed Design Procedure 8.2.2.1 Motor Voltage The motor voltage to use will depend on the ratings of the motor selected and the desired RPM. A higher voltage spins a brushed DC motor faster with the same PWM duty cycle applied to the power FETs. A higher voltage also increases the rate of current change through the inductive motor windings. 8.2.2.2 Drive Current The current path is through the high-side sourcing DMOS power driver, motor winding, and low-side sinking DMOS power driver. Power dissipation losses in one source and sink DMOS power driver are shown in the following equation. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 11 DRV8871-Q1 SLVSDH4 – MARCH 2017 PD I2 RDS(on)Source www.ti.com RDS(on)Sink (2) The DRV8871-Q1 device has been measured to be capable of 2-A RMS current at 25°C on standard FR-4 PCBs. The max RMS current varies based on the PCB design, ambient temperature, and PWM frequency. Typically, switching the inputs at 200 kHz compared to 20 kHz causes 20% more power loss in heat. 8.2.3 Application Curves 12 Figure 8. Current Ramp With a 2-Ω, 1 mH, RL Load and VM = 12 V Figure 9. Current Ramp With a 2-Ω, 1 mH, RL Load and VM = 24 V Figure 10. Current Ramp With a 2-Ω, 1 mH, RL Load and VM = 45 V Figure 11. tPD Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com SLVSDH4 – MARCH 2017 Figure 12. Current Regulation With RILIM = 50.5 kΩ Figure 13. OCP With 45 V and the Outputs Shorted Together Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 13 DRV8871-Q1 SLVSDH4 – MARCH 2017 www.ti.com 9 Power Supply Recommendations 9.1 Bulk Capacitance Having appropriate local bulk capacitance is an important factor in motor drive system design. In general, having have more bulk capacitance is beneficial, while the disadvantages are increased cost and physical size. The amount of local capacitance needed depends on a variety of factors, including: • The highest current required by the motor system • The power supply’s capacitance and ability to source current • The amount of parasitic inductance between the power supply and motor system • The acceptable voltage ripple • The type of motor used (brushed DC, brushless DC, stepper) • The motor braking method The inductance between the power supply and motor drive system will limit the rate current can change from the power supply. If the local bulk capacitance is too small, the system reponds to excessive current demands or dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage remains stable and high current can be quickly supplied. The data sheet generally provides a recommended value, but system-level testing is required to determine the appropriate sized bulk capacitor. Power Supply Parasitic Wire Inductance Motor Drive System VBB + ± + Motor Driver GND Local Bulk Capacitor IC Bypass Capacitor Figure 14. Example Setup of Motor Drive System With External Power Supply The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases when the motor transfers energy to the supply. 14 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com SLVSDH4 – MARCH 2017 10 Layout 10.1 Layout Guidelines The bulk capacitor should be placed to minimize the distance of the high-current path through the motor driver device. The connecting metal trace widths should be as wide as possible, and numerous vias should be used when connecting PCB layers. These practices minimize inductance and allow the bulk capacitor to deliver high current. Small-value capacitors should be ceramic, and placed closely to device pins. The high-current device outputs should use wide metal traces. The device thermal pad should be soldered to the PCB top-layer ground plane. Multiple vias should be used to connect to a large bottom-layer ground plane. The use of large metal planes and multiple vias help dissipate the I2 × RDS(on) heat that is generated in the device. 10.2 Layout Example Recommended layout and component placement is shown in Figure 15 GND OUT2 IN2 PGND IN1 OUT1 ILIM VM + Figure 15. Layout Recommendation 10.3 Thermal Considerations The DRV8871-Q1 device has thermal shutdown (TSD) as described in the Thermal Shutdown (TSD) section. If the die temperature exceeds approximately 175°C, the device is disabled until the temperature drops below the temperature hysteresis level. Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient heatsinking, or too high of an ambient temperature. 10.4 Power Dissipation Power dissipation in the DRV8871-Q1 device is dominated by the power dissipated in the output FET resistance, RDS(on). Use the equation in the Drive Current section to calculate the estimated average power dissipation when driving a load. Note that at startup, the current is much higher than normal running current; this peak current and its duration must be also be considered. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 15 DRV8871-Q1 SLVSDH4 – MARCH 2017 www.ti.com Power Dissipation (continued) The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and heatsinking. NOTE RDS(on) increases with temperature, so as the device heats, the power dissipation increases. This fact must be taken into consideration when sizing the heatsink. The power dissipation of the DRV8871-Q1 device is a function of RMS motor current and the FET resistance (RDS(ON)) of each output. Power | IRMS2 u High-side RDS(ON) Low-side RDS(ON) (3) For this example, the ambient temperature is 58°C, and the junction temperature reaches 80°C. At 58°C, the sum of RDS(ON) is about 0.72 Ω. With an example motor current of 0.8 A, the dissipated power in the form of heat will be 0.8 A2 × 0.72 Ω = 0.46 W. The temperature that the DRV8871-Q1 device reaches depends on the thermal resistance to the air and PCB. It is important to solder the device PowerPAD to the PCB ground plane, with vias to the top and bottom board layers, in order dissipate heat into the PCB and reduce the device temperature. In the example used here, the DRV8871-Q1 device had an effective thermal resistance RθJA of 48°C/W, and: TJ TA (PD u RTJA ) 58qC (0.46 W u 48qC/W ) 80qC (4) 10.4.1 Heatsinking The PowerPAD package uses an exposed pad to remove heat from the device. For proper operation, this pad must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this connection can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without internal planes, a copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom layers. For details about how to design the PCB, refer to PowerPAD™ Thermally Enhanced Package (SLMA002) and PowerPAD Made Easy™ (SLMA004), available at www.ti.com. In general, the more copper area that can be provided, the more power can be dissipated. 16 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 DRV8871-Q1 www.ti.com SLVSDH4 – MARCH 2017 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation, see the following: • Current Recirculation and Decay Modes • Calculating Motor Driver Power Dissipation • DRV8871 Evaluation Module • PowerPAD™ Thermally Enhanced Package • PowerPAD™ Made Easy • Understanding Motor Driver Current Ratings 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.4 Trademarks PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DRV8871-Q1 17 PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 PACKAGING INFORMATION Orderable Device Status (1) DRV8871DDARQ1 Package Type Package Pins Package Drawing Qty PREVIEW SO PowerPAD DDA 8 2500 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) TBD Call TI Call TI Op Temp (°C) Device Marking (4/5) -40 to 125 8871Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 OTHER QUALIFIED VERSIONS OF DRV8871-Q1 : • Catalog: DRV8871 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and services. Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will thoroughly test such applications and the functionality of such TI products as used in such applications. TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource solely for this purpose and subject to the terms of this Notice. TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949 and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements. Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S. TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product). Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection. Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated