PROCESS CP517 Central Power Transistor TM Semiconductor Corp. PNP - Darlington Chip PROCESS DETAILS Process EPITAXIAL BASE Die Size 111 X 111 MILS Die Thickness 10 MILS Base Bonding Pad Area 20 X 30 MILS Emitter Bonding Pad Area 20 X 26 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Au/Cr/Ni/Au - 6,000Å GEOMETRY GROSS DIE PER 5 INCH WAFER 910 PRINCIPAL DEVICE TYPES 2N6040 2N6041 2N6042 2N6299 BACKSIDE COLLECTOR 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R1 (1-August 2002) Central TM Semiconductor Corp. 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com PROCESS CP517 Typical Electrical Characteristics R1 (1-August 2002)