ICST ICS843251BGI-12LF Femtoclocksâ ¢ crystal-to-3.3v, 2.5v lvpecl clock generator Datasheet

PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
GENERAL DESCRIPTION
FEATURES
The ICS843251I-12 is a 10Gb Ethernet Clock
Generator and a member of the HiPerClocksTM
HiPerClockS™
family of high performance devices from ICS. The
ICS843251I-12 uses an 18pF parallel resonant
crystal over the range of 23.2MHz - 30MHz. For
Ethernet applications, a 25MHz crystal is used. The device
has excellent <1ps phase jitter performance, over the
1.875MHz - 20MHz integration range. The ICS843251I-12
is packaged in a small 8-pin TSSOP, making it ideal for
use in systems with limited board space.
• One Differential LVPECL output
ICS
• Crystal oscillator interface, 18pF parallel resonant crystal
(23.2MHz - 30MHz)
• Output frequency range: 290MHz - 750MHz
• VCO range: 580MHz - 750MHz
• RMS phase jitter @ 312.5MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.36ps (typical)
• 3.3V or 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
COMMON CONFIGURATION TABLE
Inputs
Output Frequency
(MHz)
Crystal Frequency
(MHz)
FREQ_SEL
M
N
Multiplication Value
M/N
25
0
25
1
25
625
25
1
25
2
12.5
312.5
BLOCK DIAGRAM
FREQ_SEL
Pullup
XTAL_IN
OSC
XTAL_OUT
PIN ASSIGNMENT
Phase
Detector
VCO
580MHz - 750MHz
FREQ_SEL N
0
÷1
1
÷2
Q
nQ
VCCA
VEE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
VCC
Q
nQ
FREQ_SEL
ICS843251I-12
8-Lead TSSOP
4.4mm x 3.0mm x 0.925mm
package body
G Package
Top View
M = ÷25 (fixed)
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843251BGI-12
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REV. A JANUARY 10, 2006
1
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TABLE 1. PIN DESCRIPTIONS
Number
Name
1
VCCA
Power
Analog supply pin.
2
Power
5
VEE
XTAL_OUT,
XTAL_IN
FREQ_SEL
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Frequency select pin. LVCMOS/LVTTL interface levels.
6, 7
nQ, Q
Output
Differential clock outputs. LVPECL interface levels.
8
VCC
Power
Core supply pin.
3, 4
Type
Description
Input
Input
Pullup
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
CIN
Input Capacitance
4
pF
RPULLUP
Input Pullup Resistor
51
kΩ
843251BGI-12
Test Conditions
Minimum
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2
Typical
Maximum
Units
REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC
Inputs, VI
4.6V
-0.5V to VCC + 0.5V
Outputs, IO
Continuous Current
Surge Current
50mA
100mA
Package Thermal Impedance, θJA
101.7°C/W (0 mps)
Storage Temperature, TSTG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 3.3V±5%, TA = -40°C TO 85°C
Symbol
Parameter
Minimum
Typical
Maximum
Units
VCC
Core Supply Voltage
Test Conditions
3.135
3.3
3.465
V
VCCA
Analog Supply Voltage
3.135
3.3
3.465
IEE
Power Supply Current
TBD
V
mA
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 2.5V±5%, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VCC
Core Supply Voltage
2.375
2.5
2.625
V
VCCA
Analog Supply Voltage
2.375
2.5
2.625
V
IEE
Power Supply Current
TBD
mA
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = VCCA = 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C
Symbol
Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
Test Conditions
Minimum
VCC = 3.3V
Maximum
Units
2
VCC + 0.3
V
VCC = 2.5V
1.7
VCC + 0.3
V
VCC = 3.3V
-0.3
0.8
V
VCC = 2.5V
-0.3
0.7
V
IIH
Input High Current
VCC = VIN = 3.465V or 2.625V
IIL
Input Low Current
VCC = 3.465V or 2.625V, VIN = 0V
843251BGI-12
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3
Typical
5
-150
µA
µA
REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TABLE 3D. LVPECL DC CHARACTERISTICS, VCC = VCCA = 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C
Symbol
Parameter
Maximum
Units
VOH
Output High Voltage; NOTE 1
Test Conditions
Minimum
VCC - 1.4
Typical
VCC - 0.9
V
VOL
Output Low Voltage; NOTE 1
VCC - 2.0
VCC - 1.7
V
VSWING
Peak-to-Peak Output Voltage Swing
0.6
1.0
V
Maximum
Units
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Mode of Oscillation
Typical
Fundamental
Frequency
23.2
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
30
MHz
TBD
Ω
7
pF
TBD
mW
Maximum
Units
TABLE 5A. AC CHARACTERISTICS, VCC = VCCA = 3.3V±5%, TA = -40°C TO 85°C
Symbol
fOUT
t jit(Ø)
t R / tF
Parameter
Output Frequency
RMS Phase Jitter ( Random);
NOTE 1
Output Rise/Fall Time
Test Conditions
Minimum
Typical
F_SEL = 1
312.5
MHz
F_SEL = 0
312.5MHz @ Integration Range:
1.875MHz - 20MHz
20% to 80%
625
MHz
0.36
ps
325
ps
50
%
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plots following this section.
TABLE 5B. AC CHARACTERISTICS, VCC = VCCA = 2.5V±5%, TA = -40°C TO 85°C
Symbol
Parameter
fOUT
Output Frequency
t jit(Ø)
tR / tF
RMS Phase Jitter ( Random);
NOTE 1
Output Rise/Fall Time
Test Conditions
Minimum
Maximum
Units
F_SEL = 1
312.5
MHz
F_SEL = 0
312.5MHz @ Integration Range:
1.875MHz - 20MHz
20% to 80%
625
MHz
0.38
ps
325
ps
50
%
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plots following this section.
843251BGI-12
Typical
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TYPICAL PHASE NOISE
AT
312.5MHZ (3.3V)
➤
0
-10
-20
10GigE Filter
-30
312.5MHz
-40
RMS Phase Jitter (Random)
1.875Mhz to 20MHz = 0.36ps (typical)
-50
-60
-70
Raw Phase Noise Data
-90
➤
NOISE POWER dBc
Hz
-80
-100
-110
-120
-130
-140
-150
➤
-160
Phase Noise Result by adding
10GigE Filter to raw data
-170
-180
-190
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY
843251BGI-12
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
PARAMETER MEASUREMENT INFORMATION
2V
2V
VCC,
VCCA
Qx
SCOPE
VCC,
VCCA
LVPECL
Qx
SCOPE
LVPECL
nQx
nQx
VEE
VEE
-1.3V ± 0.165V
-0.5V ± 0.125V
LVPECL 3.3V OUTPUT LOAD AC TEST CIRCUIT
LVPECL 2.5V OUTPUT LOAD AC TEST CIRCUIT
Noise Power
Phase Noise Plot
nQ
Q
Phase Noise Mask
t PW
t
Offset Frequency
f1
f2
odc =
PERIOD
t PW
x 100%
t PERIOD
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
80%
80%
VSW I N G
Clock
Outputs
20%
20%
tR
tF
OUTPUT RISE/FALL TIME
843251BGI-12
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843251I-12 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VCC and VCCA
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin. The 10Ω
resistor can also be replaced by a ferrite bead.
3.3V or 2.5V
VCC
.01μF
10Ω
VCC
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
25MHz, 18pF parallel resonant crystal and were chosen to
minimize the ppm error. The optimum C1 and C2 values
can be slightly adjusted for different board layouts.
The ICS843251I-12 has been characterized with 18pF parallel resonant crystals. The capacitor values (TBD), C1 and
C2, shown in Figure 2 below were determined using a
XTAL_IN
C1
X1
Crystal
XTAL_OUT
C2
Figure 2. CRYSTAL INPUt INTERFACE
843251BGI-12
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TERMINATION
FOR
3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical termination for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines.
designed to drive 50Ω transmission lines. Matched impedance techniques should be used to maximize operating
frequency and minimize signal distortion. Figures 3A and
3B show two different layouts which are recommended
only as guidelines. Other suitable clock layouts may exist
and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and clock component process variations.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
3.3V
Zo = 50Ω
125Ω
FOUT
125Ω
FIN
Zo = 50Ω
Zo = 50Ω
FOUT
50Ω
RTT =
1
Z
((VOH + VOL) / (VCC – 2)) – 2 o
VCC - 2V
Zo = 50Ω
RTT
84Ω
FIGURE 3A. LVPECL OUTPUT TERMINATION
843251BGI-12
FIN
50Ω
84Ω
FIGURE 3B. LVPECL OUTPUT TERMINATION
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TERMINATION
FOR
2.5V LVPECL OUTPUT
Figure 4A and Figure 4B show examples of termination for 2.5V
LVPECL driver. These terminations are equivalent to terminating 50Ω to VCC - 2V. For VCC = 2.5V, the VCC - 2V is very close to
ground level. The R3 in Figure 4B can be eliminated and the
termination is shown in Figure 4C.
2.5V
VCC=2.5V
2.5V
2.5V
VCC=2.5V
R1
250
Zo = 50 Ohm
R3
250
+
Zo = 50 Ohm
+
Zo = 50 Ohm
-
Zo = 50 Ohm
2,5V LVPECL
Driv er
-
R1
50
2,5V LVPECL
Driv er
R2
62.5
R2
50
R4
62.5
R3
18
FIGURE 4B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 4A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V
VCC=2.5V
Zo = 50 Ohm
+
Zo = 50 Ohm
2,5V LVPECL
Driv er
R1
50
R2
50
FIGURE 4C. 2.5V LVPECL TERMINATION EXAMPLE
843251BGI-12
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE
FOR
8 LEAD TSSOP
θJA by Velocity (Meters per Second)
Multi-Layer PCB, JEDEC Standard Test Boards
0
1
2.5
101.7°C/W
90.5°C/W
89.8°C/W
TRANSISTOR COUNT
The transistor count for ICS843251I-12 is: 2377
843251BGI-12
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX
FOR
8 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
N
Maximum
8
A
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
2.90
E
E1
3.10
6.40 BASIC
4.30
e
4.50
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
843251BGI-12
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REV. A JANUARY 10, 2006
PRELIMINARY
ICS843251I-12
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
TABLE 8. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging
Temperature
ICS843251BGI-12
TBD
8 Lead TSSOP
tube
-40°C to 85°C
ICS843251BGI-12T
TBD
8 Lead TSSOP
2500 tape & reel
-40°C to 85°C
ICS843251BGI-12LF
BI12L
8 Lead "Lead-Free" TSSOP
tube
-40°C to 85°C
ICS843251BGI-12FT
BI12L
8 Lead "Lead-Free" TSSOP
2500 tape & reel
-40°C to 85°C
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
843251BGI-12
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12
REV. A JANUARY 10, 2006
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