HANBit HMS12832M4G/Z4 SRAM MODULE 512KByte (128K x 32-Bit), 64PIN SIMM / ZIP Part No. HMS12832M4G, HMS12832Z4 GENERAL DESCRIPTION The HMS12832M4G/Z4 is a high-speed static random access memory (SRAM) module containing 131,072 words organized in a x32-bit configuration. The module consists of four 128K x 8 SRAMs mounted on a 64-pin, single-sided, FR4-printed circuit board. PD0 and PD1 identify the module’s density allowing interchangeable use of alternate density, industry- standard modules. Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes independently. Output enable(/OE) and write enable(/WE) can set the memory input and output. Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW. For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from a single +5V DC power supply and all inputs and outputs are fully TTL-compatible. FEATURES w Access times : 10, 12, 15 and 20ns PIN ASSIGNMENT w High-density 512KByte design w High-reliability, high-speed design w Single + 5V ±0.5V power supply PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL w Easy memory expansion with /CE and 1 Vss 17 A2 33 /CE4 49 A4 /OE functions 2 NC 18 A9 34 /CE3 50 A11 3 NC 19 DQ12 35 NC 51 A5 4 DQ0 20 DQ4 36 A16 52 A12 5 DQ8 21 DQ13 37 /OE 53 Vcc 6 DQ1 22 DQ5 38 Vss 54 A13 7 DQ9 23 DQ14 39 DQ24 55 A6 8 DQ2 24 DQ6 40 DQ16 56 DQ20 9 DQ10 25 DQ15 41 DQ25 57 DQ28 w All inputs and outputs are TTL-compatible w Industry-standard pinout w FR4-PCB design OPTIONS MARKING w Timing 8ns access - 8 10 DQ3 26 DQ7 42 DQ17 58 DQ21 10ns access -10 11 DQ11 27 Vss 43 DQ26 59 DQ29 12ns access -12 12 Vcc 28 /WE 44 DQ18 60 DQ22 15ns access -15 13 A0 29 A15 45 DQ27 61 DQ30 20ns access -20 14 A7 30 A14 46 DQ19 62 DQ23 15 A1 31 /CE2 47 A3 63 DQ31 16 A8 32 /CE1 48 A10 64 Vss w Packages 64-pin SIMM M 64-pin ZIP Z URL: www.hbe.co.kr Rev. 1.0 (September / 2002) SIMM TOP VIEW 1 HANBit Electronics Co.,Ltd. HANBit HMS12832M4G/Z4 FUNCTIONAL BLOCK DIAGRAM DQ0 - DQ31 A0 - A16 32 17 A0-16 /WE DQ 0-7 U1 /OE /CE /CE1 A0-16 /WE DQ 8-15 U2 /OE /CE /CE2 A0-16 /WE DQ16-23 U3 /OE /CE /CE3 A0-16 /WE /WE /OE /OE DQ24-31 U4 /CE PRESENCE-DETECT /CE4 PD0 = Open PD1 = Open TRUTH TABLE MODE /OE /CE /WE DQ POWER STANDBY X H X HIGH-Z STANDBY NOT SELECTED H L H HIGH-Z ACTIVE READ L L H Dout ACTIVE WRITE X L L Din ACTIVE URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 2 HANBit Electronics Co.,Ltd. HANBit HMS12832M4G/Z4 ABSOLUTE MAXIMUM RATINGS* PARAMETER SYMBOL RATING VIN,OUT -0.5V to Vcc+0.5V Voltage on Vcc Supply Relative to Vss VCC -0.5V to +7.0V Power Dissipation PD 4.0W o -65 C to +150oC 0oC to +70oC Voltage on Any Pin Relative to Vss Storage Temperature TSTG Operating Temperature TA w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. RECOMMENDED DC OPERATING CONDITIONS ( TA=0 to 70 o C ) PARAMETER * SYMBOL MIN TYP. MAX Supply Voltage VCC 4.5V 5.0V 5.5V Ground VSS 0 0 0 Input High Voltage VIH 2.2 - Vcc+0.5V** Input Low Voltage VIL -0.5* - 0.8V VIL(Min.) = -2.0V ac (Pulse Width ≤ 10ns) for I ≤ 20 mA ** VIH(Min.) = Vcc+2.0V ac (Pulse Width ≤ 10ns) for I ≤ 20 mA DC AND OPERATING CHARACTERISTICS (1)(0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 10% ) PARAMETER TEST CONDITIONS Input Leakage Current VIN=Vss to Vcc /CE=VIH or /OE =VIH or /WE=VIL Output Leakage Current VOUT=Vss to VCC SYMBOL MIN MAX UNITS ILI -8 8 µA IL0 -8 8 µA 2.4 Output High Voltage IOH = -4.0mA VOH Output Low Voltage IOL = 8.0mA VOL V 0.4 V * Vcc=5.0V, Temp=25 oC DC AND OPERATING CHARACTERISTICS (2) DESCRIPTION Power Supply Current:Operating Power Supply Current:Standby TEST CONDITIONS SYMBOL Rev. 1.0 (September / 2002) UNIT -12 -15 -20 ICC 300 292 280 mA ISB 120 120 120 mA ISB1 20 20 20 mA Min. Cycle, 100% Duty /CE=VIL, VIN=VIH or VIL, IOUT=0mA Min. Cycle, /CE=VIH f=0MHZ, /CE≥VCC-0.2V, VIN≥ VCC-0.2V or VIN≤0.2V URL: www.hbe.co.kr MAX 3 HANBit Electronics Co.,Ltd. HANBit HMS12832M4G/Z4 CAPACITANCE (TA =25 oC , f= 1.0Mhz) DESCRIPTION Input /Output Capacitance Input Capacitance TEST CONDITIONS SYMBOL MAX UNIT VI/O=0V CI/O 32 pF CIN 24 pF VIN=0V * NOTE : Capacitance is sampled and not 100% tested AC CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V, unless otherwise specified) Test conditions PARAMETER VALUE Input Pulse Level 0V to 3V Input Rise and Fall Time 3ns Input and Output Timing Reference Levels 1.5V Output Load See below Output Load (B) Output Load (A) for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ VL=1.5V +3.3V 50Ω DOUT 319Ω DOUT Z0=50Ω 353Ω 30pF 5pF* READ CYCLE -12 PARAMETER -15 -20 SYMBOL UNIT MIN MAX MAX MAX tRC Address Access Time tAA 12 15 20 ns Chip Select to Output tCO 12 15 20 ns Output Enable to Output tOE 6 7 9 ns Output Enable to Low-Z Output tOLZ 0 0 0 ns Chip Enable to Low-Z Output tLZ 3 3 3 ns Output Disable to High-Z Output tOHZ 0 6 0 7 0 9 ns Chip Disable to High-Z Output tHZ 0 6 0 7 0 9 ns Output Hold from Address Change tOH 3 3 3 ns Chip Select to Power Up Time tPU 0 0 0 ns Chip Select to Power Down Time tPD - Rev. 1.0 (September / 2002) 4 15 MIN Read Cycle Time URL: www.hbe.co.kr 12 MIN 12 20 15 ns 20 HANBit Electronics Co.,Ltd. ns HANBit HMS12832M4G/Z4 WRITE CYCLE PARAMETER -12 SYMBOL MIN -15 MAX MIN -20 MAX MIN MAX UNIT Write Cycle Time tWC 12 15 20 ns Chip Select to End of Write tCW 8 10 12 ns Address Set-up Time tAS 0 0 0 ns Address Valid to End of Write tAW 8 9 10 ns Write Pulse Width tWP 8 9 10 ns Write Recovery Time tWR 0 Write to Output High-Z tWHZ 0 Data to Write Time Overlap tDW 6 7 8 ns Data Hold from Write Time tDH 0 0 0 ns End of Write to Output Low-Z tOW 3 3 3 ns URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 5 0 6 0 0 7 0 ns 9 HANBit Electronics Co.,Ltd. ns HANBit HMS12832M4G/Z4 TIMING DIAGRAMS NOTES(READ CYCLE) 1. WE is high for read cycle. 2. All read cycle timing is referenced from the last valid address to the first transition address. 3. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit condition and are not referenced to VOH or VOL levels. 4. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from 5. Transition is measured ± 200mV from steady state voltage with Load(B). This parameter is sampled and not 100% device to device. tested. 6. Device is continuously selected with CS=VIL. 7. Address valid prior to coincident with CS transition low. 8. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycle. URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 6 HANBit Electronics Co.,Ltd. HANBit URL: www.hbe.co.kr Rev. 1.0 (September / 2002) HMS12832M4G/Z4 7 HANBit Electronics Co.,Ltd. HANBit HMS12832M4G/Z4 NOTES(WRITE CYCLE) 1. ll write cycle timing is referenced from the last valid address to the first transition address. 2. A write occurs during the overlap of a low CS and WE. A write begins at the latest transition CS going low and WE going low ; A write ends at the earliest transition CS going high or WE going high. tWP is measured from the beginning of write to the end of write. 3. tCW is measured from the later of CS going low to end of write. 4. tAS is measured from the address valid to the beginning of write. 5. tWR is measured from the end of write to the address change. tWR applied in case a write ends as CS or WE going high. 6. If OE, CS and WE are in the Read Mode during this period, the I/O pins are in the output low-Z state. Inputs of opposite phase of the output must not be applied because bus contention can occur. 7. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycle. 8. If CS goes low simultaneously with WE going or after WE going low, the outputs remain high impedance state. 9. Dout is the read data of the new address. 10. When CS is low : I/O pins are in the output state. The input signals in the opposite phase leading to the output should not be applied. FUNCTIONAL DESCRIPTION /CE /WE /OE MODE I/O PIN SUPPLY CURRENT H X* X Not Select High-Z l SB, l SB1 L H H Output Disable High-Z lCC L H L Read DOUT lCC L L X Write DIN lCC Note: X means Don't Care URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 8 HANBit Electronics Co.,Ltd. HANBit HMS12832M4G/Z4 PACKAGING INFORMATION UNIT : mm SIMM Design 2.54 mm MIN 0.25 mm MAX 1.27 Gold : 1.04±0.10 mm Solder : 0.914±0.10 mm 1.27±0.08 mm (Solder & Gold Plating Lead) URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 9 HANBit Electronics Co.,Ltd. HANBit HMS12832M4G/Z4 ZIP Design < FRONT SIDE> 1.27 ± 0.20 1.7±0.30 mm 2.54 mm URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 10 HANBit Electronics Co.,Ltd. HANBit HMS12832M4G/Z4 ORDERING INFORMATION Part Number Density Org. Package HMS12832M4G-10 512KByte 128KX 32bit 64 Pin-SIMM HMS12832M4G-12 512KByte 128KX 32bit HMS12832M4G-15 512KByte HMS12832M4G-20 Component Vcc Access Time 4EA 5V 10ns 64 Pin-SIMM 4EA 5V 12ns 128KX 32bit 64 Pin-SIMM 4EA 5V 15ns 512KByte 128KX 32bit 64 Pin-SIMM 4EA 5V 20ns HMS12832Z4-10 512KByte 128KX 32bit 64 Pin-ZIP 4EA 5V 10ns HMS12832Z4-12 512KByte 128KX 32bit 64 Pin-ZIP 4EA 5V 12ns HMS12832Z4-15 512KByte 128KX 32bit 64 Pin-ZIP 4EA 5V 15ns HMS12832Z4-20 512KByte 128KX 32bit 64 Pin-ZIP 4EA 5V 20ns URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 11 Number HANBit Electronics Co.,Ltd.