Melexis EVB71102-868-FSK-C 315/433mhz receiver evaluation board description Datasheet

EVB71102
315/433MHz Receiver
Evaluation Board Description
Features
!
!
!
!
!
!
Double-conversion superhet architecture for high degree of image rejection
FSK for digital data and FM reception for analog signal transmission
FSK/FM demodulation with phase-coincidence demodulator
Low current consumption in active mode and very low standby current
Switchable LNA gain for improved dynamic range
RSSI allows signal strength indication and ASK detection
Ordering Information
Part No.
EVB71102-433-FSK-C
EVB71102-433-ASK-C
EVB71102-315-FSK-C
EVB71102-315-ASK-C
Application Examples
Evaluation Board
!
!
!
!
!
!
!
"
!
General digital data transmission
Tire Pressure Monitoring Systems (TPMS)
Remote Keyless Entry (RKE)
Wireless access control
Alarm and security systems
Garage door openers
Remote Controls
Home and building automation
Low-power telemetry systems
General Description
The TH71102 FSK/FM/ASK double-conversion superheterodyne receiver IC is designed for applications in
the European 433 MHz industrial-scientific-medical (ISM) band, according to the EN 300 220
telecommunications standard. It can also be used for any other system with carrier frequencies ranging from
260 MHz to 510 MHz (e.g. for applications to FCC part 15 and ARIB STD-T67).
39012 71102 01
Rev. 011
Page 1 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
Document Content
1
Theory of Operation ...................................................................................................3
1.1
General............................................................................................................................. 3
1.2
EVB Technical Data Overview ......................................................................................... 3
1.3
Block Diagram .................................................................................................................. 4
1.4
Mode Configurations ........................................................................................................ 4
1.5
LNA GAIN Control ............................................................................................................ 4
1.6
Frequency Planning.......................................................................................................... 4
1.6.1
1.6.2
2
Selected Frequency Plans........................................................................................................... 5
Maximum Frequency Coverage................................................................................................... 5
Application Circuits ...................................................................................................6
2.1
2.1.1
2.1.2
2.1.3
2.2
2.2.1
2.2.2
2.2.3
FSK Application Circuit..................................................................................................... 6
Circuit Diagram for FSK Reception.............................................................................................. 6
Board Component Values for FSK .............................................................................................. 7
Component Arrangement Top Side for FSK Reception .............................................................. 8
ASK Application Circuit..................................................................................................... 9
Circuit Diagram for ASK Reception ............................................................................................. 9
Board Component Values for ASK ............................................................................................ 10
Component Arrangement Top Side for ASK Reception ............................................................ 11
3
Evaluation Board Layouts .......................................................................................12
4
Board Variants..........................................................................................................12
5
Package Description ................................................................................................13
5.1
6
Soldering Information ..................................................................................................... 13
Disclaimer .................................................................................................................14
39012 71102 01
Rev. 011
Page 2 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
1
Theory of Operation
1.1
General
With the TH71102 receiver chip, various circuit configurations can be arranged in order to meet a number of
different customer requirements. For FM/FSK reception the IF tank used in the phase coincidence
demodulator can also be constituted by a ceramic discriminator with a varactor diode to create an AFC
circuit. In ASK configuration, the RSSI signal is fed to an ASK detector, which is constituted by the
operational amplifier.
The superheterodyne configuration is double conversion where MIX1 and MIX2 are driven by the internal
local oscillator signals LO1 and LO2, respectively. This allows a high degree of image rejection, achieved in
conjunction with an RF front-end filter. Efficient RF front-end filtering is realized by using a SAW, ceramic or
helix filter in front of the LNA and by adding an LC filter at the LNA output.
A single-conversion variant, called TH71101, is also available. Both Receiver ICs have the same die. At the
TH71101 the second mixer MIX2 operates as an amplifier.
The TH71102 receiver IC consists of the following building blocks:
#
#
#
#
#
#
#
#
1.2
PLL synthesizer (PLL SYNTH) for generation of the first and second local oscillator signals LO1 and LO2,
parts of the PLL SYNTH are: the high-frequency VCO1, the feedback dividers DIV_8 and DIV_2,
a phase-frequency detector (PFD) with charge pump (CP) and a crystal-based reference oscillator (RO)
Low-noise amplifier (LNA) for high-sensitivity RF signal reception
First mixer (MIX1) for down-conversion of the RF signal to the first IF (IF1)
Second mixer (MIX2) for down-conversion of the IF1 to the second IF (IF2)
IF amplifier (IFA) to amplify and limit the IF2 signal and for RSSI generation
Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal
Operational amplifier (OA) for data slicing, filtering and ASK detection
Bias circuitry for bandgap biasing and circuit shutdown
EVB Technical Data Overview
! Input frequency range: 260 MHz to 510 MHz
! Power supply range: 2.3 V to 5.5 V @ ASK
2.7 V to 5.5 V @ FSK
! Temperature range: -40 °C to +85 °C
! Standby current: 50 nA
! Operating current: 6.5 mA @ low gain mode
8.2 mA @ high gain mode
! Sensitivity: -110 dBm @ ASK 1)
-104 dBm @ FSK 2)
! Range of first IF1: 10 MHz to 80 MHz
! Range of first IF2: 400 kHz to 22 MHz
! Maximum input level: -10 dBm @ ASK
0 dBm @ FSK
! Image rejection: > 65 dB (e.g. with 433.92 MHz
SAW front-end filter and at 10.7 MHz IF2)
! Spurious emission: < -70 dBm
! Input frequency acceptance range: up to ±100 kHz
! RSSI range: 70 dB
! FM/FSK deviation range: ±2.5 kHz to ±80 kHz
! Maximum analog modulation frequency: 15 kHz
1) at 4 kbps NRZ, BER = 3⋅10-3, 180 kHz IF filter BW, incl. 3 dB SAW front-end-filter loss
2) at 4 kbps NRZ, BER = 3⋅10-3, ± 20 kHz FSK deviation, 180 kHz IF filter BW, incl. 3 dB SAW front-endfilter loss
For more detailed information, please refer to the latest TH71102 data sheet revision
39012 71102 01
Rev. 011
Page 3 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
IN_LNA
31
MIX1
21
14
15
16
MIX2
OUTP
MIX3
IF2
IF1
LNA
IN_DEM
13
OUT_IFA
12
RSSI
11
FBC1
10
IN_IFA
9
VEE_IF
8
OUT_MIX2
7
VCC_MIX
6
IF1N
5
IF1P
4
VEE_MIX
3
IN_MIX1
2
OUT_LNA
1
GAIN_LNA
Block Diagram
VEE_LNAC
1.3
23
IFA
OUTN
24
LO2
LO1
OAP
OA
20
OAN
19
PFD
OUT_OA
RO
27
28
22
17
VCC_BIAS
25
ENRX
26 RO
VCC_PLL
29 LF
VEE_RO
30
18
BIAS
CP
VEE_LNA
32
VCC_LNA
VCO1
VEE_BIAS
DIV2
DIV8
Fig. 1: TH71102 block diagram
1.4
Mode Configurations
ENRX
Mode
Description
0
RX standby
RX disabled
1
RX active
RX enable
Note: ENRX are pulled down internally
1.5
LNA GAIN Control
VGAIN_LNA
Mode
Description
< 0.8 V
HIGH GAIN
LNA set to high gain
> 1.4 V
LOW GAIN
LNA set to low gain
Note: hysteresis between gain modes to ensure stability
1.6
Frequency Planning
Frequency planning is straightforward for single-conversion applications because there is only one IF that
can be chosen, and then the only possible choice is low-side or high-side injection of the LO signal (which is
now the one and only LO signal in the receiver).
The receiver’s double-conversion architecture requires careful frequency planning. Besides the desired RF
input signal, there are a number of spurious signals that may cause an undesired response at the output.
Among them are the image of the RF signal (that must be suppressed by the RF front-end filter), spurious
signals injected to the first IF (IF1) and their images which could be mixed down to the same second IF (IF2)
as the desired RF signal (they must be suppressed by the LC filter at IF1 and/or by low-crosstalk design).
39012 71102 01
Rev. 011
Page 4 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
By configuring the TH71102 for double conversion and using its internal PLL synthesizer with fixed feedback
divider ratios of N1 = 8 (DIV_8) and N2 = 2 (DIV_2), four types of down-conversion are possible: low-side
injection of LO1 and LO2 (low-low), LO1 low-side and LO2 high-side (low-high), LO1 high-side and LO2 lowside (high-low) or LO1 and LO2 high-side (high-high). The following table summarizes some equations that
are useful to calculate the crystal reference frequency (REF), the first IF (IF1) and the VCO1 or first LO
frequency (LO1), respectively, for a given RF and second IF (IF2).
Injection type
high-high
low-low
high-low
low-high
REF
(RF – IF2)/14
(RF – IF2)/18
(RF + IF2)/14
(RF + IF2)/18
LO1
16•REF
16•REF
16•REF
16•REF
IF1
LO1 – RF
RF – LO1
LO1 – RF
RF – LO1
LO2
2•REF
2•REF
2•REF
2•REF
IF2
LO2 – IF1
IF1 – LO2
IF1 – LO2
LO2 – IF1
1.6.1
Selected Frequency Plans
The following table depicts crystal, LO and image signals considering the examples of 315 MHz and
433.92 MHz RF reception at IF2 = 10.7 MHz. The columns in bold depict the selected frequency plans to
receive at 315 MHz and 433.92 MHz, respectively.
Signal type
RF =
315
MHz
Injection type high-high
RF =
315
MHz
RF =
315
MHz
RF =
315
MHz
RF =
433.92
MHz
RF =
433.92
MHz
RF =
433.92
MHz
RF =
433.92
MHz
low-low
high-low
low-high
high-high
low-low
high-low
low-high
REF / MHz
21.73571
16.90556
23.26429
18.09444
30.23000
23.51222
31.75857
24.70111
LO1 / MHz
347.77143
270.48889
372.22857
289.51111
483.68000
376.19556
508.13714
395.21778
IF1 / MHz
32.77143
44.51111
57.22857
25.48889
49.76000
57.72444
74.21714
38.70222
LO2 / MHz
43.47143
33.81111
46.52857
36.18889
60.46000
47.02444
63.51714
49.40222
RF image/MHz 380.54286
225.97778
429.45714
264.02222
533.44000
318.47112
582.35428
356.51556
IF1 image/MHz
23.11111
35.82857
46.88889
71.16000
36.32444
52.81717
60.10222
1.6.2
54.17143
Maximum Frequency Coverage
Parameter
fmin
fmax
Injection type
high-low
low-low
RF / MHz
251.8
516.95
REF / MHz
18.75
28.125
LO1 / MHz
300
450
IF1 / MHz
48.2
66.95
LO2 / MHz
37.5
56.25
IF2/ MHz
10.7
10.7
39012 71102 01
Rev. 011
The selection of the reference crystal
frequency is based on some assumptions. As
for example: the first IF and the image
frequencies should not be in a radio band
where strong interfering signals might occur
(because they could represent parasitic
receiving signals), the LO1 signal should be in
the range of 300 MHz to 450 MHz (because
this is the optimum frequency range of the
VCO1). Furthermore the first IF should be as
high as possible to achieve highest RF image
rejection.
Page 5 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
2
Application Circuits
2.1
FSK Application Circuit
RSSI
GND
OUT_OA
GND
Circuit Diagram for FSK Reception
OUTP
GND
2.1.1
1 2
1 2
1 2
FSK output
C16
C15
C17
R4
R5
XTAL
CB3
VCC
VCC 17
OAN 19
OAP 20
VEE 22
TH71102
29 LF
GAIN_LNA
OUT_LNA
IN_MIX1
VEE
IF1P
IF1N
VCC
CB1
R2
C10
VEE 10
1
2
3
4
5
6
7
8
32 VCC
C11
FBC1 12
IN_IFA 11
31 IN_LNA
CB4
C9
VEE
L2
VCC
FBC2 13
30 VEE
50
L1
6
1
SAWFIL
3
4
C3
C12
VCC 14
28 ENRX
R1
IN_LNA
16
27 VCC
CB2
CERDIS
OUT_IFA 15
26 RO
1 2 3
VCC
ENRX
GND
25 VEE
C_RO
OUT_OA 18
VCC
RSSI 21
24
1 2
GND
RO
OUTP 23
C1
OUT_MIX2 9
CERFIL
C8
C7
L5
L4
CB5
VCC
C6
CB8
2 1
CB6
L3
GND
VCC
CB7
Circuit Features
•
•
Tolerates input frequency variations
Well-suited for NRZ, Manchester and similar codes
39012 71102 01
Rev. 011
Page 6 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
2.1.2
Board Component Values for FSK
Part
Size
Value
@ 315 MHz
Value
@ 433.92 MHz
C1
0805
27 pF
27 pF
±5%
crystal series capacitor
C3
0603
1 nF
1 nF
±10%
loop filter capacitor
C6
0603
6.8 pF
4.7 pF
±5%
LNA output tank capacitor
C7
0603
2.7 pF
2.2 pF
±5%
MIX1 input matching capacitor
C8
0603
27 pF
27 pF
±5%
IF1 tank capacitor
C9
0603
33 nF
33 nF
±10%
IFA feedback capacitor
C10
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C11
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C12
0805
10 pF
10 pF
±5%
DEMOD phase-shift capacitor
C15
0805
100 pF
100 pF
±5%
demodulator output low-pass capacitor,
this value for data rates < 20 kbps NRZ,
for higher data rates decrease the value
C16
0805
1.5 nF
1.5 nF
±10%
RSSI output low-pass capacitor
C17
0805
10 nF
10 nF
±10%
data slicer capacitor,
this value for data rates > 0.8 kbps NRZ,
for lower data rates increase the value
CB1 to CB5
CB7 to CB8
0603
330 pF
330 pF
±10%
de-coupling capacitor
CB6
0805
33 nF
33 nF
±10%
de-coupling capacitor
C_RO
0603
330 pF
330 pF
±5%
optional capacitor,
to couple external RO signal
Tolerance
Description
R1
0805
10 kΩ
10 kΩ
±5%
loop filter resistor
R2
0603
330 Ω
330 Ω
±5%
optional CERFIL output matching resistor
R4
0805
330 kΩ
330 kΩ
±5%
data slicer resistor
R5
0805
220 kΩ
220 kΩ
±5%
loading resistor
L1
0603
0Ω
68 nH
±5%
L2
0603
33 nH
82 nH
±5%
SAW filter matching inductor
from Würth-Elektronik (WE-KI series),
or equivalent part
L3
0603
22 nH
15 nH
±5%
LNA output tank inductor from Würth-Elektronik (WE-KI series), or equivalent part
L4
0603
100 nH
100 nH
±5%
L5
0603
100 nH
100 nH
±5%
IF1 tank inductor from Würth-Elektronik
(WE-KI series), or equivalent part
XTAL
SMD
6x3.5
HC49
SMD
SAWFIL
SMD
3x3
23.26429 MHz @
RF = 315 MHz
23.51222 MHz @
RF = 433.92 MHz
±25ppm cal.
±30ppm temp.
SAFCC433MBL0X00
(f0 = 433.92 MHz)
B3dB = 840 kHz
SAFDC315MSM0T00
(f0 = 315.00 MHz)
CERFIL
SMD
3.45x3.1
SFECF10M7HA00
CERDIS
SMD
4.5x2
CDSCB10M7GA135
39012 71102 01
Rev. 011
fundamental-mode crystal from
Telcona/Horizon (HEX22 series)
or equivalent part
fundamental-mode crystal, Cload = 10 pF
to 15pF, C0, max = 7 pF, R1, max = 50 Ωl
low-loss SAW filter from Murata
or equivalent part
B3dB = 5MHz
B3dB = 180 kHz
ceramic filter from Murata,
or equivalent part
ceramic discriminator from Murata,
or equivalent part
Page 7 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
2.1.3
Component Arrangement Top Side for FSK Reception
1
OUT_OA
RSSI
OUTP
Melexis
OUTN
Board size is 42.7mm x 37.5mm
1
C16
C15
1
R5
1
0Ω
17
16
L2
32
1
C12
C11
R2
C9
CB2
TH71102
L1
0Ω
CB4
24
25
C3
R1
RF_input
CB3
C1
C-RO
CERDIS
C17
1
ENRX RO
R4
XTAL
C10
8
9
CB1
CB5
C7
Page 8 of 14
VCC
1
CB6
L5
CB7
L4
CB8
EVB711XX_4
39012 71102 01
Rev. 011
C8
L3
C6
IN_LNA
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
Circuit Diagram for ASK Reception
OUT_OA
GND
2.2.1
ASK Application Circuit
RSSI
GND
2.2
1 2
1 2
ASK output
C16
R4
C17
CB3
VCC
XTAL
CB2
28 ENRX
C3
VCC 17
OAN 19
OAP 20
VEE 22
TH71102
29 LF
OUT_LNA
IN_MIX1
VEE
IF1P
IF1N
VCC
CB1
R2
C10
VEE 10
GAIN_LNA
31 IN_LNA
C11
FBC1 12
IN_IFA 11
1
2
3
4
5
6
7
8
32 VCC
CB4
C9
VEE
L2
VCC
FBC2 13
30 VEE
50
L1
6
1
SAWFIL
3
4
VCC 14
27 VCC
R1
IN_LNA
16
OUT_IFA 15
26 RO
1 2 3
VCC
ENRX
GND
25 VEE
C_RO
OUT_OA 18
VCC
RSSI 21
24
1 2
GND
RO
OUTP 23
C1
OUT_MIX2 9
CERFIL
C8
C7
L5
L4
CB5
VCC
39012 71102 01
Rev. 011
CB8
Page 9 of 14
C6
2 1
CB6
L3
GND
VCC
CB7
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
2.2.2
Board Component Values for ASK
Part
Size
Value
@ 315 MHz
Value
@ 433.92 MHz
C1
0805
27 pF
27 pF
±5%
crystal series capacitor
C3
0603
1 nF
1 nF
±10%
loop filter capacitor
C6
0603
6.8 pF
4.7 pF
±5%
LNA output tank capacitor
C7
0603
2.7 pF
2.2 pF
±5%
MIX1 input matching capacitor
C8
0603
27 pF
27 pF
±5%
IF1 tank capacitor
Tolerance
Description
C9
0603
33 nF
33 nF
±10%
IFA feedback capacitor
C10
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C11
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C16
0805
1.5 nF
1.5 nF
±10%
RSSI output low-pass capacitor,
this value for data rates < 10 kbps NRZ,
for higher data rates decrease the value
C17
0805
10 nF
10 nF
±10%
data slicer capacitor,
this value for data rates > 0.8 kbps NRZ,
for lower data rates increase the value
CB1 to CB5
CB7 to CB8
0603
330 pF
330 pF
±10%
de-coupling capacitor
CB6
0805
33 nF
33 nF
±10%
de-coupling capacitor
optional capacitor,
to couple external RO signal
C_RO
0603
330 pF
330 pF
±5%
R1
0805
10 kΩ
10 kΩ
±5%
loop filter resistor
R2
0603
330 Ω
330 Ω
±5%
optional CERFIL output matching resistor
R4
0805
330 kΩ
330 kΩ
±5%
data slicer resistor
L1
0603
0Ω
68 nH
±5%
L2
0603
33 nH
82 nH
±5%
SAW filter matching inductor
from Würth-Elektronik (WE-KI series),
or equivalent part
L3
0603
22 nH
15 nH
±5%
LNA output tank inductor from Würth-Elektronik (WE-KI series), or equivalent part
L4
0603
100 nH
100 nH
±5%
L5
0603
100 nH
100 nH
±5%
IF1 tank inductor from Würth-Elektronik
(WE-KI series), or equivalent part
XTAL
SMD
6x3.5
HC49
SMD
SAWFIL
CERFIL
SMD
3x3
SMD
3.45x3.1
39012 71102 01
Rev. 011
23.26429 MHz @
RF = 315 MHz
23.51222 MHz @
RF = 433.92 MHz
±25ppm cal.
±30ppm temp.
SAFCC433MBL0X00
(f0 = 433.92 MHz)
B3dB = 840 kHz
SAFDC315MSM0T00
(f0 = 315.00 MHz)
SFECF10M7HA00
fundamental-mode crystal from
Telcona/Horizon (HEX22 series)
or equivalent part
fundamental-mode crystal, Cload = 10 pF
to 15pF, C0, max = 7 pF, R1, max = 50 Ωl
low-loss SAW filters from Murata
or equivalent part
B3dB = 5MHz
B3dB = 180 kHz
Page 10 of 14
ceramic filter from Murata,
or equivalent part
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
2.2.3
Component Arrangement Top Side for ASK Reception
OUT_OA
RSSI
OUTP
1
C16
1
1
XTAL
C17
17
16
TH71102
L1
L2
32
1
R2
C9
CB2
C11
CB4
24
25
C3
R1
RF_input
CB3
C1
C-RO
0Ω
1
ENRX RO
R4
Melexis
OUTN
Board size is 42.7mm x 37.5mm
C10
8
9
CB1
CB5
C7
Page 11 of 14
VCC
1
CB6
L5
CB7
L4
CB8
EVB711XX_4
39012 71102 01
Rev. 011
C8
L3
C6
IN_LNA
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
3
Evaluation Board Layouts
VCC
Board layout data in Gerber format is available, board size is 37.5mm x 42.7mm.
OUT_OA
RSSI
OUTP
EVB711XX_4
IN_LNA
ENRX RO
Melexis
OUTN
4
Melexis
PCB bottom view
PCB top view
Board Variants
Type
EVB71102
Frequency/MHz
Modulation
Board Execution
–315
–FSK
–A
antenna version
–433
–ASK
–C
connector version
–868
–FM
–915
Note:
39012 71102 01
Rev. 011
available EVB setups
Page 12 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
5
Package Description
The device TH71102 is RoHS compliant.
D
D1
A
24
17
16
25
b
E
e
E1
32
9
1
8
A2
A1
12° +1°
0.25
(0.0098)
c
12° +1°
L
.10 (.004)
Fig. 2: LQFP32 (Low profile Quad Flat Package)
All Dimension in mm, coplanaríty < 0.1mm
E1, D1
E, D
A
A1
A2
e
b
c
L
α
7.00
9.00
1.40
1.60
0.05
0.15
1.35
1.45
0.8
0.30
0.45
0.09
0.20
0.45
0.75
0°
7°
0.053
0.057
0.031
0.012
0.018
0.0035
0.0079
0.018
0.030
0°
7°
min
max
All Dimension in inch, coplanaríty < 0.004”
min
max
5.1
0.276
0.354
0.055
0.063
0.002
0.006
Soldering Information
•
39012 71102 01
Rev. 011
The device TH71102 is qualified for MSL3 with soldering peak temperature 260 deg C
according to JEDEC J-STD-2.
Page 13 of 14
EVB Description
June/07
EVB71102
315/433MHz Receiver
Evaluation Board Description
6
Disclaimer
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Or for additional information contact Melexis Direct:
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ISO/TS 16949 and ISO14001 Certified
39012 71102 01
Rev. 011
Page 14 of 14
EVB Description
June/07
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