INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4077B gates Quadruple exclusive-NOR gate Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF4077B gates Quadruple exclusive-NOR gate DESCRIPTION The HEF4077B provides the exclusive-NOR function. The outputs are fully buffered for best performance. Fig.2 Pinning diagram. Fig.1 Functional diagram. HEF4077BP(N): 14-lead DIL; plastic HEF4077BD(F): 14-lead DIL; ceramic (cerdip) (SOT27-1) (SOT73) HEF4077BT(D): 14-lead SO; plastic (SOT108-1) ( ): Package Designator North America TRUTH TABLE An Bn On L L H L H L H L L H H H Note 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) Fig.3 Logic diagram (one gate). FAMILY DATA, IDD LIMITS category GATES See Family Specifications January 1995 2 Philips Semiconductors Product specification HEF4077B gates Quadruple exclusive-NOR gate AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL TYPICAL EXTRAPOLATION FORMULA TYP. MAX. Propagation delays An, Bn → On HIGH to LOW 75 150 ns 48 ns + (0,55 ns/pF) CL 35 70 ns 24 ns + (0,23 ns/pF) CL 30 55 ns 22 ns + (0,16 ns/pF) CL 70 145 ns 43 ns + (0,55 ns/pF) CL 30 60 ns 19 ns + (0,23 ns/pF) CL 15 25 50 ns 17 ns + (0,16 ns/pF) CL 5 60 120 ns 10 ns + (1,0 ns/pF) CL 30 60 ns 9 ns + (0,42 ns/pF) CL 5 10 tPHL 15 5 LOW to HIGH 10 tPLH Output transition times HIGH to LOW LOW to HIGH 10 tTHL 15 20 40 ns 6 ns + (0,28 ns/pF) CL 5 60 120 ns 10 ns + (1,0 ns/pF) CL 30 60 ns 9 ns + (0,42 ns/pF) CL 20 40 ns 6 ns + (0,28 ns/pF) CL 10 tTLH 15 VDD V Dynamic power 5 TYPICAL FORMULA FOR P(µW) 850 fi + ∑ (foCL) × VDD2 dissipation per 10 4 500 fi + ∑ (foCL) × VDD package (P) 15 14 700 fi + ∑ (foCL) × VDD2 2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) January 1995 3