® INA INA143 INA2143 214 3 INA 143 For most current data sheet and other product information, visit www.burr-brown.com High-Speed, Precision, G = 10 or G = 0.1 DIFFERENCE AMPLIFIERS FEATURES APPLICATIONS ● DESIGNED FOR LOW COST ● G = 10V/V or G = 0.1V/V ● DIFFERENTIAL INPUT AMPLIFIER BUILDING BLOCK ● DIFF IN/DIFF OUT AMPLIFIER ● SINGLE, DUAL VERSIONS ● LOW OFFSET VOLTAGE: ±250µV max, ±3µV/°C max ● GAIN = –10 INVERTING AMPLIFIER ● GAIN = +10 NON-INVERTING AMPLIFIER ● LOW GAIN ERROR: 0.01% ● HIGH SLEW RATE: 5V/µs ● GAIN = +11 NON-INVERTING AMPLIFIER ● SYNCHRONOUS DEMODULATOR ● FAST SETTLING TIME: 9µs to 0.01% ● LOW QUIESCENT CURRENT: 950µA ● CURRENT/DIFFERENTIAL LINE RECEIVER ● VOLTAGE-CONTROLLED CURRENT SOURCE ● WIDE SUPPLY RANGE: ±2.25V to ±18V ● SO-8 and SO-14 PACKAGES ● BATTERY POWERED SYSTEMS ● LOW COST AUTOMOTIVE DESCRIPTION The differential amplifier is the foundation of many commonly used circuits. The low cost INA143 and INA2143 provide this precision circuit function without using an expensive precision network. The INA143 and INA2143 are high slew rate, gain of 10V/V or 0.1V/V difference amplifiers consisting of a precision op amp with a precision resistor network. The on-chip resistors are laser trimmed for accurate gain and high common-mode rejection. Excellent TCR tracking of the resistor maintains gain accuracy and commonmode rejection over temperature. They operate over a wide supply range, ±2.25V to ±18V (+4.5V to +36V single supply), and input common-mode voltage range extends beyond the positive and negative supply rails. The single version, INA143, package is the SO-8 surface mount. The dual version, INA2143, package is the SO-14 surface mount. Both are specified for operation over the extended industrial temperature range, –40°C to +85°C. Operation is from –55°C to +125°C. V+ 11 –In A 2 10kΩ 100kΩ 12 Sense A V+ –In 2 10kΩ 100kΩ 5 6 +In 3 10kΩ 13 A 7 100kΩ 1 Sense +In A –In B Output 3 6 10kΩ 100kΩ 10kΩ 100kΩ INA143 4 +In B 5 10kΩ 100kΩ V– 10 9 B Ref 14 8 Out A Ref A Sense B Out B Ref B INA2143 4 V– International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ©1999 Burr-Brown Corporation SBOS116 PDS-1531A Printed in U.S.A. June, 1999 SPECIFICATIONS: VS = ±15V At TA = +25°C, VS = ±15V, G = 10, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. INA143U INA2143U PARAMETER CONDITIONS OFFSET VOLTAGE(1) Initial(1) vs Temperature vs Power Supply vs Time Channel Separation (dual) MIN RTI VCM = 0V VS = ±2.25V to ±18V dc INPUT IMPEDANCE(3) Differential Common-Mode TYP MAX ±100 ±1 ±5 0.2 140 ±250 ±3 ±20 MIN 20 55 INPUT VOLTAGE RANGE Common-Mode Voltage Range Positive Negative Common-Mode Rejection Ratio TYP MAX UNITS ✻ ±500 See Typical Curve ✻ ±30 ✻ µV µV/°C µV/V µV/√mo dB ✻ ✻ kΩ kΩ ✻ ✻ ✻ V V dB ✻ ✻ ✻ ✻ µVp-p nV/√Hz nV/√Hz nV/√Hz RTI VCM ✻ ✻ 80 VO = 0V 1.1[(V+)– 1.5] 1.1[(V+) –1] 1.1[(V–) +1.5] 1.1[(V–) + 1] VO = 0V = –14.85V to 14.85V, RS = 0Ω 86 96 OUTPUT VOLTAGE NOISE(3) f = 0.1Hz to 10Hz f = 10Hz f = 100Hz f = 1kHz RTI 1 45 30 27 GAIN Initial Error vs Temperature Nonlinearity 10 ±0.01 ±1 ±0.0001 VO = –14V to +13.5V VO = –14V to +13.5V OUTPUT Voltage Output Positive Negative Positive Negative Current Limit Capacitive Load (stable operation) FREQUENCY RESPONSE Small-Signal Bandwidth Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time Gain Error < 0.1% RL = 10kΩ to Ground RL = 10kΩ to Ground R L = 100kΩ to Ground R L = 100kΩ to Ground Continuous-to-Common (V+) –1.5 (V–) +1 –3dB VO = 10V Step, CL = 100pF VO = 10V Step, CL = 100pF 50% Overdrive POWER SUPPLY Rated Voltage Operating Voltage Range Dual Supplies Single Supply Quiescent Current (per amplifier) TEMPERATURE RANGE Specification Operation Storage Thermal Resistance SO-8 Surface Mount SO-14 Surface Mount INA143UA INA2143UA ✻ ✻ ±0.1 ✻ ±0.002 V/V % ppm/°C % of FS ✻ ✻ ✻ ✻ ✻ ✻ V V V V mA pF 0.15 5 6 9 6 ✻ ✻ ✻ ✻ ✻ MHz V/µs µs µs µs ±15 ✻ V (V+) –1.3 (V–) +0.8 (V+) –0.8 (V–) +0.3 –25, +32 1000 ±2.25 +4.5 ±0.95 IO = 0 ✻ ✻ ✻ ✻ ±0.05 ±10 ±0.001 –40 –55 –55 ±18 +36 ±1.2 ✻ ✻ +85 +125 +125 ✻ ✻ ✻ ✻ θJA 150 100 ✻ ✻ ✻ ✻ ✻ V V mA ✻ ✻ ✻ °C °C °C °C/W °C/W ✻ Specifications the same as INA143U, INA2143U. NOTES: (1) Includes the effects of amplifier’s input bias and offset currents. (2) Internal resistors are ratio matched but have ±20% absolute value. (3) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® INA143, INA2143 2 SPECIFICATIONS: VS = ±5V At TA = +25°C, VS = ±5V, G = 10, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. INA143U INA2143U PARAMETER CONDITIONS OFFSET VOLTAGE(1) Initial(1) vs Temperature MIN RTI VCM = 0V INPUT VOLTAGE RANGE Common-Mode Voltage Range Positive Negative Common-Mode Rejection Ratio INA143UA INA2143UA TYP MAX ±200 ±1 ±500 MIN TYP MAX UNITS ✻ ✻ ±750 µV µV/°C RTI ✻ ✻ 80 VO = 0V 1.1[(V+)– 1.5] 1.1[(V+) –1] 1.1[(V–) +1.5] 1.1[(V–) +1] VO = 0V VCM = –3.85V to +3.85V, RS = 0Ω 86 96 GAIN Initial Gain Error Nonlinearity 10 ±0.01 ±0.0001 VO = –4V to +3.5V VO = –4V to +3.5V OUTPUT Voltage Output Positive Negative Positive Negative Gain Error < 0.1% RL = 10kΩ to Ground RL = 10kΩ to Ground R L = 100kΩ to Ground R L = 100kΩ to Ground POWER SUPPLY Rated Voltage Operating Voltage Range Dual Supplies Single Supply Quiescent Current (per amplifier) (V+) –1.5 (V–) +1 ✻ ✻ ✻ ±0.05 ±0.001 ✻ ✻ (V+)–1.3 (V–)+0.8 (V+)–0.8 (V–)+0.3 +5 ±2.25 +4.5 ±0.92 IO = 0 ✻ ✻ ✻ ±18 +36 ±1.2 V V dB ±0.1 ±0.002 V/V % % of FS ✻ ✻ ✻ ✻ V V V V ✻ V ✻ ✻ ✻ ✻ ✻ ✻ V V mA ✻ Specifications the same as INA143U, INA2143U. NOTES: (1) Includes the effects of amplifier’s input bias and offset currents. ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC DISCHARGE SENSITIVITY Supply Voltage, V+ to V– .................................................................... 36V Input Signal (G = 10), Voltage ..................................................... 1.1 • VS Current ........................................................ 0.5mA Input Signal (G = 0.1), Voltage ..................................................... 11 • VS Current ....................................................... 0.5mA Output Short-Circuit (to ground)(2) .......................................... Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) One channel per package. PACKAGE/ORDERING INFORMATION PRODUCT Single INA143U " INA143UA " Dual INA2143U " INA2143UA " PACKAGE PACKAGE DRAWING NUMBER(1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER(2) TRANSPORT MEDIA SO-8 Surface Mount 182 –40°C to +85°C INA143U " " " " SO-8 Surface Mount 182 –40°C to +85°C INA143UA " " " " INA143U INA143U/2K5 INA143UA INA143UA/2K5 Rails Tape and Reel Rails Tape and Reel SO-14 Surface Mount 235 –40°C to +85°C INA2143U " " " " SO-14 Surface Mount 235 –40°C to +85°C INA2143UA INA2143U INA2143U/2K5 INA2143UA Rails Tape and Reel Rails " " " " INA2143UA/2K5 Tape and Reel NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA143UA/2K5” will get a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book. ® 3 INA143, INA2143 PIN CONFIGURATIONS Top View SO-8 Top View SO-14 INA2143 INA143 Ref 1 8 NC –In 2 7 V+ +In 3 6 Output V– 4 5 Sense NC 1 –In A 2 14 Ref A 13 Out A A +In A 3 12 Sense A V– 4 11 V+ +In B 5 10 Sense B B –In B 6 9 Out B NC 7 8 Ref B NC = No Connection NC = No Connection ® INA143, INA2143 4 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, G = 10, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. COMMON-MODE REJECTION vs FREQUENCY 100 0 90 Closed-Mode Rejection (dB) Closed-Loop Gain (dB) GAIN vs FREQUENCY 5 –5 –10 –15 80 70 60 50 VS = ±15V or ±5V VS = ±15V or ±5V –20 40 10k 100k 1M 100 1k Frequency (Hz) POWER SUPPLY REJECTION vs FREQUENCY 100k 1M MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 32 Peak-to-Peak Output Voltage (V) 120 Power Supply Rejection (dB) 10k Frequency (Hz) 100 –PSRR 80 60 +PSRR 40 20 VS = ±15V 28 24 20 16 12 VS = ±5V 8 4 0 1 10 100 1k 10k 100k 10k 100k 1M Frequency (Hz) Frequency (Hz) INPUT COMMON-MODE VOLTAGE vs OUTPUT VOLTAGE TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY 20 0.1 VS = ±15V 500kHz Filter 10 5 THD+N (%) Common-Mode Voltage (V) 15 0 –5 –10 0.01 VS = ±5V –15 –20 0.001 –15 –10 –5 0 5 10 15 20 Output Voltage (V) 100 1k 10k 20k Frequency (Hz) ® 5 INA143, INA2143 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, G = 10, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. 0.1Hz TO 10Hz PEAK-TO-PEAK VOLTAGE NOISE VOLTAGE NOISE DENSITY vs FREQUENCY 0.5µV/div Voltage Noise (nV/√Hz) 100 10 1 10 100 1k 10k 500µs/div Frequency (Hz) QUIESCENT CURRENT vs TEMPERATURE SLEW RATE vs TEMPERATURE 1400 7 VS = ±15V VS = ±5V Per Amplifier –SR 6 Slew Rate (V/µs) 1200 1100 1000 900 5 +SR 4 800 3 700 –75 –50 –25 0 25 50 75 100 125 –75 –50 –25 Temperature (°C) SHORT-CIRCUIT CURRENT vs TEMPERATURE 25 50 75 100 –40°C (V+) –5 +ISC Output Voltage (V) 25°C 30 –ISC 25 +ISC 20 125 OUTPUT VOLTAGE SWING vs OUTPUT CURRENT V+ VS = ±15V VS = ±5V 35 0 Temperature (°C) 40 Short-Circuit |mA| Quiescent Current (µA) 1300 (V+) –10 85°C 0 85°C 25°C (V–) +10 (V–) +5 –40°C –ISC 15 (V–) –75 –50 –25 0 25 50 75 100 0 125 ® INA143, INA2143 ±5 ±10 ±15 ±20 Output Current (mA) Temperature (°C) 6 ±25 ±30 ±35 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, G = 10, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. OFFSET VOLTAGE PRODUCTION DISTRIBUTION VS = ±15V 30 20 Typical production distribution of packaged units. Singles and duals included. 20 Typical production distribution of packaged units. Singles and duals included. 18 16 Percent of Units (%) 25 Percent of Units (%) OFFSET VOLTAGE PRODUCTION DISTRIBUTION VS = ±5V 15 10 14 12 10 8 6 4 5 2 0 OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION VS = ±5V 60 30 20 40 0 0 2 2.5 3 3.5 4 4.5 5 5.5 700 600 20 10 1.5 500 30 10 1 Typical production distribution of packaged units. Singles and duals included. 50 Percent of Units (%) 40 0.5 400 OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION VS = ±15V Typical production distribution of packaged units. Singles and duals included. 0 300 200 0 100 –100 –200 –300 Offset Voltage (µV) 50 0 6 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Offset Voltage Drift (µV/°C) Offset Voltage Drift (µV/°C) CHANNEL SEPARATION vs FREQUENCY SETTLING TIME vs CAPACITIVE LOAD 150 20 G = 10 G = 0.1 Channel Separation (dB) 0.01%, VS = ±15V 15 Settling Time (µs) –400 –500 –600 Offset Voltage (µV) 60 Percent of Units (%) –700 –500 –450 –400 –350 –300 –250 –200 –150 –100 –50 0 50 100 150 200 250 300 350 400 450 500 0 0.01%, VS = ±15V 0.01%, VS = ±5V 10 5 140 130 120 0.1%, VS = ±15V INA2143 110 0 0 500 1000 100 1500 1k 10k 100k Frequency (Hz) Capacitive Load (pF) ® 7 INA143, INA2143 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, G = 10, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. LARGE-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE CL = 100pF 5V/div 100mV/div CL = 500pF CL = 1500pF 25µs/div 2.5µs/div ® INA143, INA2143 8 APPLICATIONS INFORMATION throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the Typical Performance Curves. The INA143 and INA2143 are high-speed difference amplifiers suitable for a wide range of general-purpose applications. Figure 1 shows the basic G = 10 configuration. The input and feedback resistors can be reversed to achieve G = 0.1, as shown in Figure 2. For applications requiring G = 1, the INA133 and INA2133 are recommended. OFFSET VOLTAGE TRIM The INA143 and INA2143 are laser trimmed for low offset voltage and drift. Most applications require no external offset adjustment. Figure 3 shows an optional circuit for trimming the output offset voltage. The output is referred to the output reference terminal (pin 1), which is normally grounded. A voltage applied to the Ref terminal will be summed with the output signal. This can be used to null offset voltage as shown in Figure 3. The source impedance of a signal applied to the Ref terminal should be less than 10Ω to maintain good common-mode rejection. Decoupling capacitors are strongly recommended for applications with noisy or high impedance power supplies. The capacitors should be placed close to the device pins as shown in Figure 1. All circuitry is completely independent in the dual version assuring lowest crosstalk and normal behavior when one amplifier is overdriven or short-circuited. As shown in Figure 1, the differential input signal is connected to pins 2 and 3. The source impedances connected to the inputs must be nearly equal to assure good commonmode rejection. A 5Ω mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 86dB (RTI). If the source has a known impedance mismatch, an additional resistor in series with the opposite input can be used to preserve good commonmode rejection. INA143 –In V2 5 R1 10kΩ R2 100kΩ 2 6 The INA143’s internal resistors are accurately ratio trimmed to match. That is, R1/R2 and R3/R4 are trimmed to equal 0.1. However, the absolute values may not be equal (R1 + R2 may be slightly different than R3 + R4). Thus, large series resistors on the input (greater than 100Ω), even if well matched, will degrade common-mode rejection. VO = 0.1 (V3 – V2) +In 1 V3 R3 10kΩ R4 100kΩ 3 FIGURE 2. G = 0.1 Difference Amplifier. V+ V– 1µF 1µF G = 10 7 4 INA143 INA143 –In V2 2 R1 10kΩ R2 100kΩ 2 V2 5 R2 100kΩ R1 10kΩ 5 6 VO 6 VO = 10 (V3 – V2) +In V3 3 R3 10kΩ R4 100kΩ 10Ω V3 3 R3 10kΩ 1 Compensates for impedance at pin 1—see text. R4 100kΩ +15V 1 499kΩ FIGURE 1. G = 10 Basic Power Supply and Signal Connections. 100kΩ VO = 10 (V3 – V2) Offset Adjustment Range = ±3mV OPERATING VOLTAGE The INA143 and INA2143 operate from single (+4.5V to +36V) or dual (±2.25V to ±18V) supplies with excellent performance. Specifications are production tested with ±5V and ±15V supplies. Most behavior remains unchanged 100Ω –15V FIGURE 3. Offset Adjustment. ® 9 INA143, INA2143 INA143 V1 –In 10Ω V1 10kΩ 2 100kΩ 5 200Ω A1 Gain Adjust INA143 2 R2 10kΩ 100kΩ 5 VO 6 6 R1 VO R2 10Ω V2 10kΩ 3 100kΩ 1 200Ω 3 CMR Adjust A2 To eliminate adjustment interactions, first adjust gain with V2 grounded. 10kΩ 100kΩ 1 V0 = 10 (1 + 2R2 /R1) (V2 – V1) V2 +In FIGURE 4. Difference Amplifier with Gain and CMR Adjust. The INA143 can be combined with op amps to form a complete instrumentation amplifier with specialized performance characteristics. Burr-Brown offers many complete high performance IAs. Products with related performances are shown at the right in the table below. INA143 10kΩ V2 100kΩ 2 5 6 10kΩ VO = –10 • V2 100kΩ 3 1 A1, A2 FEATURE SIMILAR COMPLETE BURR-BROWN IA OPA2227 Low Noise INA103 OPA129 Ultra Low Bias Current (fA) INA116 OPA2277 Low Offset Drift, Low Noise INA114, INA128 OPA2130 Low Power, FET-Input (pA) INA121 OPA2234 Single Supply, Precision, Low Power INA122, INA118 OPA2237 Single Supply, Low Power, MSOP-8 INA122, INA126 FIGURE 7. Precision Instrumentation Amplifier. Gain Error = 0.05% maximum Nonlinearity = 0.001% maximum Gain Drift = 1ppm/°C INA143 R1 10kΩ 2 R2 100kΩ 5 FIGURE 5. Precision G = –10 Inverting Amplifier. V1 1 R4 100kΩ INA143 R1 10kΩ 2 VIN R2 100kΩ R4 100kΩ 1 V3 VO = V1 + 10 • V3 R3 10kΩ 3 5 6 ±55V Without Damage 6 FIGURE 8. Precision Summing Amplifier. VO = VIN INA143 R3 10kΩ 2 10kΩ 100kΩ 5 3 1 VIN This circuit follows an 11/1 divider with a gain of 11 for an overall gain of unity. With an 11/1 divider, the input signal can exceed 55V without damage as long as input current is less than 0.5mA. FIGURE 6. Voltage Follower with Input Protection. 10kΩ FIGURE 9. Precision G = 11 Buffer. ® INA143, INA2143 3 100kΩ 10 6 VO = 11 • VIN Gain Error = 0.05% maximum PACKAGE OPTION ADDENDUM www.ti.com 6-Jul-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty INA143U ACTIVE SOIC D 8 INA143U/2K5 ACTIVE SOIC D INA143U/2K5E4 ACTIVE SOIC INA143UA ACTIVE INA143UA/2K5 75 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SOIC D 8 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA143UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA143UAG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA143UG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2143U ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2143U/2K5E4 OBSOLETE SOIC D 14 TBD Call TI INA2143UA ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2143UAE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2143UAG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2143UE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2143UG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 75 Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 6-Jul-2009 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant INA143U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 INA143UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA143U/2K5 SOIC D 8 2500 346.0 346.0 29.0 INA143UA/2K5 SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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