MMPQ3725 Quad Core Driver Transistor NPN Silicon MAXIMUM RATINGS Rating Symbol Value Unit Collector −Emitter Voltage VCEO 40 Vdc Collector −Emitter Voltage VCES 60 Vdc Emitter −Base Voltage VEB 5.0 Vdc IC 1.0 Adc TJ, Tstg −55 to +150 °C Collector Current — Continuous Operating and Storage Junction Temperature Range Each Transistor Total Power Dissipation @ TA = 25°C Derate above 25°C PD Power Dissipation @ TC = 25°C Derate above 25°C PD Operating and Storage Junction Temperature Range Four Transistors Equal Power W 0.6 4.8 1.4 11.2 mW/°C W 1.0 8.0 TJ, Tstg 2.5 2.0 http://onsemi.com 16 1 CASE 751B−05, STYLE 4 SO−16 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 mW/°C −55 to +150 °C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max 40 — — 60 — — 5.0 — — — — 0.5 Unit OFF CHARACTERISTICS Collector −Emitter Breakdown Voltage(1) (IC = 10 mAdc, IB = 0) V(BR)CEO Collector −Base Breakdown Voltage (IC = 100 mAdc, VBE = 0) V(BR)CES Emitter −Base Breakdown Voltage (IE = 10 mAdc, IC = 0) V(BR)EBO Collector Cutoff Current (VCB = 40 Vdc, IE = 0) ICBO Vdc Vdc Vdc mAdc 1. Pulse Test: Pulse Width v 300 ms; Duty Cycle v 2.0%. Preferred devices are ON Semiconductor recommended choices for future use and best overall value. © Semiconductor Components Industries, LLC, 2006 August, 2006 − Rev. 3 1 Publication Order Number: MMPQ3725/D MMPQ3725 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Symbol Characteristic ON Min Typ Max 35 25 75 45 200 — Unit CHARACTERISTICS(1) DC Current Gain (IC = 100 mAdc, VCE = 1.0 Vdc) (IC = 500 mAdc, VCE = 2.0 Vdc) hFE — Collector −Emitter Saturation Voltage (IC = 500 mAdc, IB = 50 mAdc) VCE(sat) — 0.32 0.45 Vdc Base −Emitter Saturation Voltage (IC = 500 mAdc, IB = 50 mAdc) VBE(sat) 0.8 0.9 1.1 Vdc fT — 275 — MHz Output Capacitance (VCB = 10 Vdc, IE = 0, f = 1.0 MHz) Cob — 5.1 — pF Input Capacitance (VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) Cib — 62 — pF Turn−On Time (IC = 500 mAdc, IB1 = 50 mAdc, VBE(off) = −3.8 Vdc) ton — 20 — ns Turn−Off Time (IC = 500 mAdc, IB1 = IB2 = 50 mAdc) toff — 50 — ns DYNAMIC CHARACTERISTICS Current −Gain — Bandwidth Product (IC = 50 mAdc, VCE = 10 Vdc, f = 100 MHz) SWITCHING CHARACTERISTICS 1. Pulse Test: Pulse Width v 300 ms; Duty Cycle v 2.0%. http://onsemi.com 2 MMPQ3725 INFORMATION FOR USING THE SO−16 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.060 1.52 0.275 7.0 0.155 4.0 0.024 0.6 0.050 1.270 inches mm SO−16 SO−16 POWER DISSIPATION SOLDERING PRECAUTIONS The power dissipation of the SO−16 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SO−16 package, PD can be calculated as follows: PD = • • TJ(max) − TA RθJA • The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 1.4 watts. 150°C − 25°C PD = 89.3°C/W • = 1.4 watts • The 89.3°C/W for the SO−16 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 1.4 watts. There are other alternatives to achieving higher power dissipation from the SO−16 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. • • The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. Always preheat the device. The delta temperature between the preheat and soldering should be 100°C or less.* When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. The soldering temperature and time shall not exceed 260°C for more than 10 seconds. When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 3 MMPQ3725 PACKAGE DIMENSIONS CASE 751B−05 SO−16 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− 16 9 −B− 1 P 8 PL 0.25 (0.010) 8 M B S G K C −T− R F X 45 _ SEATING PLANE D 16 PL 0.25 (0.010) M T B S A S M J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 STYLE 4: PIN 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 COLLECTOR, DYE #1 COLLECTOR, #1 COLLECTOR, #2 COLLECTOR, #2 COLLECTOR, #3 COLLECTOR, #3 COLLECTOR, #4 COLLECTOR, #4 BASE, #4 EMITTER, #4 BASE, #3 EMITTER, #3 BASE, #2 EMITTER, #2 BASE, #1 EMITTER, #1 Thermal Clad is a trademark of the Bergquist Company ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 4 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MMPQ3725/D