ELM743xxA CMOS Low power voltage dual comparator Preliminary ■General description ELM743xxA is a low voltage and low power dual comparator which can input and output signals in full range of Vdd to Vss. ELM743xxA can operate with single power source and low voltage supply (operating voltage range:Vdd≥1.2V) condition. ELM743xxA provides 2 kinds of output style: N-ch opendrain and CMOS output. ■Features ■Application • Low voltage operation : Vdd≥1.2V • Low current consumption : Typ.2μA(Vdd=3.6V, VoutA=VoutB=Low) Typ.1.2μA(Vdd=3.6V, VoutA=VoutB=High) • Operating voltage range : 1.2V≤Vdd≤7.0V • Input voltage range : Vss to Vdd • Output stage : N-ch open drain or CMOS output selectable • Package : TSON8-2×2, MSOP-8 • Battery-operated devices • Micropower signal processing • Low voltage analog circuits ■Maximum absolute ratings Parameter Power supply voltage Input voltage Output voltage Symbol Vdd Vin Limit Vss-0.3 to +8.0 Vss-0.3 to Vdd+0.3 N-ch : Vss-0.3 to +8.0 CMOS : Vss-0.3 to Vdd+0.3 200 (TSON8-2×2) 250 (MSOP-8) -20 to +70 -55 to +125 Vout Power dissipation Pd Operating temperature Storage temperature Top Tstg Unit V V V mW °C °C ■Selection guide ELM743xxA-x Symbol a Output form b Package c Product version d Taping direction N : N-ch open drain C : CMOS M : TSON8-2×2 N : MSOP-8 C(fixed) S: Refer to PKG file N: Refer to PKG file 4- 1 ELM743 x x A - x ↑ ↑↑ ↑ a b c d Rev.1.0 ELM743xxA CMOS Low power voltage dual comparator Preliminary ■Pin configuration TSON8-2×2(TOP VIEW) A - + 3 4 + B - 7 2 6 3 5 Pin No. 1 2 3 4 5 6 7 8 8 1 8 1 2 MSOP-8(TOP VIEW) A - 7 + B + - 6 5 4 ■Electrical characteristics Parameter Power supply voltage Common-mode input voltage Input offset voltage Input current Output current Current consumption Response time Symbol Vdd Vicr Vio-1 Vio-2 Iin IoutN-1 IoutN-2 IoutP-1 IoutP-2 Iss-1 Iss-2 tHL tLH Condition Vdd=1.2 to 7.0V Vicr=Vss to Vdd-1V Vicr=Vdd-1V to Vdd Vdd=1.2 to 7.0V Vdd=1.2V, Vout=0.4V Vdd=1.5V, Vout=0.4V Vdd=1.2V, Vout=0.6V Vdd=1.5V, Vout=1.1V Vdd=3.6V, Vout:"L" Vdd=7.0V, Vout:"L" Vdd=3.6V Vdd=3.6V Min. 1.2 Vss Typ. 1.8 4.0 0.15 0.35 4.0 6.0 0.30 0.45 2.0 2.2 30 30 Pin name OUTA IN-A IN+A VSS IN+B IN-B OUTB VDD Vss=0V, Top=25°C Max. Unit 7.0 V Vdd V 8 mV 12 mV 100 pA mA mA 5.6 6.0 μA μA μs μs ■Marking TSON8-2×2 MSOP-8 7 4 3a bcd 7 4 3a bcd Symbol a b, c, d Mark N : N-ch open drain C : CMOS 000 to 999 4- 2 Content Output stage Assembly Lot No. Rev.1.0 ELM743xxA CMOS Low power voltage dual comparator Preliminary ■Typical operating characteristics 3.0 Iss-Vdd Offset voltage distribution (Vicr=Vss) Iss - Vdd VOS - Distribution Top=70 �, Vout="L" 20 Top=25 �, Vout="L" 2.0 Percent (%) Iss (��� 2.5 Top=-20 �, Vout="L" 1.5 Top=70 �, Vout="H" 1.0 Top=25 �, Vout="H" 1 3 2 4 Vdd (V) 5 15 10 5 Top=-20 �, Vout="H" 0.5 0 6 -8 7 Offset voltage distribution (Vicr=Vdd/2) Percent (%) Percent (%) 5 VOS (mV) 8 Vdd=3.6V, Vicr=3.6V 8 6 4 2 -6 -4 -2 0 2 VOS (mV) IoutN - Vdd 4 6 -10 -8 -6 -4 -2 8 0 4 2 VOS (mV) 6 8 10 IoutP - Vdd Vout=0.4V 2.5 Vout=Vdd-0.4V 2.0 4-3 IoutP (mA) 30 IoutN (mA) 6 4 2 0 10 10 10 -2 12 15 20 -4 VOS - Distribution Vdd=3.6V, Vivr=1.8V 20 40 -6 Offset voltage distribution (Vicr=Vdd) VOS - Distribution 25 -8 Vdd=3.6V, Vicr=0V 25 1.5 Rev.1.0 1.0 0.5 Per Per 10 10 5 5 -8 -8 4 4 2 2 ELM743xxA -6 -4 comparator -2 0 2 4 6 -10 -8 dual 2 CMOS 4 -6 -4 -2 0 6 8Low power voltage -6 -4 -2 2 VOS0(mV) 4 VOS (mV) 6 -2 0(mV) 2 4 -10 -8 -6 -4 VOS 8 VOS (mV) IoutN-Vdd (Vout=0.4V) IoutN - Vdd IoutN - Vdd Vout=0.4V Vout=0.4V IoutP - Vdd IoutP - VddVout=Vdd-0.4V 2.5 2.5 Vout=Vdd-0.4V 2.0 2.0 30 30 20 20 10 10 1.5 1.5 1.0 1.0 0.5 0.5 0 0 1 1 2 2 3 4 3 4 Vdd (V) Vdd (V) 5 5 6 6 0 0 7 7 tHL, tLH-Vdd 30 30 tHL, tLH (�s) tHL, tLH (�s) tHL tHL tLH tLH 1 1 2 2 4 3 4 3 Vdd (V) Vdd (V) 5 5 6 6 7 7 Vdd=3.6V, Vin+=1.8V, Vin-=1.75�1.85V tHL, tLH - Top Vdd=3.6V, Vin+=1.8V, Vin-=1.75�1.85V 25 25 0 0 2 2 tHL, tLH - Top Vin+=Vdd/2, Vin-=Vdd tHL, tLH/ to-0.05V Vdd� Vdd /2+0.05V Vin+=Vdd/2, Vin-=Vdd / to 0.05V � Vdd /2+0.05V 80 80 70 70 60 60 50 50 40 40 30 30 20 20 10 10 1 1 tHL, tLH-Top (Vdd=3.6V) tHL, tLH - Vdd tHL, tLH (�s) tHL, tLH (�s) 8 10 8 10 Preliminary IoutP-Vdd (Vout=Vdd to 0.4V) IoutP (mA) IoutP (mA) IoutN (mA) IoutN (mA) 40 40 6 20 20 15 15 10 10 tHL tHL tLH tLH 5 5 3 4 3 4 Vdd (V) Vdd (V) 5 5 6 6 7 7 -20 -10 0 -20 -10 0 4- 4 10 20 30 40 50 60 70 10 Top 20 (�) 30 40 50 60 70 Top (�) Rev.1.0