Ultralow Noise,
200 mA Linear Regulator
ADM7160
Data Sheet
FEATURES
APPLICATION CIRCUIT
APPLICATIONS
ADM7160
VIN = 2.9V
CIN
4.7µF
1
VIN
2
GND
3
EN
VOUT 5
VOUT = 2.5V
COUT
4.7µF
2.5V TO 5V
ON
OFF
NC 4
NC = NO CONNECT
VDD
IN+
0V TO VREF
VREF
DVDD
1.8V TO 5V
16-BIT/18-BIT ADC
IN–
VDD
DIGITAL
OUTPUT
11334-101
PSRR performance of 54 dB at 100 kHz
Ultralow noise independent of VOUT
3 µV rms, 0.1 Hz to 10 Hz
9.5 µV rms, 0.1 Hz to 100 kHz
9 µV rms, 10 Hz to 100 kHz
17 µV rms, 10 Hz to 1 MHz
Low dropout voltage: 150 mV at 200 mA load
Maximum output current: 200 mA
Input voltage range: 2.2 V to 5.5 V
Low quiescent and shutdown current
Initial accuracy: ±1%
Accuracy over line, load, and temperature: −2.5%/+1.5%
5-lead TSOT package and 6-lead LFCSP package
Figure 1. ADM7160 Powering a 16-Bit/18-Bit ADC
ADC/DAC power supplies
RF, VCO, and PLL power supplies
Post dc-to-dc regulation
GENERAL DESCRIPTION
The ADM7160 is an ultralow noise, low dropout linear
regulator that operates from 2.2 V to 5.5 V and provides up to
200 mA of output current. The low 150 mV dropout voltage at
200 mA load improves efficiency and allows operation over a
wide input voltage range.
Using an innovative circuit topology, the ADM7160 achieves
ultralow noise performance without the need for a bypass
capacitor, making the device ideal for noise-sensitive analog
front-end and RF applications. The ADM7160 also achieves
ultralow noise performance without compromising PSRR or
transient line and load performance.
The ADM7160 is specifically designed for stable operation
with tiny 1 µF, ±30% ceramic input and output capacitors to
meet the requirements of high performance, space constrained
applications.
The ADM7160 is available in tiny 5-lead TSOT and 6-lead
LFCSP packages with 16 fixed output voltage options, ranging
from 1.1 V to 3.3 V. The LFCSP offers a very compact solution
that provides excellent thermal performance for applications
that require up to 200 mA of output current in a small, low
profile footprint.
Current-limit and thermal overload protection circuits prevent
damage under adverse conditions. The ADM7160 also includes
an internal pull-down resistor on the EN input.
Rev. 0
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ADM7160
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Applications ....................................................................................... 1
Theory of Operation ...................................................................... 13
Application Circuit ........................................................................... 1
Enable Feature ............................................................................ 13
General Description ......................................................................... 1
Soft Start ...................................................................................... 14
Revision History ............................................................................... 2
Current-Limit and Thermal Overload Protection ................. 14
Specifications..................................................................................... 3
Applications Information .............................................................. 15
Input and Output Capacitors, Recommended Specifications ... 4
Capacitor Selection .................................................................... 15
Absolute Maximum Ratings............................................................ 5
Thermal Considerations............................................................ 16
Thermal Data ................................................................................ 5
PCB Layout Considerations ...................................................... 19
Thermal Resistance ...................................................................... 5
Typical Application Circuits ......................................................... 20
ESD Caution .................................................................................. 5
Outline Dimensions ....................................................................... 21
Pin Configurations and Function Descriptions ........................... 6
Ordering Guide .......................................................................... 22
REVISION HISTORY
6/13—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
Data Sheet
ADM7160
SPECIFICATIONS
VIN = (VOUT + 0.4 V) or 2.2 V, whichever is greater; EN = VIN, ILOAD = 10 mA, CIN = COUT = 1 μF, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
Symbol
VIN
IGND
SHUTDOWN CURRENT
IGND-SD
OUTPUT VOLTAGE ACCURACY
VOUT
TEMPERATURE COEFFICIENT
LINE REGULATION
TEMPCO
∆VOUT/∆VIN
LOAD REGULATION
VOUT < 1.8 V
∆VOUT/∆ILOAD
VOUT ≥ 1.8 V
DROPOUT VOLTAGE1
VDROPOUT
Test Conditions/Comments
TJ = −40°C to +125°C
ILOAD = 0 μA
ILOAD = 0 μA, TJ = −40°C to +125°C
ILOAD = 100 μA
ILOAD = 100 μA, TJ = −40°C to +125°C
ILOAD = 10 mA
ILOAD = 10 mA, TJ = −40°C to +125°C
ILOAD = 200 mA
ILOAD = 200 mA, TJ = −40°C to +125°C
EN = GND
EN = GND, TJ = −40°C to +125°C
ILOAD = 10 mA
100 μA < ILOAD < 200 mA, VIN = (VOUT +
0.4 V) to 5.5 V, TJ = −40°C to +125°C
VOUT < 1.8 V
VOUT ≥ 1.8 V
VOUT = 2.5 V, TJ = 25°C to 85°C
VIN = (VOUT + 0.4 V) to 5.5 V,
TJ = −40°C to +125°C
ILOAD = 100 μA to 200 mA
ILOAD = 100 μA to 200 mA,
TJ = −40°C to +125°C
ILOAD = 100 μA to 200 mA
ILOAD = 100 μA to 200 mA,
TJ = −40°C to +125°C
ILOAD = 10 mA
ILOAD = 10 mA, TJ = −40°C to +125°C
ILOAD = 200 mA
ILOAD = 200 mA, TJ = −40°C to +125°C
VOUT = 3.3 V
TJ = 0°C to 125°C
TJ = −40°C to +125°C
START-UP TIME2
CURRENT-LIMIT THRESHOLD3
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
TSSD
TSSD-HYS
TJ rising
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Pull-Down Resistance
OUTPUT NOISE
VIH
VIL
REN
OUTNOISE
2.2 V ≤ VIN ≤ 5.5 V
2.2 V ≤ VIN ≤ 5.5 V
VIN = VEN = 5.5 V
VIN = 5 V, VOUT = 2.5 V
0.1 Hz to 10 Hz
0.1 Hz to 100 kHz
10 Hz to 100 kHz
10 Hz to 1 MHz
tSTART-UP
ILIMIT
UVLO
UVLORISE
UVLOFALL
UVLOHYS
Min
2.2
Typ
Max
5.5
10
20
20
40
60
90
265
350
0.2
−1
1.0
+1
−3
−2.5
+2
+1.5
+0.05
%
%
ppm/°C
%/V
0.012
%/mA
%/mA
0.008
%/mA
%/mA
29
−0.05
0.006
0.003
10
30
150
230
220
180
300
400
1.96
mV
mV
mV
mV
μs
mA
120
V
V
mV
150
15
C
C
1.28
Rev. 0 | Page 3 of 24
Unit
V
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
%
1.2
2.6
V
V
MΩ
3
9.5
9
17
μV rms
μV rms
μV rms
μV rms
0.4
ADM7160
Parameter
POWER SUPPLY REJECTION RATIO
VIN = VOUT + 0.5 V
Data Sheet
Symbol
PSRR
VIN = VOUT + 1 V
Test Conditions/Comments
ILOAD = 100 mA
100 kHz, VIN = 3.8 V, VOUT = 3.3 V
500 kHz, VIN = 3.8 V, VOUT = 3.3 V
1 MHz, VIN = 3.8 V, VOUT = 3.3 V
100 kHz, VIN = 3.0 V, VOUT = 2.5 V
500 kHz, VIN = 3.0 V, VOUT = 2.5 V
1 MHz, VIN = 3.0 V, VOUT = 2.5 V
100 kHz, VIN = 4.3 V, VOUT = 3.3 V
500 kHz, VIN = 4.3 V, VOUT = 3.3 V
1 MHz, VIN = 4.3 V, VOUT = 3.3 V
100 kHz, VIN = 3.5 V, VOUT = 2.5 V
500 kHz, VIN = 3.5 V, VOUT = 2.5 V
1 MHz, VIN = 3.5 V, VOUT = 2.5 V
Min
Typ
49
43
43
46
44
44
54
46
46
49
47
47
Max
Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This specification applies only to
output voltages greater than 2.2 V.
2
Start-up time is defined as the time from the rising edge of EN to when VOUT is at 90% of its nominal value.
3
Current-limit threshold is defined as the current at which the output voltage falls to 90% of the specified typical value. For example, the current limit for a 3.0 V output
voltage is defined as the current that causes the output voltage to fall to 90% of 3.0 V (that is, 2.7 V).
1
INPUT AND OUTPUT CAPACITORS, RECOMMENDED SPECIFICATIONS
TA = −40°C to +125°C.
Table 2.
Parameter
Minimum Input and Output Capacitance 1
Capacitor ESR
1
Symbol
CMIN
RESR
Min
0.7
0.001
Typ
Max
0.2
Unit
µF
Ω
The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO regulator. For more information, see the Input and Output Capacitor Properties section.
Rev. 0 | Page 4 of 24
Data Sheet
ADM7160
ABSOLUTE MAXIMUM RATINGS
The specified values of θJA are based on a 4-layer, 4 inch × 3 inch
printed circuit board (PCB). See JEDEC JESD51-7 and JESD51-9
for detailed information about board construction. For more information about the LFCSP package, see the AN-772 Application
Note, A Design and Manufacturing Guide for the Lead Frame Chip
Scale Package (LFCSP).
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to +6.5 V
−65°C to +150°C
−40°C to +125°C
−40°C to +125°C
JEDEC J-STD-020
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADM7160 can be damaged when the junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ is within the specified
temperature limits.
In applications with high power dissipation and poor PCB
thermal resistance, the maximum ambient temperature may
need to be derated. In applications with moderate power
dissipation and low PCB thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long
as the junction temperature is within the specification limits.
JEDEC JESD51-12, Guidelines for Reporting and Using Electronic
Package Thermal Information, states that thermal characterization
parameters are not the same as thermal resistances. ΨJB measures
the component power flowing through multiple thermal paths,
rather than through a single path as in thermal resistance (θJB).
Therefore, ΨJB thermal paths include convection from the top of
the package, as well as radiation from the package, factors that
make ΨJB more useful in real-world applications.
Maximum junction temperature (TJ) is calculated from the
board temperature (TB) and the power dissipation (PD) using
the following formula:
TJ = TB + (PD × ΨJB)
See JEDEC JESD51-8 and JESD51-12 for more detailed information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
The junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction-to-ambient thermal resistance of the
package (θJA). TJ is calculated using the following formula:
TJ = TA + (PD × θJA)
The junction-to-ambient thermal resistance (θJA) of the package
is based on modeling and calculation using a 4-layer board. θJA
is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close
attention to thermal board design is required. The value of θJA
may vary, depending on PCB material, layout, and environmental
conditions.
Table 4. Thermal Resistance
Package Type
5-Lead TSOT
6-Lead LFCSP
ESD CAUTION
Rev. 0 | Page 5 of 24
θJA
170
63.6
ΨJB
43
28.3
Unit
°C/W
°C/W
ADM7160
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
GND
2
EN
3
ADM7160
5
ADM7160
NC 2
TOP VIEW
(Not to Scale)
4
GND 3
NC
NOTES
1. NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
6 VIN
VOUT 1
VOUT
TOP VIEW
7
EPAD
5 NC
4 EN
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.
THE EXPOSED PAD ENHANCES THE THERMAL
PERFORMANCE OF THE PACKAGE.
Figure 2. Pin Configuration, 5-Lead TSOT
11334-004
1
11334-003
VIN
Figure 3. Pin Configuration, 6-Lead LFCSP
Table 5. Pin Function Descriptions
TSOT
1
2
3
4
5
N/A
Pin No.
LFCSP
6
3
4
2, 5
1
7
Mnemonic
VIN
GND
EN
NC
VOUT
EPAD
Description
Regulator Input Supply. Bypass VIN to GND with a 1 µF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator.
For automatic startup, connect EN to VIN.
No Connect. Do not connect to this pin.
Regulated Output Voltage. Bypass VOUT to GND with a 1 µF or greater capacitor.
Exposed Pad. The exposed pad must be connected to ground. The exposed pad enhances the
thermal performance of the package.
Rev. 0 | Page 6 of 24
Data Sheet
ADM7160
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 2.9 V, VOUT = 2.5 V, ILOAD = 1 mA, CIN = COUT = 4.7 µF, TA = 25°C, unless otherwise noted.
100
1k
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
NOISE FLOOR
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
NOISE (µV rms)
NSD (nV/√Hz)
100
10
10
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
1
0.01
11334-005
0.1
Figure 4. Noise Spectral Density at Various Output Voltages, ILOAD = 10 mA
0.1
1
10
ILOAD (mA)
100
1000
11334-007
1
Figure 7. RMS Noise vs. Load Current, 10 Hz to 100 kHz
100
1k
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
NOISE FLOOR
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
NOISE (µV rms)
NSD (nV/√Hz)
100
10
10
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
Figure 5. Noise Spectral Density at Various Output Voltages, ILOAD = 200 mA
10k
100
10
1
0.1
1
10
FREQUENCY (Hz)
100
1k
11334-103
NSD (nV/√Hz)
1k
Figure 6. Noise Spectral Density, 0.1 Hz to 1 kHz
Rev. 0 | Page 7 of 24
1
0.01
0.1
1
10
ILOAD (mA)
100
Figure 8. RMS Noise vs. Load Current, 10 Hz to 1 MHz
1000
11334-008
0.1
11334-006
1
ADM7160
Data Sheet
0
0
–10
–20
–10
–30
PSRR (dB)
–40
–50
–60
–80
–90
–90
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
–100
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 12. PSRR vs. Frequency and Load Current, 1 V Headroom,
VOUT = 3.3 V
0
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
–20
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
–20
–30
–40
–40
PSRR (dB)
–30
–50
–60
–60
–70
–80
–80
–90
–90
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
–100
11334-010
10
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
–50
–70
–100
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
–10
10
Figure 10. PSRR vs. Frequency and Load Current, 500 mV Headroom,
VOUT = 2.5 V
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
11334-009
0
–10
Figure 13. PSRR vs. Frequency and Load Current, 1 V Headroom,
VOUT = 2.5 V
0
0
–10
–10
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
–20
–30
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
–30
PSRR (dB)
–40
–50
–60
–50
–60
–70
–80
–80
–90
–100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
11334-016
–90
–100
100
Figure 11. PSRR vs. Frequency and Load Current, 500 mV Headroom,
VOUT = 1.8 V
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
–40
–70
10
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
–20
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 14. PSRR vs. Frequency and Load Current, 1 V Headroom,
VOUT = 1.8 V
Rev. 0 | Page 8 of 24
11334-015
PSRR (dB)
–60
–80
Figure 9. PSRR vs. Frequency and Load Current, 500 mV Headroom,
VOUT = 3.3 V
PSRR (dB)
–50
–70
–100
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
–40
–70
10
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
–20
11334-013
PSRR (dB)
–30
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
11334-012
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
Data Sheet
ADM7160
0
0
–10
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
–20
–20
–40
PSRR (dB)
PSRR (dB)
–30
1kHz
10kHz
100kHz
500kHz
1MHz
–10
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
–50
–60
–30
–40
–50
–70
–60
–80
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
–80
0.2
11334-014
–100
0.3
0.4
0.9
1.0
Figure 18. PSRR vs. Headroom Voltage at Various Frequencies,
ILOAD = 100 mA
Figure 15. PSRR vs. Frequency and Load Current, 300 mV Headroom,
VOUT = 3.3 V
0
0
ILOAD
ILOAD
ILOAD
ILOAD
ILOAD
–10
–20
= 200mA
= 100mA
= 50mA
= 10mA
= 1mA
1kHz
10kHz
100kHz
500kHz
1MHz
–10
–20
–30
–40
PSRR (dB)
PSRR (dB)
0.5
0.6
0.7
0.8
HEADROOM VOLTAGE (V)
11334-018
–70
–90
–50
–60
–30
–40
–50
–70
–60
–80
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
–80
0.2
0.5
0.6
0.7
0.8
HEADROOM VOLTAGE (V)
0.9
1.0
0
0
1kHz
10kHz
100kHz
500kHz
1MHz
–10
–20
–20
PSRR (dB)
–30
–40
–30
–40
–50
–50
–60
–60
–70
–70
0.3
0.4
0.5
0.6
0.7
0.8
HEADROOM VOLTAGE (V)
1kHz
10kHz
100kHz
500kHz
1MHz
–10
0.9
1.0
–80
0.2
11334-017
PSRR (dB)
0.4
Figure 19. PSRR vs. Headroom Voltage at Various Frequencies,
ILOAD = 50 mA
Figure 16. PSRR vs. Frequency and Load Current, 300 mV Headroom,
VOUT = 2.5 V
–80
0.2
0.3
0.3
0.4
0.5
0.6
0.7
0.8
HEADROOM VOLTAGE (V)
0.9
1.0
Figure 20. PSRR vs. Headroom Voltage at Various Frequencies,
ILOAD = 10 mA
Figure 17. PSRR vs. Headroom Voltage at Various Frequencies,
ILOAD = 200 mA
Rev. 0 | Page 9 of 24
11334-020
10
11334-011
–100
11334-019
–70
–90
ADM7160
Data Sheet
2.55
0
–10
2.53
–30
2.51
1kHz
10kHz
100kHz
500kHz
1MHz
–40
–50
2.49
2.47
–70
0.3
0.4
0.5
0.6
0.7
0.8
HEADROOM VOLTAGE (V)
0.9
1.0
2.45
–50
11334-021
–80
0.2
Figure 21. PSRR vs. Headroom Voltage at Various Frequencies,
ILOAD = 1 mA
ILOAD = 100µA
ILOAD = 10mA
ILOAD = 200mA
ILOAD = 10µA
ILOAD = 1mA
ILOAD = 100mA
–60
0
50
100
JUNCTION TEMPERATURE (°C)
150
11334-022
VOUT (V)
PSRR (dB)
–20
Figure 24. Output Voltage vs. Junction Temperature
2.55
1k
2.51
IGND (µA)
VOUT (V)
2.53
2.49
100
0.1
1
10
100
1k
ILOAD (mA)
10
0.01
11334-023
2.45
0.01
0.1
100
1k
Figure 25. Ground Current vs. Load Current
Figure 22. Output Voltage vs. Load Current
1k
2.55
ILOAD = 10µA
ILOAD = 1mA
ILOAD = 100mA
2.53
IGND (µA)
2.51
2.49
3.3
3.8
100
ILOAD = 100µA
ILOAD = 10mA
ILOAD = 200mA
2.45
2.8
ILOAD = 100µA
ILOAD = 10mA
ILOAD = 200mA
4.3
VIN (V)
4.8
5.3
10
2.8
3.3
3.8
4.3
4.8
VIN (V)
Figure 26. Ground Current vs. Input Voltage
Figure 23. Output Voltage vs. Input Voltage
Rev. 0 | Page 10 of 24
5.3
11334-027
ILOAD = 10µA
ILOAD = 1mA
ILOAD = 100mA
2.47
11334-024
VOUT (V)
1
10
ILOAD (mA)
11334-026
2.47
Data Sheet
ADM7160
600
1k
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 100mA
500
400
IGND (µA)
IGND (µA)
100
300
200
10
100
0
50
100
JUNCTION TEMPERATURE (°C)
150
0
2.30
Figure 27. Ground Current vs. Junction Temperature
2.35
2.40
2.45
2.50
2.55 2.60
VIN (V)
2.65
2.70
2.75
2.80
Figure 30. Ground Current vs. Input Voltage (in Dropout)
0.35
120
0.30
SHUTDOWN CURRENT (µA)
140
100
80
60
40
20
VIN = 2.9V
VIN = 3.5V
VIN = 4V
VIN = 4.5V
VIN = 5V
VIN = 5.5V
0.25
0.20
0.15
0.10
10
100
1000
ILOAD (mA)
0
–50
11334-029
1
0
50
TEMPERATURE (°C)
100
150
Figure 31. Shutdown Current vs. Temperature at Various Input Voltages
Figure 28. Dropout Voltage vs. Load Current
2.55
T
ILOAD
2.50
1
2.45
2.40
2.35
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 100mA
2.30
ILOAD = 5mA
ILOAD = 50mA
ILOAD = 200mA
2
VOUT
2.25
2.50
2.55
2.60
2.65 2.70
2.75
VIN (V)
2.80
CH1 200mA
CH2 50mV
M20µs
T 10.00%
A CH1
64.0mA
Figure 32. Load Transient Response, CIN and COUT = 1 μF,
ILOAD = 1 mA to 200 mA
Figure 29. Output Voltage vs. Input Voltage (in Dropout)
Rev. 0 | Page 11 of 24
11334-032
2.45
11334-030
2.20
2.15
2.30 2.35 2.40
11334-028
0.05
0
VOUT (V)
11334-031
1
–50
ILOAD = 100µA
ILOAD = 10mA
ILOAD = 200mA
11334-025
ILOAD = 10µA
ILOAD = 1mA
ILOAD = 100mA
DROPOUT VOLTAGE (mV)
ILOAD = 5mA
ILOAD = 50mA
ILOAD = 200mA
ADM7160
Data Sheet
T
T
VIN
VIN
2
2
VOUT
VOUT
CH1 1V
CH2 2mV
M10µs
T 10.80%
A CH1
4.56V
CH1 1V
Figure 33. Line Transient Response, CIN and COUT = 1 μF, ILOAD = 200 mA
Rev. 0 | Page 12 of 24
CH2 2mV
M10µs
T 10.80%
A CH1
4.56V
11334-034
1
11334-033
1
Figure 34. Line Transient Response, CIN and COUT = 1 μF, ILOAD = 1 mA
Data Sheet
ADM7160
THEORY OF OPERATION
The ADM7160 is an ultralow noise, low quiescent current, low
dropout linear regulator that operates from 2.2 V to 5.5 V and
can provide up to 200 mA of output current. The ADM7160
consumes a low 265 μA of quiescent current (typical) at full load.
Shutdown current consumption is typically 200 nA.
ENABLE FEATURE
Using innovative design techniques, the ADM7160 provides
superior noise performance for noise-sensitive analog front-end
and RF applications without the need for a noise bypass capacitor.
The ADM7160 is also optimized for use with small 1 µF ceramic
capacitors.
As shown in Figure 36, when a rising voltage on EN crosses the
active threshold, VOUT turns on. When a falling voltage on EN
crosses the inactive threshold, VOUT turns off. The EN pin has
built-in hysteresis. This hysteresis prevents on/off oscillations that
can occur due to noise on the EN pin as it passes through the
threshold points.
VIN
VOUT
The ADM7160 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. When EN is high, VOUT
turns on; when EN is low, VOUT turns off. For automatic startup,
EN can be tied to VIN.
3.0
R1
2.5
SHORT-CIRCUIT,
UVLO, AND
THERMAL
PROTECTION
SHUTDOWN
REN
REFERENCE
VOUT (V)
EN
2.0
R2
11334-035
GND
1.5
1.0
Figure 35. Internal Block Diagram
An internal pull-down resistor on the EN input holds the input
low when the EN pin is left open.
The ADM7160 is available in 16 output voltage options, ranging
from 1.1 V to 3.3 V.
0
0
0.5
1.0
1.5
2.0
2.5
ENABLE VOLTAGE (V)
11334-038
0.5
Figure 36. Typical EN Pin Operation
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 37 shows typical EN active/inactive thresholds
when the input voltage varies from 2.2 V to 5.5 V.
1.2
1.0
ENABLE THRESHOLD (V)
Internally, the ADM7160 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing more
current to pass and increasing the output voltage. If the feedback
voltage is higher than the reference voltage, the gate of the PMOS
device is pulled higher, allowing less current to pass and decreasing
the output voltage.
EN ACTIVE
0.8
EN INACTIVE
0.6
0.4
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE (V)
Figure 37. Typical EN Pin Thresholds vs. Input Voltage
Rev. 0 | Page 13 of 24
5.5
11334-039
0.2
ADM7160
Data Sheet
SOFT START
The ADM7160 uses an internal soft start to limit the inrush
current when the output is enabled. The start-up time for the
3.3 V option is approximately 180 μs from when the EN active
threshold is crossed to when the output reaches 90% of its final
value. As shown in Figure 38, the start-up time is dependent on
the output voltage setting.
3.5
The ADM7160 is protected against damage due to excessive
power dissipation by current-limit and thermal overload protection circuits. The ADM7160 is designed to reach current limit
when the output load reaches 300 mA (typical). When the output
load exceeds 300 mA, the output voltage is reduced to maintain
a constant current limit.
Thermal overload protection limits the junction temperature to
a maximum of 150°C (typical). Under extreme conditions (that
is, high ambient temperature and power dissipation) when the
junction temperature begins to rise above 150°C, the output is
turned off, reducing the output current to 0 mA. When the junction temperature falls below 135°C, the output is turned on again,
and the output current is restored to its nominal value.
3.0
2.5
2.0
1.5
1.0
ENABLE
VOUT = 3.3V
VOUT = 2.8V
VOUT = 1.1V
0.5
0
0
50
100
150
200
250
300
350
TIME (µs)
Figure 38. Typical Start-Up Behavior
400
450
11334-040
ENABLE VOLTAGE (V)
CURRENT-LIMIT AND THERMAL OVERLOAD
PROTECTION
Consider the case where a hard short from VOUT to ground
occurs. At first, the ADM7160 reaches current limit, so that
only 300 mA is conducted into the short. If self-heating of the
junction causes its temperature to rise above 150°C, thermal
shutdown is activated, turning off the output and reducing the
output current to 0 mA. As the junction temperature cools and
falls below 135°C, the output turns on and conducts 300 mA into
the short, again causing the junction temperature to rise above
150°C. This thermal oscillation between 135°C and 150°C causes
a current oscillation between 300 mA and 0 mA that continues
as long as the short remains at the output.
Current-limit and thermal overload protections are intended to
protect the device against accidental overload conditions. For
reliable operation, device power dissipation must be externally
limited so that junction temperatures do not exceed 125°C.
Rev. 0 | Page 14 of 24
Data Sheet
ADM7160
APPLICATIONS INFORMATION
Output Capacitor
The ADM7160 is designed for operation with small, space-saving
ceramic capacitors, but it can function with most commonly used
capacitors as long as care is taken with regard to the effective series
resistance (ESR) value. The ESR of the output capacitor affects the
stability of the LDO control loop. A minimum of 1 µF capacitance
with an ESR of 1 Ω or less is recommended to ensure the stability
of the ADM7160. Transient response to changes in load current is
also affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the ADM7160
to large changes in load current. Figure 39 shows the transient
response for an output capacitance value of 1 µF.
T
ILOAD
Figure 40 shows the capacitance vs. voltage bias characteristics
of a 0402, 1 µF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or with a higher
voltage rating exhibits better stability. The temperature variation
of the X5R dielectric is approximately ±15% over the −40°C to
+85°C temperature range and is not a function of package or
voltage rating.
1.2
1.0
CAPACITANCE (µF)
CAPACITOR SELECTION
0.8
0.6
0.4
1
0
0
2
2
4
6
8
10
VOLTAGE BIAS (V)
VOUT
CH2 50mV
M20µs
T 10.00%
Figure 40. Capacitance vs. Voltage Bias Characteristics
A CH1
64mA
Use Equation 1 to determine the worst-case capacitance,
accounting for capacitor variation over temperature,
component tolerance, and voltage.
11334-036
CH1 200mA
11334-037
0.2
CEFF = CBIAS × (1 − TEMPCO) × (1 − TOL)
Figure 39. Output Transient Response, COUT = 1 µF
Input Bypass Capacitor
Connecting a 1 µF capacitor from VIN to GND reduces the
circuit sensitivity to the PCB layout, especially when long input
traces or high source impedance are encountered. If output
capacitance greater than 1 µF is required, the input capacitor
should be increased to match it.
Input and Output Capacitor Properties
Any good quality ceramic capacitor can be used with the
ADM7160, as long as it meets the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior
over temperature and applied voltage. Capacitors must have an
adequate dielectric to ensure the minimum capacitance over the
required temperature range and dc bias conditions. X5R or X7R
dielectrics with a voltage rating of 6.3 V or 10 V are recommended.
Y5V and Z5U dielectrics are not recommended, due to their poor
temperature and dc bias characteristics.
(1)
where:
CBIAS is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance (TOL) of the capacitor is assumed to be 10%, and
CBIAS is 0.94 μF at 1.8 V, as shown in Figure 40.
Substituting these values in Equation 1 yields
CEFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF
Therefore, the capacitor selected in this example meets the
minimum capacitance requirement of the LDO regulator over
temperature and tolerance at the selected output voltage.
To guarantee the performance of the ADM7160, it is imperative
that the effects of dc bias, temperature, and tolerance on the
behavior of the capacitors be evaluated for each application.
Rev. 0 | Page 15 of 24
ADM7160
Data Sheet
Figure 41 and Figure 42 show the connection of 4.7 μF capacitors on the VIN and VOUT pins for the 5-lead TSOT and 6-lead
LFCSP packages, respectively.
ADM7160
1
CIN
4.7µF
ON
VIN
2
GND
3
EN
OFF
Table 6. Typical θJA Values
VOUT = 2.5V
VOUT 5
Copper Size (mm2)
01
50
100
300
500
COUT
4.7µF
NC 4
11334-001
VIN = 2.9V
Table 6 shows typical θJA values for the 5-lead TSOT and 6-lead
LFCSP packages for various PCB copper sizes.
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
Figure 41. 5-Lead TSOT with 4.7 μF Input and Output Capacitors
1
6
CIN
4.7µF
5
ON
4
OFF
VIN
VOUT
ADM7160
NC TOP VIEW NC
(Not to Scale)
EN
GND
1
2
COUT
4.7µF
Device soldered to minimum size pin traces.
Table 7. Typical ΨJB Values
3
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
θJA (°C/W)
LFCSP
231.2
161.8
150.1
111.5
91.8
Table 7 shows the typical ΨJB values for the 5-lead TSOT and
6-lead LFCSP.
VOUT = 2.5V
Package
TSOT
LFCSP
11334-102
VIN = 2.9V
TSOT
170
152
146
134
131
Figure 42. 6-Lead LFCSP with 4.7 μF Input and Output Capacitors
THERMAL CONSIDERATIONS
In most applications, the ADM7160 does not dissipate much
heat due to its high efficiency. However, in applications with
high ambient temperature and a high supply voltage-to-output
voltage differential, the heat dissipated in the package can cause
the junction temperature of the die to exceed the maximum
junction temperature of 125°C.
When the junction temperature exceeds 150°C, the ADM7160
enters thermal shutdown. To prevent any permanent damage, the
regulator recovers only after the junction temperature decreases
below 135°C. Therefore, thermal analysis for the selected application is very important to guarantee reliable performance over all
conditions. The junction temperature of the die is the sum of the
ambient temperature of the environment and the temperature
rise of the package due to the power dissipation, as shown in
Equation 2.
To guarantee reliable operation, the junction temperature of the
ADM7160 must not exceed 125°C. To ensure that the junction
temperature stays below this maximum value, the user must be
aware of the parameters that contribute to junction temperature
changes. These parameters include ambient temperature, power
dissipation in the power device, and thermal resistance between
the junction and ambient air (θJA). The θJA value is dependent on
the package assembly compounds used and the amount of copper
used to solder the package GND pin and the exposed pad (in the
case of the LFCSP) to the PCB.
ΨJB (°C/W)
43
28.3
The junction temperature of the ADM7160 can be calculated
using the following equation:
TJ = TA + (PD × θJA)
(2)
where:
TA is the ambient temperature.
θJA is the junction-to-ambient thermal resistance of the package.
PD is the power dissipation in the die, given by
PD = [(VIN − VOUT) × ILOAD] + (VIN × IGND)
(3)
where:
VIN and VOUT are the input and output voltages, respectively.
ILOAD is the load current.
IGND is the ground current.
Power dissipation due to ground current is quite small and can
be ignored. Therefore, the junction temperature equation can
be simplified as follows:
TJ = TA + {[(VIN − VOUT) × ILOAD] × θJA}
(4)
As shown in Equation 4, for a given ambient temperature, inputto-output voltage differential, and continuous load current, a
minimum copper size requirement exists for the PCB to ensure
that the junction temperature does not exceed 125°C.
Figure 43 through Figure 54 show junction temperature
calculations for various ambient temperatures, load currents,
input-to-output voltage differentials, and areas of PCB copper.
Rev. 0 | Page 16 of 24
Data Sheet
ADM7160
140
140
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
100
80
60
40
20
0
0.3
Figure 43. TSOT, 500 mm2 of PCB Copper, TA = 25°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
4.3
4.8
80
60
40
20
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
11334-045
JUNCTION TEMPERATURE, TJ (°C)
100
11334-042
JUNCTION TEMPERATURE, TJ (°C)
3.8
MAXIMUM JUNCTION TEMPERATURE
120
Figure 44. TSOT, 100 mm2 of PCB Copper, TA = 25°C
Figure 47. TSOT, 100 mm2 of PCB Copper, TA = 50°C
140
140
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
JUNCTION TEMPERATURE, TJ (°C)
120
100
80
60
40
20
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
11334-043
JUNCTION TEMPERATURE, TJ (°C)
2.3
2.8
3.3
VIN – VOUT (V)
140
MAXIMUM JUNCTION TEMPERATURE
0
0.3
1.8
Figure 46. TSOT, 500 mm2 of PCB Copper, TA = 50°C
140
0
0.3
1.3
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
Figure 45. TSOT, 50 mm2 of PCB Copper, TA = 25°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
Figure 48. TSOT, 50 mm2 of PCB Copper, TA = 50°C
Rev. 0 | Page 17 of 24
4.8
11334-046
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
120
11334-044
JUNCTION TEMPERATURE, TJ (°C)
120
11334-041
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
ADM7160
Data Sheet
140
140
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
Figure 49. LFCSP, 500 mm2 of PCB Copper, TA = 25°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.8
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
Figure 52. LFCSP, 500 mm2 of PCB Copper, TA = 50°C
140
140
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
Figure 50. LFCSP, 100 mm2 of PCB Copper, TA = 25°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
11334-051
JUNCTION TEMPERATURE, TJ (°C)
120
11334-048
JUNCTION TEMPERATURE, TJ (°C)
1.3
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
11334-050
JUNCTION TEMPERATURE, TJ (°C)
120
11334-047
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
Figure 53. LFCSP, 100 mm2 of PCB Copper, TA = 50°C
140
140
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
MAXIMUM
JUNCTION
TEMPERATURE
120
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
Figure 54. LFCSP, 50 mm2 of PCB Copper, TA = 50°C
Figure 51. LFCSP, 50 mm2 of PCB Copper, TA = 25°C
Rev. 0 | Page 18 of 24
4.8
11334-052
JUNCTION TEMPERATURE, TJ (°C)
120
11334-049
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
Data Sheet
ADM7160
In cases where the board temperature is known, use the ΨJB
thermal characterization parameter to estimate the junction
temperature rise (see Figure 55 and Figure 56). Maximum junction temperature (TJ) is calculated from the board temperature
(TB) and the power dissipation (PD) using the following formula:
TJ = TB + (PD × ΨJB)
(5)
The typical value of ΨJB is 43°C/W for the 5-lead TSOT package
and 28.3°C/W for the 6-lead LFCSP package.
140
Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADM7160.
However, as shown in Table 6, a point of diminishing returns is
eventually reached, beyond which an increase in the copper size
does not yield significant heat dissipation benefits.
Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to
the VOUT and GND pins. Use of 0402 or 0603 size capacitors
achieves the smallest possible footprint solution on boards
where area is limited.
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
11334-053
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
120
PCB LAYOUT CONSIDERATIONS
Figure 55. TSOT, TA = 85°C
140
11334-055
100
Figure 57. Example of PCB Layout, TSOT Package
80
60
40
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
1.3
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
3.3
VIN – VOUT (V)
4.3
5.3
Figure 56. LFCSP, TA = 85°C
11334-056
20
11334-054
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
120
Figure 58. Example of PCB Layout, LFCSP Package
Rev. 0 | Page 19 of 24
ADM7160
Data Sheet
TYPICAL APPLICATION CIRCUITS
ADM7160
VIN = 2.9V
CIN
4.7µF
1
VIN
2
GND
3
EN
VOUT 5
VOUT = 2.5V
COUT
4.7µF
2.5V TO 5V
ON
OFF
NC 4
NC = NO CONNECT
VDD
IN+
VREF
DVDD
1.8V TO 5V
16-BIT/18-BIT ADC
0V TO VREF
DIGITAL
OUTPUT
IN–
11334-101
VDD
Figure 59. ADM7160 Powering a 16-Bit/18-Bit ADC
ADM7160
VIN = 5V
CIN
4.7µF
ON
1
VIN
2
GND
3
EN
VOUT 5
VOUT = 3.3V
COUT
4.7µF
OFF
INPUT
NC = NO CONNECT
ADM7160
1
CIN
4.7µF
ON
OFF
VIN
2
GND
3
EN
VOUT 5
PHASE
DETECTOR
CHARGE
PUMP
LOOP
FILTER
PLL BLOCK DIAGRAM
VOUT = 3.3V
COUT
4.7µF
OUTPUT
VCO
VOLTAGECONTROLLED
OSCILLATOR
N DIVIDER
DVDD
NC 4
AVDD
11334-002
VIN = 5V
VVCO
VCP
NC 4
NC = NO CONNECT
Figure 60. ADM7160 Powering a PLL/VCO
Rev. 0 | Page 20 of 24
Data Sheet
ADM7160
OUTLINE DIMENSIONS
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
0.95 BSC
1.90
BSC
*1.00 MAX
0.10 MAX
0.50
0.30
0.20
0.08
8°
4°
0°
SEATING
PLANE
0.60
0.45
0.30
100708-A
*0.90 MAX
0.70 MIN
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 61. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
1.70
1.60
1.50
2.10
2.00 SQ
1.90
0.65 BSC
6
PIN 1 INDEX
AREA
0.15 REF
1.10
1.00
0.90
EXPOSED
PAD
0.425
0.350
0.275
0.60
0.55
0.50
SEATING
PLANE
BOTTOM VIEW
0.05 MAX
0.02 NOM
0.35
0.30
0.25
0.20 MIN
1
3
TOP VIEW
PIN 1
INDICATOR
(R 0.15)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.20 REF
Figure 62. 6-Lead Lead Frame Chip Scale Package [LFCSP_UD]
2.00 mm × 2.00 mm Body, Ultra Thin, Dual Lead
(CP-6-3)
Dimensions shown in millimeters
Rev. 0 | Page 21 of 24
02-06-2013-D
4
ADM7160
Data Sheet
ORDERING GUIDE
Model 1, 2
ADM7160AUJZ-1.8-R7
ADM7160AUJZ-2.5-R7
ADM7160AUJZ-3.3-R7
ADM7160AUJZ-1.8-R2
ADM7160AUJZ-2.5-R2
ADM7160AUJZ-3.3-R2
ADM7160ACPZN1.8-R7
ADM7160ACPZN2.5-R7
ADM7160ACPZN3.3-R7
ADM7160ACPZN1.8-R2
ADM7160ACPZN2.5-R2
ADM7160ACPZN3.3-R2
1
2
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Output Voltage (V)
1.8
2.5
3.3
1.8
2.5
3.3
1.8
2.5
3.3
1.8
2.5
3.3
Package Description
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
6-Lead LFCSP_UD
6-Lead LFCSP_UD
6-Lead LFCSP_UD
6-Lead LFCSP_UD
6-Lead LFCSP_UD
6-Lead LFCSP_UD
Z = RoHS Compliant Part.
For additional voltage options, contact your local Analog Devices, Inc., sales or distribution representative.
Rev. 0 | Page 22 of 24
Package Option
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
CP-6-3
CP-6-3
CP-6-3
CP-6-3
CP-6-3
CP-6-3
Branding
LNH
LNJ
LNK
LNH
LNJ
LNK
LNH
LNJ
LNK
LNH
LNJ
LNK
Data Sheet
ADM7160
NOTES
Rev. 0 | Page 23 of 24
ADM7160
Data Sheet
NOTES
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11334-0-6/13(0)
Rev. 0 | Page 24 of 24