NCV70627 Micro-stepping Motor Driver Introduction The NCV70627 is a single−chip micro−stepping motor driver with position controller and control/diagnostic interface. It is ready to build dedicated mechatronics solutions connected remotely with a LIN master. The chip receives positioning instructions through the bus and subsequently drives the motor coils to the desired position. The on−chip position controller is configurable (OTP or RAM) for different motor types, positioning ranges and parameters for speed, acceleration and deceleration. The NCV70627 acts as a slave on the LIN bus and the master can fetch specific status information like actual position, error flags, etc. from each individual slave node. An integrated sensor−less step−loss detection prevents the positioner from loosing steps and stops the motor when running into stall. This enables silent, yet accurate position calibrations during a referencing run and allows semi−closed loop operation when approaching the mechanical end−stops. The chip is implemented in I3T50 technology, enabling both high voltage analog circuitry and digital functionality on the same chip. The NCV70627 is fully compatible with the automotive voltage requirements. Due to the technology, the device is especially suited for use in applications with fluctuating battery supplies. www.onsemi.com 1 SSOP−EP 36 LEAD CASE 940AB 32 QFN32, 5x5 CASE 488AM ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 2 of this data sheet. PRODUCT FEATURES Motordriver • • • • • • • • • Micro−stepping Technology Sensorless Step−loss Detection Peak Current up to 800 mA Low Temperature Boost Current up to 1100 mA Programmable Current Stabilization Phase Fixed Frequency PWM Current−control Automatic Selection of Fast and Slow Decay Mode No External Fly−back Diodes Required Compliant with 14V Automotive Systems Protection • • • • • • • Controller with RAM and OTP Memory • Position Controller • Configurable Speeds and Acceleration • Input to Connect Optional Motion Switch Power Saving • Powerdown Supply Current < 150 mA • 3.3 V Regulator with Wake−up On LIN Activity LIN Interface • Physical Layer Compliant to LIN rev. 2.0. Data−link • • • Overcurrent Protection Open−circuit Detection High Temperature Warning and Management Low Temperature Flag LIN Bus Short−circuit Protection to Supply and Ground Lost LIN Safe Operation Enhanced Under Voltage Management EMI Compatibility Layer Compatible with LIN rev. 1.3 (Note 1) Field−programmable Node Addresses Dynamically Allocated Identifiers Diagnostics and Status Information • LIN Bus Integrated Slope Control • HV Outputs with Slope Control • This is a Pb−Free Device 1. Minor exceptions to the conformance of the data−link layer to LIN rev. 1.3. © Semiconductor Components Industries, LLC, 2015 August, 2015 − Rev. 0 1 Publication Order Number: NCV70627/D NCV70627 Applications The NCV70627 is ideally suited for small positioning applications. Target markets include: automotive (headlamp alignment, HVAC, idle control, cruise control), industrial equipment (lighting, fluid control, labeling, process control, XYZ tables, robots...) and building automation (HVAC, surveillance, satellite dish, renewable energy systems). Suitable applications typically have multiple axes or require mechatronics solutions with the driver chip mounted directly on the motor. Table 1. ORDERING INFORMATION Part No. Peak Current End Market/Version Package* NCV70627DQ001G 800/1100 mA (Note 2) NCV70627DQ001R2G 800/1100 mA (Note 2) Automotive High Temperature Version SSOP−36EP (Pb−Free) NCV70627MW002R2G 800/1100 mA (Note 2) Automotive QFN32 (Pb−Free) Shipping† 47 Units/Rail 1500/Tape & Reel 5000 / Tape & Reel *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 2. The device boost current. This applies for operation under the thermal warning level only. MARKING DIAGRAMS 1 NCV70627 AWLYYWWG N70627−2 AWLYYWWG G SSOP QFN32 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Min Max Unit Supply voltage, hardwired address pin (Note 4) −0.3 +40 (Note 3) V Bus input voltage (Note 4) −40 +40 V TJ Junction temperature range (Note 5) −50 +175 °C Tstg Storage temperature range (Note 6) −55 +160 °C HBM Electrostatic discharge voltage on LIN pin −4 +4 kV HBM Electrostatic discharge voltage on other pins −2 +2 kV MM Electrostatic discharge voltage on other pins −200 +200 V VBB, VHW2 Vlin Vesd (Note 7) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. NOTE: A mission profile (Note 5) is a substantial part of the operation conditions; hence the Customer must contact ON Semiconductor in order to mutually agree in writing on the allowed missions profile(s) in the application. 3. For limited time: VBB <0.5 s, SWI and HW2 pins <1.0 s. 4. Maximum allowed voltage between two device pins is 60 V. 5. The circuit functionality is not guaranteed outside the Operating junction temperature range. A mission profile describes the application specific conditions such as, but not limited to, the cumulative operating conditions over life time, the system power dissipation, the system’s environmental conditions, the thermal design of the customer’s system, the modes, in which the device is operated by the customer, etc. 6. For limited time up to 100 hours. Otherwise the maximum storage temperature is 85°C. 7. HBM according to AEC−Q100: EIA−JESD22−A114−B (100 pF via 1.5 kW) and MM according to AEC−Q100: EIA−JESD22−A115−A. Table 3. OPERATING RANGES Parameter Min Max Unit VBB Supply voltage +5.5 +29 V TJP Parametric Operating junction temperature range (Note 8) −40 +145 °C TJF Functional Operating junction temperature range (Note 9) −40 +160 °C 8. The parametric characteristics of the circuit are not guaranteed outside the parametric operating junction temperature range. 9. The maximum functional operating temperature range can be limited by thermal shutdown Ttsd. www.onsemi.com 2 NCV70627 SWI NCV70627 BUS Interface LIN Position Controller HW[2:0] PWM regulator X Controller MOTXP MOTXN I−sense TST Decoder Main Control Registers OTP − ROM Sinewave Table Motion detection DAC’s 4 MHz Temp sense Vref Oscillator I−sense PWM regulator Y MOTYP MOTYN Voltage Regulator VBB VDD GND Figure 1. Block Diagram GNDPW 1 MXP MYN 24 2 MXP MYN 23 3 VBB VBB 22 4 VBB VBB 21 5 NC NC 20 6 SWI TST4 19 7 NC TST3 18 8 HW0 TST2 17 HW1 VDD GND TST1 LIN GNDL GNDL HW2 NCV70627 QFN32 5x5 9 10 11 12 13 14 15 16 (Top View) Figure 2. Pinout Diagrams www.onsemi.com 3 25 GNDPW 26 MYP 19 27 MYP (Top View) 28 MXN 18 29 MXN NCV70627 SSOP VBB NC MOTXP MOTXP NC GND NC MOTXN MOTXN MOTYP MOTYP NC GND NC MOTYN MOTYN NC VBB 30 GNDPW 36 31 GNDPW 1 SWI NC HW0 HW1 VDD NC GND TST1 NC LIN NC GND NC HW2 NC TST2 TST3 TST4 32 NCV70627 Table 4. PIN DESCRIPTIONS − SSOP PACKAGE Pin No. Pin Name Pin Description 1 SWI Switch input 3 HW0 Bit 0 of LIN−ADD 4 HW1 Bit 1 of LIN−ADD 5 VDD Internal supply (needs external decoupling capacitor) 7, 12, 24, 31 GND Ground, heat sink 8 TST1 Test pin (to be tied to ground in normal operation) 10 LIN 14 HW2 Bit 2 LIN−ADD 16 TST2 Test pin (to be tied to ground in normal operation) 17 TST3 Test pin (to be tied to ground in normal operation) 18 TST4 Test pin (to be tied to ground in normal operation) 19, 36 VBB Battery voltage supply 21, 22 MOTYN Negative end of phase Y coil 26, 27 MOTYP Positive end of phase Y coil 28, 29 MOTXN Negative end of phase X coil 33, 34 MOTXP Positive end of phase X coil 2, 6, 9, 11, 13, 15, 20, 23, 25, 30, 32, 35 NC To be tied to GND or VDD LIN−bus connection Not used Table 5. PIN DESCRIPTIONS − QFN PACKAGE Pin No. Pin Name Pin Description 1, 2 MXP Positive end of phase X coil 3, 4, 21, 22 VBB Battery voltage supply 5, 7, 20 NC Not used 6 SWI Switch input 8 HW0 Bit 0 of LIN−ADD 9 HW1 Bit 1 of LIN−ADD 10 VDD Internal supply (needs external decoupling capacitor) 11 GND Ground 12 TST1 Test pin (to be tied to ground in normal operation) 13 LIN 14, 15 GNDL Ground 16 HW2 Bit 2 LIN−ADD 17 TST2 Test pin (to be tied to ground in normal operation) 18 TST3 Test pin (to be tied to ground in normal operation) 19 TST4 Test pin (to be tied to ground in normal operation) 23, 24 MYN Negative end of phase Y coil 25, 26, 31, 32 GNDPW 27, 28 MYP Positive end of phase Y coil 29, 30 MXN Negative end of phase X coil To be tied to GND or VDD LIN−bus connection Ground www.onsemi.com 4 NCV70627 Package Thermal Resistance The NCV70627 is available in thermally optimized SSOP−36 and QFN32 packages. For the optimizations, the package has an exposed thermal pad which has to be soldered to the PCB ground plane. The ground plane needs thermal vias to conduct the heat to the bottom layer. Figure 3 gives examples for good power distribution solutions. The thermal resistances are presented in Table 6: Thermal resistance. Table 6. THERMAL RESISTANCE Characteristics Package Symbol Min Typ Max Unit Thermal Resistance, Junction−to−Exposed Pad (Note 10) SSOP−36 RqJP − 3.3 − K/W Thermal Resistance, Junction−to−Exposed Pad (Note 10) QFN32 RqJP − 14 − K/W 10. Also includes typical solder thickness under the Exposed Pad (EP). (((((( & )) ŽŽŽŽŽ ŸŸ..//¦ & )) ŸŸ ..//¦ ÙÙ & )) ÙÙ ¦ & )) ÙÙÕÕŠŠ¦ # & )) ÙÙ ÕÕ ŠŠ # ÛÛÛÛÛ & # ŠŠ ÜÜÜÜÜ ÖÖ ÖÖ ÒÒ ! & ŠŠ ÖÖ ÖÖ ÒÒ ! & ŠŠ ÖÖ ! ÓÓÓÓ $ & $ ÔÔÔÔ ÚÚ Õ Ò ,, −− " & ÚÚ Õ,,−−" & ÚÚ Õ " ** ++ & ÚÚ %%%%% Õ**++" ’’’’’’ Figure 3. Example of SSOP−36 and QFN32 PCB Ground Plane Layout. Preferred layout at top and bottom connected with through−hole filled vias www.onsemi.com 5 NCV70627 DC Parameters The DC parameters are guaranteed over junction temperature from −40 to 145°C and VBB in the operating range from 5.5 to 29 V, unless otherwise specified. Convention: currents flowing into the circuit are defined as positive. Table 7. DC PARAMETERS Symbol Pin(s) Parameter Test Conditions Min Typ Max Unit Max current through motor coil in normal operation VBB = 14 V 800 mA Max rms current through coil in normal operation VBB = 14 V 570 mA MOTORDRIVER IMSmax,Peak IMSmax,RMS MOTXP MOTXN MOTYP MOTYN IMSabs Absolute error on coil current (Note 11) IMSrel Matching of X & Y coil currents IMSboost_Peak Max peak current during booster function RDS(on) VBB = 14 V, Tj =145°C −10 VBB = 14 V −7 VBB = 14 V, T < Ttw On resistance of High side + Low side Driver at IMSmax 0 10 % 7 % 1100 mA Tj ≤ 25°C 1.8 W Tj = 145°C 2.4 W LIN TRANSMITTER (Note 19) LIN Dominant state, driver off Vbus = 0 V, VBB = 7 V & 18 V Ibus_off Recessive state, driver off Vbus = Vbat, VBB = 7 V & 18 V 10 Ibus_off Recessive state, driver off VBB = 0 V (Note 11) 10 mA Ibus_lim Current limitation VBB = 7 V & 18 V 50 75 200 mA Rslave Pullup resistance VBB = 7 V & 18 V 20 30 47 kW Receiver dominant state VBB = 7 V & 18 V 0 0.4 * VBB V Vbus_rec Receiver recessive state VBB = 7 V & 18 V 0.6 * VBB VBB V Vbus_hys Receiver hysteresis VBB = 7 V & 18 V 0.05 * VBB 0.2 * VBB V 165 °C Ibus_off −1 mA mA LIN RECEIVER (Note 19) Vbus_dom LIN THERMAL WARNING & SHUTDOWN Ttw Thermal warning (Notes 12 and 13) 150 157 Ttsd Thermal shutdown (Note 14) Ttw + 10 °C Tlow Low temperature warning (Note 14) Ttw − 167 °C SUPPLY AND VOLTAGE REGULATOR VbbOTP VBB Supply voltage for OTP zapping (Note 15) 13.0 18.0 V UV2 Stop voltage low threshold 5.48 5.90 6.32 V UV3 Decelerated stop voltage low threshold UV3Thr[2:0] = 000 5.48 5.90 6.32 V UV3Thr[2:0] = 001 5.86 6.30 6.74 V UV3Thr[2:0] = 010 6.23 6.70 7.17 V UV3Thr[2:0] = 011 6.60 7.10 7.60 V 11. Tested in production for 800 mA, 400 mA, 200 mA and 100 mA current settings for both X and Y coil. 12. Parameter guaranteed by trimming relevant OTPs in production. 13. No more than 100 cumulated hours in life time above Tw. 14. Thermal shutdown and low temperature warning are derived from thermal warning. Guaranteed by design. 15. A buffer capacitor of minimum 100 mF is needed between VBB and GND. Short connections to the power supply are recommended. 16. Pin VDD must not be used for any external supply 17. The RAM content will not be altered above this voltage. 18. External resistance value seen from pin SWI or HW2, including 1 kW series resistor. For the switch OPEN, the maximum allowed leakage current is represented by a minimum resistance seen from the pin. 19. While LIN is only specified for operation above 7 V VBB, the device can operate LIN at lower voltages down to 5.5 V. Under these conditions the LIN specific parameters are not guaranteed. www.onsemi.com 6 NCV70627 Table 7. DC PARAMETERS Symbol Pin(s) Parameter Test Conditions Min Typ Max Unit UV3Thr[2:0] = 100 6.97 7.50 8.03 V UV3Thr[2:0] = 101 7.34 7.90 8.46 V UV3Thr[2:0] = 110 7.71 8.30 8.89 V UV3Thr[2:0] = 111 8.09 8.70 9.31 V Stop voltage high threshold, UV3Thr[2:0] = 000 6.18 6.62 7.06 V Ratio metric coupled to UV3Thr[2:0]. UV3Thr[2:0] = 001 6.60 7.07 7.54 V UV3Thr[2:0] = 010 7.02 7.52 8.01 V UV3Thr[2:0] = 011 7.44 7.97 8.49 V UV3Thr[2:0] = 100 7.86 8.41 8.97 V UV3Thr[2:0] = 101 8.28 8.86 9.45 V UV3Thr[2:0] = 110 8.70 9.31 9.93 V UV3Thr[2:0] = 111 9.12 9.76 10.41 V 3.50 10.0 mA 150 mA 3.5 V 3.0 V 85 mA SUPPLY AND VOLTAGE REGULATOR UV3 UV1 VBB VBB Ibat Total current consumption Ibat_s VDD Decelerated stop voltage low threshold VDD VddReset Unloaded outputs, VBB = 29 V Sleep mode current consumption VBB = 5.5 V & 18 V Regulated internal supply (Note 16) 5.5 V < VBB < 29 V 3.1 3.3 Digital supply reset level @ power down (Note 17) IddLim Current limitation Pin shorted to ground VBB = 14 V SWITCH INPUT AND HARDWIRE ADDRESS INPUT Rt_OFF Rt_ON SWI HW2 Switch OPEN resistance (Note 18) Switch ON resistance (Note 18) Vbb_sw VBB range for guaranteed operation of SWI and HW2 Ilim_sw Current limitation 10 kW Switch to GND or VBB 5.5 Short to GND or Vbat VBB = 29 V 20 Input level high VBB = 14 V 1.9 Input level low VBB = 14 V Hysteresis VBB = 14 V 30 1.9 kW 29 V 45 mA HARDWIRED ADDRESS INPUTS AND TEST PIN Vihigh Vilow HWhyst HW0 HW1 TST V 1.4 1 V V 11. Tested in production for 800 mA, 400 mA, 200 mA and 100 mA current settings for both X and Y coil. 12. Parameter guaranteed by trimming relevant OTPs in production. 13. No more than 100 cumulated hours in life time above Tw. 14. Thermal shutdown and low temperature warning are derived from thermal warning. Guaranteed by design. 15. A buffer capacitor of minimum 100 mF is needed between VBB and GND. Short connections to the power supply are recommended. 16. Pin VDD must not be used for any external supply 17. The RAM content will not be altered above this voltage. 18. External resistance value seen from pin SWI or HW2, including 1 kW series resistor. For the switch OPEN, the maximum allowed leakage current is represented by a minimum resistance seen from the pin. 19. While LIN is only specified for operation above 7 V VBB, the device can operate LIN at lower voltages down to 5.5 V. Under these conditions the LIN specific parameters are not guaranteed. www.onsemi.com 7 NCV70627 AC Parameters The AC parameters are guaranteed over junction temperature from −40 to 145°C and VBB in the operating range from 5.5 to 29 V, unless otherwise specified. The LIN transmitter and receiver physical layer parameters are compliant to LIN rev. 2.0 & 2.1. Table 8. AC PARAMETERS Symbol Pin(s) Parameter Test Conditions Min Typ Max Unit 10 ms 4.4 MHz POWERUP Tpu Power−up time Guaranteed by design INTERNAL OSCILLATOR Frequency of internal oscillator fosc VBB = 14 V 3.6 4.0 LIN TRANSMITTER CHARACTERISTICS ACCORDING TO LIN V2.0 & V2.1 LIN D1 D2 Duty cycle 1 = tBus_rec(min) / (2 x tBit); See Figure 4 THRec(max) = 0.744 x VBB THDom(max) = 0.581 x VBB; VBB = 7.0 V...18 V; tBit = 50 ms Duty cycle 2 = tBus_rec(max) / (2 x tBit); See Figure 4 THRec(min) = 0.422 x VBB THDom(min) = 0.284 x VBB; VBB = 7.6 V...18 V; tBit = 50 ms 0.396 0.581 LIN RECEIVER CHARACTERISTICS ACCORDING TO LIN V2.0 & V2.1 Propagation delay bus dominant to RxD = low VBB = 7.0 V & 18 V; See Figure 4 6 ms trx_pdf Propagation delay bus recessive to RxD = high VBB = 7.0 V & 18 V; See Figure 4 6 ms trx_sym Symmetry of receiver propagation delay trx_pdr − trx_pdf +2 ms LIN trx_pdr −2 SWITCH INPUT AND HARDWIRE ADDRESS INPUT Tsw Tsw_on SWI HW2 Scan pulse period (Note 20) VBB = 14 V 1024 ms Scan pulse duration (Note 20) VBB = 14 V 128 ms MOTORDRIVER Fpwm MOTx Fjit_depth PWM frequency (Note 20) PWMfreq = 0 (Note 21) 20.6 22.8 25.0 kHz PWMfreq = 1 (Note 21) 41.2 45.6 50.0 kHz PWM jitter modulation depth PWMJen = 1 (Note 21) 10 % Tbrise Turn−on transient time Between 10% and 90% 170 ns Tbfall Turn−off transient time Tstab Run current stabilization time (Note 20) 140 ns TStab[1:0] = 00 14.4 16 17.6 ms TStab[1:0] = 01 19.8 22 24.2 ms TStab[1:0] = 10 25.2 28 30.8 ms TStab[1:0] = 11 28.8 32 35.2 ms SUPPLY TUV1_deb VBB UV1 level debounce time (Note 20) UV3debT = 0 96 ms UV3debT = 1 256 ms 20. Derived from the internal oscillator 21. See SetMotorParam and PWM Regulator www.onsemi.com 8 NCV70627 TxD tBIT tBIT 50% t tBUS_dom(max) LIN tBUS_rec(min) THRec(max) THDom(max) Thresholds receiver 1 THRec(min) THDom(min) Thresholds receiver 2 t tBUS_dom(min) RxD (receiver 2) tBUS_rec(max) 50% trx_pdf trx_pdr t Figure 4. Timing Diagram for AC Characteristics According to LIN 2.0 & 2.1 D1 VBAT VBB C8 100 nF C7 100 mF C4 C3 100 nF 100 nF VDD 1 mF C9 R2 1 k SWI HW0 C2 Connect to GND 2.7 nF MOTXP HW1 NCV70627 MOTXN M Connect to VBAT or GND MOTYP R1 1 k C1 HW2 MOTYN 2.7 nF EMC capacitors 1 nF max. LIN LIN bus C10 X1 VDR 27 V GND, GNDL, GNDPW TST1...TST4 Figure 5. Typical Application NOTES: All resistors are ± 5%, 1/4 W C1, C2 minimum value is 2.7 nF, maximum value is 10 nF Depending on the application, the ESR value and working voltage of C7 must be carefully chosen C3 and C4 must be close to pins VBB and coupled GND directly C9 must be a ceramic capacitor to assure low ESR C10 is placed for system level EMC reasons; value depends on EMC requirements of the application, recommended 200 pF X1 is placed for system level EMC and ESD reasons. Use e.g. BLM18AG601SN1D 600 OHM or resistor 50 W www.onsemi.com 9 NCV70627 Positioning Parameters Stepping Modes Maximum Velocity One of four possible stepping modes can be programmed: • Half−stepping • 1/4 micro−stepping • 1/8 micro−stepping • 1/16 micro−stepping For each stepping mode, the maximum velocity Vmax can be programmed to 16 possible values given in the table below. The accuracy of Vmax is derived from the internal oscillator. Under special circumstances it is possible to change the Vmax parameter while a motion is ongoing. All 16 entries for the Vmax parameter are divided into four groups. When changing Vmax during a motion the application must take care that the new Vmax parameter stays within the same group. Table 9. MAXIMUM VELOCITY SELECTION TABLE Vmax Index Stepping Mode 1/4th Micro−stepping (micro−step/s) 1/8th Micro−stepping (micro−step/s) 1/16th Micro−stepping (micro−step/s) Hex Dec Vmax (full step/s) Group Half−stepping (half−step/s) 0 0 99 A 197 395 790 1579 1 1 136 B 273 546 1091 2182 2 2 167 334 668 1335 2670 3 3 197 395 790 1579 3159 4 4 213 425 851 1701 3403 5 5 228 456 912 1823 3647 6 6 243 486 973 1945 3891 7 7 273 546 1091 2182 4364 8 8 303 607 1213 2426 4852 9 9 334 668 1335 2670 5341 A 10 364 729 1457 2914 5829 C B 11 395 790 1579 3159 6317 C 12 456 912 1823 3647 7294 D 13 546 1091 2182 4364 8728 E 14 729 1457 2914 5829 11658 F 15 973 1945 3891 7782 15564 D www.onsemi.com 10 NCV70627 Minimum Velocity Once the maximum velocity is chosen, 16 possible values can be programmed for the minimum velocity Vmin. The table below provides the obtainable values in full−step/s. The accuracy of Vmin is derived from the internal oscillator. It is not recommended to change the Vmin while a motion is ongoing. Table 10. OBTAINABLE VALUES IN FULL−STEP/s FOR THE MINIMUM VELOCITY Vmin Index Vmax (Full−step/s) A B C D Hex Dec Vmax Factor 0 0 1 99 136 167 197 213 228 243 273 303 334 364 395 456 546 729 973 1 1 1/32 3 4 5 6 6 7 7 8 8 10 10 11 13 15 19 27 2 2 2/32 6 8 10 11 12 13 14 15 17 19 21 23 27 31 42 57 3 3 3/32 9 12 15 18 19 21 22 25 27 31 32 36 42 50 65 88 4 4 4/32 12 16 20 24 26 28 30 32 36 40 44 48 55 65 88 118 5 5 5/32 15 21 26 31 32 35 37 42 46 51 55 61 71 84 111 149 6 6 6/32 18 25 31 36 39 42 45 50 55 61 67 72 84 99 134 179 7 7 7/32 21 30 36 43 46 50 52 59 65 72 78 86 99 118 156 210 8 8 8/32 24 33 41 49 52 56 60 67 74 82 90 97 113 134 179 240 9 9 9/32 28 38 47 55 59 64 68 76 84 93 101 111 128 153 202 271 A 10 10/32 31 42 51 61 66 71 75 84 93 103 113 122 141 168 225 301 B 11 11/32 34 47 57 68 72 78 83 93 103 114 124 135 156 187 248 332 C 12 12/32 37 51 62 73 79 85 91 101 113 124 135 147 170 202 271 362 D 13 13/32 40 55 68 80 86 93 98 111 122 135 147 160 185 221 294 393 E 14 14/32 43 59 72 86 93 99 106 118 132 145 158 172 198 237 317 423 F 15 15/32 46 64 78 93 99 107 113 128 141 156 170 185 214 256 340 454 99 136 167 197 213 228 243 273 303 334 364 395 456 546 729 973 NOTES: The Vmax factor is an approximation. In case of motion without acceleration (AccShape = 1) the length of the steps = 1/Vmin. In case of accelerated motion (AccShape = 0) the length of the first step is shorter than 1/Vmin depending of Vmin, Vmax and Acc. www.onsemi.com 11 NCV70627 Acceleration and Deceleration is not recommended to change the Acc value while a motion is ongoing. The accuracy of Acc is derived from the internal oscillator. Sixteen possible values can be programmed for Acc (acceleration and deceleration between Vmin and Vmax). The table below provides the obtainable values in full−step/s2. One observes restrictions for some combinations of acceleration index and maximum speed. It Table 11. ACCELERATION AND DECELERATION SELECTION TABLE Vmax (FS/s) → 99 136 167 197 213 228 243 273 303 334 364 395 456 546 729 973 ↓ Acc Index Acceleration (Full−step/s2) Hex Dec 0 0 1 1 218 2 2 1004 3 3 3609 4 4 6228 5 5 8848 6 6 11409 7 7 13970 8 8 9 9 A 10 21886 B 11 24447 C 12 27008 D 13 29570 E 14 F 15 49 106 473 735 16531 14785 19092 29570 34925 40047 2 2 Nstep + Vmax * Vmin 2 Acc The formula to compute the number of equivalent full−steps during acceleration phase is: Positioning The position programmed in commands SetPosition is given as a number of (micro−) steps. According to the chosen stepping mode, the internal position words is aligned as described in the table below. When using command SetPositionShort the position is given in numbers of half steps, while the Secure Position is given in a number of two Full Steps. The position data is aligned automatically. Table 12. POSITION WORD ALIGNMENT Stepping Mode Position Word: Pos[15:0] Shift 1/16th S B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 LSB No shift 1/8th S B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 LSB 0 1−bit left ⇔ ×2 1/4th S B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 LSB 0 0 2−bit left ⇔ ×4 Half−stepping S B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 LSB 0 0 0 3−bit left ⇔ ×8 Position Short S S S B9 B8 B7 B6 B5 B4 B3 B2 B1 LSB 0 0 0 No shift Secure Position S B9 B8 B7 B6 B5 B4 B3 B2 B1 LSB 0 0 0 0 0 No shift NOTES: LSB: Least Significant Bit S: Sign bit www.onsemi.com 12 NCV70627 Position Ranges A position is coded by using the binary two’s complement format. According to the positioning commands used and to the chosen stepping mode, the position range will be as shown in the following table. Table 13. POSITION RANGE Command SetPosition Stepping Mode Position Range Full Range Excursion Number of Bits in micro stepping Half−stepping −4096 to +4095 8192 half−steps 13 1/4th micro−stepping −8192 to +8191 16384 micro−steps 14 1/8th micro−stepping −16384 to +16383 32768 micro−steps 15 1/16th SetPositionShort −32768 to +32767 65536 micro−steps 16 Half−stepping micro−stepping −1024 to +1023 2048 half−steps 11 1/4th micro−stepping −2048 to +2047 4096 micro−steps 12 1/8th micro−stepping −4096 to +4095 8192 micro−steps 13 1/16th −8192 to +8191 16384 micro−steps 14 micro−stepping Secure Position When using the command SetPosition, although coded on 16 bits, the position word is shifted to the left by a certain number of bits, according to the stepping mode. SetPositonShort is only coded on 11 bits. A secure position can be programmed. It is mapped to the positioned full range but coded in 11−bits, thus having a lower resolution than normal positions, as shown in the following table. See also command GotoSecurePosition and LIN lost behavior. Table 14. SECURE POSITION Stepping Mode Secure Position Resolution Half−stepping 4 half−steps 1/4th micro−stepping 8 micro−steps (1/4th) 1/8th micro−stepping 16 micro−steps (1/8th) 1/16th micro−stepping 32 micro−steps (1/16th) Important NOTES: For the FailSafe functionality and SetDualPosition command, the secure position is disabled in case the programmed value has the code “10000000000” (0x400 or most negative position). For the GotoSecurePosition command there is no disabling possible. By receiving this command the secure positioning is always executed, even when the secure position has the value 0x400. The resolution of the secure position is limited to 9 bit at start−up. The OTP register is copied in RAM as illustrated below. The RAM bits SecPos1 and SecPos0 are set to 0. SecPos10 SecPos9 SecPos8 SecPos2 SecPos1 SecPos0 RAM SecPos10 SecPos9 SecPos8 SecPos2 FailSafe SleepEn OTP Shaft • Shaft = 0 ⇒ MOTXP is used as positive pin of the X A shaft bit, which can be programmed in OTP or with command SetMotorParam, defines whether a positive motion is a clockwise (CW) or counter−clockwise rotation (CCW) (an outer or an inner motion for linear actuators): coil, while MOTXN is the negative one. • Shaft = 1 ⇒ opposite situation www.onsemi.com 13 NCV70627 Structural Description It will take into account the successive positioning commands to properly initiate or stop the stepper motor in order to reach the set point in a minimum time. It also receives feedback from the motor driver part in order to manage possible problems and decide on internal actions and reporting to the LIN interface. Refer to the Block Diagram in Figure 1. Stepper Motordriver The Motordriver receives the control signals from the control logic. The main features are: • Two H−bridges, designed to drive a stepper motor with two separated coils. Each coil (X and Y) is driven by one H−bridge, and the driver controls the currents flowing through the coils. The rotational position of the rotor, in unloaded condition, is defined by the ratio of current flowing in X and Y. The torque of the stepper motor when unloaded is controlled by the magnitude of the currents in X and Y. • The control block for the H−bridges, including the PWM control, the synchronous rectification and the internal current sensing circuitry. • Two pre−scale 4−bit DAC’s to set the maximum magnitude of the current through X and Y. • Two DAC’s to set the correct current ratio through X and Y. • A boost function that increases the current during cold conditions. Battery voltage monitoring is also performed by this block, which provides the required information to the control logic part. The same applies for detection and reporting of an electrical problem that could occur on the coils. Motion Detection Motion detection is based on the back−emf generated internally in the running motor. When the motor is blocked, e.g. when it hits the end position, the velocity, and as a result also the generated back−emf, is disturbed. The NCV70627 senses the back−emf and compares the value with an independent threshold level. If the back−emf becomes lower than the threshold, the running motor is stopped. LIN Interface The LIN interface implements the physical layer and the MAC and LLC layers according to the OSI reference model. It provides and gets information to and from the control logic block, in order to drive the stepper motor, to configure the way this motor must be driven, or to get information such as actual position or diagnosis (temperature, battery voltage, electrical status...) and pass it to the LIN master node. Miscellaneous The NCV70627 also contains the following: • An internal oscillator, needed for the LIN protocol Control Logic (Position Controller and Main Control) • The control logic block stores the information provided by the LIN interface (in a RAM or an OTP memory) and digitally controls the positioning of the stepper motor in terms of speed and acceleration, by feeding the right signals to the motor driver state machine. • • handler as well as the control logic and the PWM control of the motor driver. An internal trimmed voltage source for precise referencing. A protection block featuring a thermal shutdown and a power−on−reset circuit. A 3.3 V regulator (from the battery supply) to supply the internal logic circuitry. Functions Description This chapter describes the following functional blocks in more detail: • Position controller • Main control and register, OTP memory + ROM • Motor driver The Motion detection and LIN controller are discussed in separate chapters. www.onsemi.com 14 NCV70627 Position Controller Positioning and Motion Control A positioning command will produce a motion as illustrated in Figure 6. A motion starts with an acceleration phase from minimum velocity (Vmin) to maximum velocity (Vmax) and ends with a symmetrical deceleration. This is 00 00 00 00 00 00 00 00 00 00 defined by the control logic according to the position required by the application and the parameters programmed by the application during the configuration phase. The current in the coils is also programmable. Velocity Acceleration range Zero Speed Hold Current Deceleration range 00 00 00 00 00 00 00 00 00 00 Zero Speed Hold Current Vmax Vmin Position P=0 Pstart Pstop Pmin Pmax Figure 6. Position and Motion Control Table 15. POSITION RELATED PARAMETERS Parameter Reference Pmax – Pmin See Positioning Zero Speed Hold Current See Ihold Maximum Current See Irun Acceleration and Deceleration See Acceleration and Deceleration Vmin See Minimum Velocity Vmax See Maximum Velocity Stabilization Time See Stabilization Time Different positioning examples are shown in the next table. www.onsemi.com 15 NCV70627 Table 16. POSITIONING EXAMPLES Short motion. Velocity time New positioning command in same direction, shorter or longer, while a motion is running at maximum velocity. Velocity time New positioning command in same direction while in deceleration phase (Note 22) Note: there is no wait time between the deceleration phase and the new acceleration phase. Velocity New positioning command in reverse direction while motion is running at maximum velocity. Velocity time time New positioning command in reverse direction while in deceleration phase. Velocity time New velocity Vmax programming while motion is running. Velocity time 22. Reaching the end position is always guaranteed, however velocity rounding errors might occur. The device is automatically compensating the position error. The velocity rounding error will be removed at Vmin (e.g. at end of acceleration or when AccShape=1) by a corrective motion action. Dual Positioning acceleration). Once the second motion is achieved, the ActPos register is reset to zero, whereas TagPos register is not changed. When the Secure position is enabled, after the dual positioning, the secure positioning is executed. The figure below gives a detailed overview of the dual positioning function. After the dual positioning is executed an internal flag is set to indicate the NCV70627 is referenced. A SetDualPosition command allows the user to perform a positioning using two different velocities. The first motion is done with the specified Vmin and Vmax velocities in the SetDualPosition command, with the acceleration (deceleration) parameter already in RAM, to a position Pos1[15:0] also specified in SetDualPosition. Then a second relative motion to a physical position Pos1[15:0] + Pos2[15:0] is done at the specified Vmin velocity in the SetDualPosition command (no www.onsemi.com 16 NCV70627 When Stall Detection is enabled, this movement is stopped when a stall is detected. A new motion will start only after Tstab Vmax Profile: Vmin Motion status: 0 first movement TStab (32 ms) second movement t= TStab[1:0] Secure postioning (if enabled) ≠0 0 ≠0 0 ≠0 0 5 steps xx During one Vmin time the ActPos is 0 0 1 0 1 4 0 50 Position: Assume: Pos: xx ActPos: 300 First Position = 300 Second Position = 5 Secure position = 50 ActPos: 0 ActPos: 0 ActPos: 50 ResetPos ResetPos Figure 7. Dual Position Remark: This operation cannot be interrupted or influenced by any further command unless the occurrence of the conditions driving to a motor shutdown or by a HardStop command. Sending a SetDualPosition command while a motion is already ongoing is not recommended. 23. The priority encoder is describing the management of states and commands. 24. A DualPosition sequence starts by setting TagPos buffer register to SecPos value, provided secure position is enabled otherwise TagPos is reset to zero. If a SetPosition(Short) command is issued during a DualPosition sequence, it will be kept in the position buffer memory and executed afterwards. This applies also for the commands Sleep, SetPosParam and GotoSecurePosition. 25. Commands such as GetActualPos or GetStatus will be executed while a Dual Positioning is running. This applies also for a dynamic ID assignment LIN frame. 26. The Pos1, Pos2, Vmax and Vmin values programmed in a SetDualPosition command apply only for this sequence. All other motion parameters are used from the RAM registers (programmed for instance by a former SetMotorParam command). After the DualPosition motion is completed, the former Vmin and Vmax become active again. 27. Commands ResetPosition, SetDualPosition, and SoftStop will be ignored while a DualPosition sequence is ongoing, and will not be executed afterwards. 28. Recommendation: a SetMotorParam command should not be sent during a SetDualPosition sequence: all the motion parameters defined in the command, except Vmin and Vmax, become active immediately. 29. When during the Dual positioning an under voltage UV2 or UV3 happens, the motor will stop (hardstop for UV2 or softstop for UV3). The device will go into the under−voltage and autarkic operational handler function (refer to battery voltage management and autarkic function). Especially for the dual positioning it should be stated that after passing the UV1 level the motion is continued with the parameters Vmax, Vmin and Acceleration from the SetMotorParam command and not from the SetDualPosition command. 30. After the first motion of the dual positioning there is always a fixed stabilization time of 32 ms applied afterwards. After the second motion the programmed stabilization time TStab[1..0] is applied. Position Periodicity +20000 Depending on the stepping mode the position can range from −4096 to +4095 in half−step to −32768 to +32767 in 1/16th micro−stepping mode. One can project all these positions lying on a circle. When executing the command SetPosition, the position controller will set the movement direction in such a way that the traveled distance is minimal. The figure below illustrates that the moving direction going from ActPos = +30000 to TagPos = –30000 is clockwise. If a counter clockwise motion is required in this example, several consecutive SetPosition commands can be used. +10000 ActPos = +30000 Motion direction 0 TagPos = −30000 −10000 −20000 Figure 8. Motion Direction is Function of Difference between ActPos and TagPos www.onsemi.com 17 NCV70627 to GND. In that case the top I ³ R converter output is low, via the closed passing switch SPASS_T this signal is fed to the “R” comparator which output HW2_Cmp is high. Closing bottom switch SBOT (DriveLS = 1) will sense a current to VBAT. The corresponding I ³ R converter output is low and via SPASS_B fed to the comparator. The output HW2_Cmp will be high. Hardwired Address HW2 In the drawing below, a simplified schematic diagram is shown of the HW2 comparator circuit. The HW2 pin is sensed via 2 switches. The DriveHS and DriveLS control lines are alternatively closing the top and bottom switch connecting HW2 pin with a current to resistor converter. Closing STOP (DriveHS = 1) will sense a current SPASS_T I/R State DriveHS High STOP 1k Low LOGIC HW2 SBOT 1 2 Debouncer DriveLS 64 ms 3 “R”−Comp I/R 1 = R2GND SPASS_B COMP Debouncer 32 ms 2 = R2VBAT Rth 3 = OPEN Figure 9. 3 cases can be distinguished (see also Figure 9 above): • HW2 is connected to ground: R2GND or drawing 1 • HW2 is connected to VBAT: R2VBAT or drawing 2 • HW2 is floating: OPEN or drawing 3 www.onsemi.com 18 HW2_Cmp Float NCV70627 Table 17. STATE DIAGRAM OF THE HW2 COMPARATOR Previous State DriveLS DriveHS HW2_Cmp New State Condition Drawing Float 1 0 0 Float R2GND or OPEN 1 or 3 Float 1 0 1 High R2VBAT 2 Float 0 1 0 Float R2VBAT or OPEN 2 or 3 Float 0 1 1 Low R2GND 1 Low 1 0 0 Low R2GND or OPEN 1 or 3 Low 1 0 1 High R2VBAT 2 Low 0 1 0 Float R2VBAT or OPEN 2 or 3 Low 0 1 1 Low R2GND 1 High 1 0 0 Float R2GND or OPEN 1 or 3 High 1 0 1 High R2VBAT 2 High 0 1 0 High R2VBAT or OPEN 2 or 3 High 0 1 1 Low R2GND 1 As illustrated in the table above (Table 17), the state is depending on the previous state, the condition of the 2 switch controls (DriveLS and DriveHS) and the output of HW2_Cmp. Figure 10 shows an example of a practical case where a connection to VBAT is interrupted. The logic is controlling the correct sequence in closing the switches and in interpreting the 64 ms debounced HW2_Cmp output accordingly. The output of this small state−machine is corresponding to: • High or address = 1 • Low or address = 0 • Floating Condition R2VBAT OPEN R2VBAT R2GND t Tsw = 1024 ms DriveLS t Tsw_on = 128 ms DriveHS t “R”−Comp Rth t HW2_Cmp t Low High Float High Float State t Figure 10. Timing Diagram Showing the Change in State for HW2 Comparator www.onsemi.com 19 NCV70627 R2VBAT a motion to secure position after a debounce time of 64ms, which prevents false triggering in case of micro− interruptions of the power supply. A resistor is connected between VBAT and HW2. Every 1024ms SBOT is closed and a current is sensed. The output of the I ⇒ R converter is low and the HW2_Cmp output is high. Assuming the previous state was floating, the internal logic will interpret this as a change of state and the new state will be high (see also Table 17). The next time SBOT is closed the same conditions are observed. The previous state was high so based on Table 17 the new state remains unchanged. This high state will be interpreted as HW2 address = 1. R2GND If a resistor is connected between HW2 and the GND, a current is sensed every 1024 ms when STOP is closed. The output of the top I ⇒ R converter is low and as a result the HW2_Cmp output switches to high. Again based on the stated diagram in Table 17 one can see that the state will change to Low. This low state will be interpreted as HW2 address = 0. OPEN In case the HW2 connection is lost (broken wire, bad contact in connector) the next time SBOT is closed, this will be sensed. There will be no current, the output of the corresponding I ⇒ R converter is high and the HW2_Cmp will be low. The previous state was high. Based in Table 17 one can see that the state changes to float. This will trigger External Switch SWI As illustrated in Figure 11 the SWI comparator is almost identical to HW2. The major difference is in the limited number of states. Only open or closed is recognized leading to respectively ESW = 0 and ESW = 1. SPASS_T I→R State Closed DriveHS SWI LOGIC STOP Open “R”−Comp 1 2 32 ms Debouncer COMP 1 = R2GND 2 = OPEN Rth SWI_Cmp Figure 11. Simplified Schematic Diagram of the SWI Comparator As illustrated in the drawing above, a change in state is always synchronized with DriveHS or DriveLS. The same synchronization is valid for updating the internal position register. This means that after every current pulse (or closing of STOP or SBOT) the state of the position switch together with the corresponding position is memorized. The GetActualPos command reads back the <ActPos> register and the status of ESW. In this way the master node may get synchronous information about the state of the switch together with the position of the motor. See Table 18 below. Table 18. GetActualPos LIN COMMAND Reading Frame Structure Byte Content Bit 7 0 Identifier * 1 Data 1 ESW 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 5 Checksum VddReset Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 * 1 0 ID3 ID2 ID1 ID0 AD[6:0] StepLoss ElDef UV TSD Checksum over data www.onsemi.com 20 TW Tinfo[1:0] NCV70627 SWI closed Tsw = 1024 ms DriveHS t Tsw_on = 128 ms t “R”−Comp Rth t SWI_Cmp 120 ms t ESW 0 1 1 1 t ActPos+1 ActPos+2 ActPos ActPos+3 ActPos t Figure 12. Timing Diagram Showing the Change in States for SWI Comparator Sleep Mode Main Control and Register, OTP memory + ROM When entering sleep mode, the stepper−motor can be driven to its secure position. After which, the circuit is completely powered down, apart from the LIN receiver, which remains active to detect a dominant state on the bus. In case sleep mode is entered while a motion is ongoing, a transition will occur towards secure position as described in Positioning and Motion Control provided <SecPos> is enabled. Otherwise, <SoftStop> is performed. Sleep mode can be entered in the following cases: • The circuit receives a LIN frame with identifier 0x3C and first data byte containing 0x00, as required by LIN specification rev1.3 and <SleepEn> bit = 1. See also Sleep in the LIN Application Command section. • In case the <SleepEn> bit =1 and the LIN bus remains inactive (or is lost) during more than 25000 time slots (1.30s at 19.2kbit/s), a time−out signal switches the circuit to sleep mode. Power−up Phase Power−up phase of the NCV70627 will not exceed 10 ms. After this phase, the NCV70627 is in standby mode, ready to receive LIN messages and execute the associated commands. After power−up, the registers and flags are in the reset state, while some of them are being loaded with the OTP memory content (see Table 21: RAM Registers). Reset After power−up, or after a reset occurrence (e.g. a micro−cut on pin VBB has made VDD to go below VddReset level), the H−bridges will be in high−impedance mode, and the registers and flags will be in a predetermined position. This is documented in Table 21: RAM Registers and Table22: Flags Table. Soft−stop A soft−stop is an immediate interruption of a motion, but with a deceleration phase. At the end of this action, the register <TagPos> is loaded with the value contained in register <ActPos>, (see Table 21: Ram Registers). The circuit is then ready to execute a new positioning command, provided thermal and electrical conditions allow for it. The circuit will return to normal mode if a valid LIN frame is received (this valid frame can be addressed to another slave). Thermal Shutdown Mode When thermal shutdown occurs, the circuit performs a <SoftStop> command and goes to motor shutdown mode (see Figure 13: State Diagram Temperature Management). www.onsemi.com 21 NCV70627 Temperature Management The NCV70627 monitors temperature by means of two thresholds and one shutdown level, as illustrated in the state diagram and illustration of Figure 13: State Diagram Temperature Management below. The only condition to Normal Temp. reset flags <TW> and <TSD> (respectively thermal warning and thermal shutdown) is to be at a temperature lower than Ttw and to get the occurrence of a GetStatus or a GetFullStatus LIN frame. Thermal warning T° > Ttw −<Tinfo> = “00” −<TW> = ‘0’ −<TSD> = ‘0’ Thermal shutdown −<Tinfo> = “10” −<TW> = ‘1’ −<TSD> = ‘0’ −<I_Boost_ENB> = ‘1’ T5 < Ttw & T° > Ttw LIN frame: GetStatus or GetFullStatus T° > Ttsd T° < Ttw Post thermal warning −<Tinfo> = “11” −<TW> = ‘1’ −<TSD> = ‘1’ −SoftStop if motion ongoing −Motor shutdown (motion disabled) T° > Ttsd T° < Ttsd −<Tinfo> = “00” −<TW> = ‘1’ −<TSD> = ‘0’ Post thermal shutdown 1 T° < Tlow T° < Ttw T° > Tlow Post thermal shutdown 2 −<Tinfo> = “00” −<TW> = ‘1’ −<TSD> = ‘1’ Low Temp. −<Tinfo> = “01” −<TW> = ‘0’ −<TSD> = ‘0’ −Motor shutdown (motion disabled) −<Tinfo> = “10” −<TW> = ‘1’ −<TSD> = ‘1’ −Motor shutdown (motion disabled) T° > Ttw Figure 13. State Diagram Temperature Management T shutdown level T T warning level t T<tw> bit I_Boost_ENB forced to ‘1’ T<tsd> bit T < Ttw and getstatus or getfullstatus T > Ttsd, motor stops and shutdown T < Ttw and getstatus or getfullstatus Figure 14. Illustration of Thermal Management Situation www.onsemi.com 22 NCV70627 Under−Voltage Condition and Autarkic Functionality Battery Voltage Management transitions, when supply voltage VBB drops below UV3 level, a 32 ms debouncer is implemented that is derived from the internal oscillator. For transitions when supply voltage VBB rises above UV1 level, the NVC70627 reacts after 96 ms debounce time typically (OTP bit UV3debT is not set). This time is increased to 256 ms when OTP bit UV3debT is zapped to “1”. Zapping can be done via the SetOTPparam command. The NCV70627 monitors the VBB voltage by means of two under voltage threshold UV3 and UV2 and one shutdown level. The only condition to go back to normal operation is to recover by a VBB voltage higher than UV1. The flags <UV2> and <UV3> can only be cleared by receiving the header of a GetStatus or a GetFullStatus command after the VBB voltage higher than UV1. The UV3 and UV1 levels are programmable by a LIN command. There are 8 levels available for the UV3 threshold voltage. The UV1 level is ratio metric coupled with UV3. UV2 has only a fixed threshold level. Refer to the DC parameter table for the different under voltage levels. When the battery voltage drops below UV3, the <UV3> flag will be set and a Soft Stop is performed to stop the motion. If during this decelerated motion the battery voltage does not go under the UV2 level, the NCV70627 will go to state <StoppedUnder UV1>” and the original Target Position (TagPos) is saved while the motor is kept in position by the Hold current*. As soon as the VBB voltage rises above the UV1 level the NCV70627 will continue the motion the (TagPos) and will go to the normal <Stopped> state afterwards. When during a motion the battery voltage drops below the UV2 level, the NCV70627 will stop immediately by a Hard Stop and directly enters the state <HardUnder> followed by <ShutUnder>. The motor is placed in HiZ and the flags <UV2> and <Steploss> are set (see Figure 15). Note*: In this situation the <Steploss> flag is not set. Autarkic Function From above described states the device can enter the state <ShutUnder>. When in the <ShutUnder> state, the device will perform the Autarkic Function: • If in this state VBB becomes > UV1 within 15 seconds, the NCV70627 still will resume the motion to the saved (TagPos) and will go to the <Stopped> state afterwards. It accepts updates of the target position by means of the commands SetPosition, SetPositionShort, SetPosParam and GotoSecurePosition, even if the <UV2> flag and <Steploss> flags are NOT cleared. • If however the VBB voltage remains below UV2 level voltage level for more than 15 seconds, the device will enter <Shutdown> state and the target position is overwritten by Actual Position. This state can be exited only if VBB is > UV1 voltage level and an incoming command GetStatus or GetFullStatus is received. Important Notes: 1. In the case of Autarkic positioning, care needs to be taken because accumulated steploss can cause a significant deviation between physical and stored actual position. 2. The SetDualPosition command will only be executed after clearing the <UV2> and <Steploss> flags. 3. RAM reset occurs when Vdd < VddReset (digital Power−On−Reset level). 4. The Autarkic function remains active as long as VDD > VddReset. Remarks: If VBB voltage drops below the UV2 level while the NCV70627 is in the motion “stabilization phase”, only the <UV2> flag is set; the <Steploss> flag is not set. When the NCV70627 is in a stopped states <Stopped> or <StoppedUnder UV1> and the VBB voltage drops below UV2 level, the device will directly go to the state <ShutUnder>, but does not raise the <Stepploss> flag. At the UV3 comparator output, there is implemented an unsymmetrical debouncer which will filter immediate actions during unwanted spikes at the battery supply. For www.onsemi.com 23 NCV70627 OTP Register OTP Memory Structure The table below shows how the parameters to be stored in the OTP memory are located. Table 19. OTP MEMORY STRUCTURE Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x00 SecPosA TSD2 TSD1 TSD0 IREF3 IREF2 IREF1 IREF0 0x01 LIN_BR ADM BG5 BG4 BG3 BG2 BG1 BG0 0x02 AbsThr3 AbsThr2 AbsThr1 AbsThr0 PA3 PA2 PA1 PA0 0x03 Irun3 Irun2 Irun1 Irun0 Ihold3 Ihold2 Ihold1 Ihold0 0x04 Vmax3 Vmax2 Vmax1 Vmax0 Vmin3 Vmin2 Vmin1 Vmin0 0x05 SecPos10 SecPos9 SecPos8 Shaft Acc3 Acc2 Acc1 Acc0 0x06 SecPos7 SecPos6 SecPos5 SecPos4 SecPos3 SecPos2 Failsafe SleepEn 0x07 UV3debT UV3Thr2 UV3Thr1 UV3Thr0 StepMode1 StepMode0 LOCKBT LOCKBG 0x08 SecPos10A SecPos9A SecPos8A OSC4 OSC3 OSC2 OSC1 OSC0 0x09 SecPos7A SecPos6A SecPos5A SecPos4A SecPos3A SecPos2A FailsafeA SleepEnA Application Parameters Stored in OTP Memory Parameters stored at address 0x00 and 0x01 and bit <LOCKBT> are already programmed in the OTP memory at circuit delivery. They correspond to the calibration of the circuit and are just documented here as an indication. Each OTP bit is at ‘0’ when not zapped. Zapping a bit will set it to ‘1’. Thus only bits having to be at ‘1’ must be zapped. Zapping of a bit already at ‘1’ is disabled. Each OTP byte will be programmed separately (see command SetOTPparam). Once OTP programming is completed, bit <LOCKBG> can be zapped to disable future zapping, otherwise any OTP bit at ‘0’ could still be zapped by using a SetOTPparam command. Except for the physical address <PA[3:0]> these parameters, although programmed in a non−volatile memory can still be overwritten in RAM by a LIN SetMotorParam writing operation. PA[3:0] In combination with HW[2:0] it forms the physical address AD[6:0] of the stepper−motor. Up to 128 stepper−motors can theoretically be connected to the same LIN bus. AbsThr[3:0] Absolute threshold used for the motion detection Index Table 20. OTP OVERWRITE PROTECTION Lock Bit Protected Bytes LOCKBT (factory zapped before delivery) 0x00[6:0], 0x01[5:0], 0x08[4:0] LOCKBG 0x00 to 0x09 The command used to load the application parameters via the LIN bus in the RAM prior to an OTP Memory programming is SetMotorParam. This allows for a functional verification before using a SetOTPparam command to program and zap separately one OTP memory byte. A GetOTPparam command issued after each SetOTPparam command allows verifying the correct byte zapping. Note: Zapped bits will become active only after a power cycle. After programming the LIN bits the power cycle has to be performed first to guarantee further communication with the device at the new address. AbsThr AbsThr level (V) (*) 0 0 0 0 0 Disable 1 0 0 0 1 0.6 2 0 0 1 0 1.3 3 0 0 1 1 1.9 4 0 1 0 0 2.6 5 0 1 0 1 3.2 6 0 1 1 0 3.9 7 0 1 1 1 4.5 8 1 0 0 0 5.1 9 1 0 0 1 5.8 A 1 0 1 0 6.4 B 1 0 1 1 7.1 C 1 1 0 0 7.7 D 1 1 0 1 8.3 E 1 1 1 0 9.0 F 1 1 1 1 9.6 (*) Not tested in production. Values are approximations. www.onsemi.com 24 NCV70627 UV3Thr[2:0] Under voltage threshold voltage for UV3 and UV1. Index UV3Thr UV3 Level UV1 Level 0 0 0 0 5.90 6.62 1 0 0 1 6.30 7.07 2 0 1 0 6.70 7.52 3 0 1 1 7.10 7.97 4 1 0 0 7.50 8.41 5 1 0 1 7.90 8.86 6 1 1 0 8.30 9.31 7 1 1 1 8.70 9.76 Ihold[3:0] Hold current for each coil of the stepper−motor. The table below provides the 16 possible values for <IHOLD>. Index Irun[3:0] Current amplitude value to be fed to each coil of the stepper−motor. The table below provides the 16 possible values for <IRUN>. Index Irun Ihold Hold Current (mA) Hold Boost Current (mA) 0 0 0 0 0 59 81 1 0 0 0 1 71 98 2 0 0 1 0 84 116 3 0 0 1 1 100 138 4 0 1 0 0 119 164 5 0 1 0 1 141 194 6 0 1 1 0 168 231 7 0 1 1 1 200 275 8 1 0 0 0 238 327 9 1 0 0 1 283 389 Run Current (mA) Run Boost Current (mA) A 1 0 1 0 336 462 0 0 0 0 0 59 81 B 1 0 1 1 400 550 1 0 0 0 1 71 98 C 1 1 0 0 476 655 2 0 0 1 0 84 116 D 1 1 0 1 566 778 3 0 0 1 1 100 138 E 1 1 1 0 673 925 F 1 1 1 1 0 0 4 0 1 0 0 119 164 5 0 1 0 1 141 194 6 0 1 1 0 168 231 7 0 1 1 1 200 275 8 1 0 0 0 238 327 9 1 0 0 1 283 389 A 1 0 1 0 336 462 B 1 0 1 1 400 550 C 1 1 0 0 476 655 D 1 1 0 1 566 778 Step Mode Step Mode E 1 1 1 0 673 925 0 0 1/2 stepping F 1 1 1 1 800 1100 0 1 1/4 stepping 1 0 1/8 stepping 1 1 1/16 stepping Note: When the motor is stopped, the current is reduced from <IRUN> to <IHOLD>. In the case of 0 mA hold current (1111 in the hold current table), the following sequence is applied: 1. The current is first reduced to 59 mA or 81 mA during I_Boost function (corresponding to 0000 value in the table). 2. The PWM regulator is switched off; the bottom transistors of the bridges are grounded. Step Mode Setting of step modes. coded least significant bits being set to ‘0’. The Secure Position in OTP has only 9 bits. The two least significant bits are loaded as ‘0’ to RAM when copied from OTP. SecPosA If <SecPosA> = 0 then <SecPos[10:2]>, <Failsafe> and <SleepEn> stored in bytes 0x05 and 0x06 are used during operation If <SecPosA> = 1 then <SecPos[10:2]>, <Failsafe> and <SleepEn> stored in bytes 0x08 and 0x09 are used during operation Programming SecPosA with “1” makes the OTP bytes 0x05 and 0x06 obsolete. In this case the OTP bytes at 0x08 and 0x09 will be read at the positions of bytes 0x05 and 0x06 when reading the OTP via the GetOTPparam command. Shaft This bit distinguishes between a clock−wise or counter−clock−wise rotation. SecPos[10:2] Secure Position of the stepper−motor. This is the position to which the motor is driven in case of a LIN communication loss or when the LIN error−counter overflows. If <SecPos[10:2]> = “100 0000 00xx”, secure positioning is disabled for the FailSafe function and the SetDualPosition command while it is not disabled for the GotoSecurePosition and even is still executed for the position “100 0000 00xx”. Note: The Secure Position is coded on 11 bits only, providing actually the most significant bits of the position, the non www.onsemi.com 25 NCV70627 Vmax[3:0] Maximum velocity Index Vmax Vmax(full step/s) Group Acc[3:0] Acceleration and deceleration between Vmax and Vmin. Acceleration (Full−step/s2) 0 0 0 0 0 99 A Index Acc 1 0 0 0 1 136 B 0 0 0 0 0 2 0 0 1 0 167 1 0 0 0 0 0 1 49 (*) 1 218 (*) 0 1004 . 3 0 0 1 1 197 2 4 0 1 0 0 213 3 0 0 1 1 3609 . 5 0 1 0 1 228 4 0 1 0 0 6228 . 6 0 1 1 0 243 5 0 1 0 1 8848 . 7 0 1 1 1 273 6 0 1 1 0 11409 . 8 1 0 0 0 303 7 0 1 1 1 13970 . 1 0 0 0 16531 . C 9 1 0 0 1 334 8 A 1 0 1 0 364 9 1 0 0 1 19092 (*) B 1 0 1 1 395 A 1 0 1 0 21886 (*) C 1 1 0 0 456 B 1 0 1 1 24447 (*) D 1 1 0 1 546 C 1 1 0 0 27008 (*) E 1 1 1 0 729 D 1 1 0 1 29570 (*) 973 E 1 1 1 0 34925 (*) F 1 1 1 1 40047 (*) F 1 1 1 1 D Vmin[3:0] Minimum velocity. Index Vmin (*) restriction on speed SleepEn IF <SleepEn> = 1 −> NCV70627 always goes to low−power sleep mode incase of LIN timeout. IF <SleepEn> = 0, there is no more automatic transition to low−current sleep mode (i.e. stay in stop mode with applied hold current, unless there are failures). Exception to this rule are the states <Standby> and <Shutdown>, in which the device can enter sleep regardless of the state of SleepEn. Note: The <SleepEn> function acts for the LIN command “SLEEP” too. When <SleepEn> = 1 and the Sleep command is received the NCV70627 will go into Sleep. In case the <SleepEn> = 0 the NCV70627 will go into stop mode. FailSafe Description: see section LIN Lost Behavior. Vmax Factor 0 0 0 0 0 1 1 0 0 0 1 1/32 2 0 0 1 0 2/32 3 0 0 1 1 3/32 4 0 1 0 0 4/32 5 0 1 0 1 5/32 6 0 1 1 0 6/32 7 0 1 1 1 7/32 8 1 0 0 0 8/32 9 1 0 0 1 9/32 A 1 0 1 0 10/32 B 1 0 1 1 11/32 C 1 1 0 0 12/32 D 1 1 0 1 13/32 E 1 1 1 0 14/32 F 1 1 1 1 15/32 LIN_BR Setting of LIN Baud rate. <LIN_BR> Baud rate 0 19200 Baud 1 9600 Baud ADM <ADM> controls how the OTP bits and hardwired LIN address bits are combined into the LIN node address (see also LIN Address section). UV3DepT Debounce time after passing the UV1 level of the rising battery voltage slope. The debouce time is specified in the AC parameter table. www.onsemi.com 26 NCV70627 Table 21. RAM REGISTERS Mnemonic Length (bit) ActPos 16 Pos/TagPos 16/11 AccShape Coil peak current Register Actual position Related Commands Comment Reset State GetActualPos GetFullStatus GotoSecurePos ResetPosition 16−bit signed GetFullStatus GotoSecurePos ResetPosition SetPosition SetPositionShort SetPosParam 16−bit signed or 11−bit signed for half stepping (see Positioning) 1 GetFullStatus SetMotorParam ‘0’ ⇒ normal acceleration from Vmin to Vmax ‘1’ ⇒ motion at Vmin without acceleration Irun 4 GetFullStatus SetMotorParam Operating current See look−up table Irun Coil hold current Ihold 4 GetFullStatus SetMotorParam Standstill current See look−up table Ihold Minimum Velocity Vmin 4 GetFullStatus SetMotorParam SetPosParam See Section Minimum Velocity See look−up table Vmin Maximum Velocity Vmax 4 GetFullStatus SetMotorParam SetPosParam See Section Maximum Velocity See look−up table Vmax Shaft Shaft 1 GetFullStatus SetMotorParam Direction of movement Acc 4 GetFullStatus SetMotorParam SetPosParam See Section Acceleration See look−up table Acc Secure Position SecPos 11 GetFullStatus SetMotorParam Target position when LIN connection fails; 11 MSB’s of 16−bit position (LSB’s fixed to ‘0’) Stepping mode StepMode 2 GetFullStatus SetStallParam See Section Stepping Modes See look−up table StepMode Stall detection absolute threshold AbsThr 4 GetFullStatus SetStallParam SetPosParam The B−emf voltage threshold level at which stall is detected. Under voltage UV3 UV3Thr 3 GetFullStatus SetStallParam Under voltage UV3 and UV1 level Sleep Enable SleepEn 1 SetOTPParam Enables entering sleep mode after LIN lost. See also LIN lost behavior Fail Safe FailSafe 1 SetOTPParam Triggers autonomous motion after LIN lost at POR. See also LIN lost behavior Stall detection delay FS2StallEn 3 GetFullStatus SetStallParam Delays the stall detection after acceleration ‘000’ Stall detection sampling MinSamples 3 GetFullStatus SetStallParam Duration of the zero current step in number of PWM cycles. ‘000’ PWMJEn 1 GetFullStatus SetStallParam ‘1’ means jitter is added ‘0’ 100% duty cycle Stall Enable DC100StEn 1 GetFullStatus SetStallParam ‘1’ means stall detection is enabled in case PWM regulator runs at d = 100% ‘0’ PWM frequency PWMFreq 1 GetFullStatus SetMotorParam ‘0’ means ~ 22.8 KHz, ‘1’ means ~ 45.6 KHz ‘0’ Last programmed Position Acceleration shape Acceleration/ deceleration PWM Jitter www.onsemi.com 27 ‘0’ From OTP memory NCV70627 Table 22. FLAGS TABLE Mnemonic Length (bit) LIN Timeout Error TimE 1 GetFullStatus ‘1’ if no data (dominant state) was received for more than T_timeout (~1.3 s) ‘0’ LIN Data Error DataE 1 GetFullStatus ‘1’ when one of the three errors occurred: checksum error, stop bit error or length error ‘0’ LIN Header Error HeadE 1 GetFullStatus ‘1’ when one of the two errors occurred: parity error or synchronization error ‘0’ BitE 1 GetFullStatus ‘1’ when received bit value is different from the one being transmitted ‘0’ Overall LIN Error LIN_E 1 GetActualPos GetFullStatus GetStatus Or function of the TimE, DataE, HeadE and BitE ‘0’ Electrical defect ElDef 1 GetActualPos GetStatus GetFullStatus <OVC1> or <OVC2> or ‘open−load on coil X’ or ‘open−load on coil XY Resets only after Get(Full)Status ‘0’ External switch status ESW 1 GetActualPos GetStatus GetFullStatus ‘0’ = open ‘1’ = close ‘0’ Electrical flag HS 1 Internal use <UV2> or <ElDef> or <VDDreset> ‘0’ Motion status Motion 3 GetFullStatus “000” = Stop, last movement was inner (CCW) motion Flag LIN Bit Error Related Commands Comment Reset State “000” “100” = Stop, last movement was outer (CW) motion “001” = inner (CCW) motion acceleration “010” = inner (CCW) motion deceleration “011” = inner (CCW) motion max. speed “101” = outer (CW) motion acceleration “110” = outer (CW) motion deceleration “111” = outer (CW) motion max. speed Over current in coil X OVC1 1 GetFullStatus ‘1’ = over current; reset only after GetFullStatus ‘0’ Over current in coil Y OVC2 1 GetFullStatus ‘1’ = over current; reset only after GetFullStatus ‘0’ Secure position enabled SecEn 1 Internal use ‘0’ if <SecPos> = “100 0000 0000” ‘1’ otherwise Circuit going to Sleep mode Sleep 1 Internal use ‘1’ = Sleep mode reset by LIN command ‘0’ Step loss StepLoss 1 GetActualPos GetStatus GetFullStatus ‘1’ = step loss due to under voltage, over current, open circuit or stall; Resets only after GetFullStatus or GetActualPos ‘1’ Device ID Code Device ID 4 GetActualPos Contains the unique device ID ‘3’ AbsStall 1 GetFullStatus ‘1’ = Vbemf < AbsThr ‘0’ Stall Stall 1 GetFullStatus GetStatus ‘1’ = Vbemf < AbsThr ‘0’ Motor stop Stop 1 Internal use Temperature info Tinfo 2 GetActualPos GetStatus GetFullStatus “00” = normal temperature range “01” = low temperature warning “10” = high temperature warning “11” = motor shutdown Thermal shutdown TSD 1 GetActualPos GetStatus GetFullStatus ‘1’ = shutdown (Tj > Ttsd) Resets only after Get(Full)Status and if <Tinfo> = “00” ‘0’ Thermal warning TW 1 GetActualPos GetStatus GetFullStatus ‘1’ = over temperature (Tj > Ttw) Resets only after Get(Full)Status and if <Tinfo> = “00” ‘0’ Absolute Stall n.a. ‘0’ www.onsemi.com 28 “00” NCV70627 Table 22. FLAGS TABLE Flag Mnemonic Length (bit) Battery decelerated stop voltage UV3 1 GetActualPos GetStatus GetFullStatus ‘0’ = VBB > UV3 ‘1’ = VBB ≤ UV3 Resets only after reception of header of Get(Full)Status and if VBB > UV1 ‘0’ Battery hard stop voltage UV2 1 GetActualPos GetStatus GetFullStatus ‘0’ = VBB > UV2 ‘1’ = VBB ≤ UV2 Resets only after reception of header of Get(Full)Status and if VBB > UV1 ‘0’ Overall UV flag UV 1 GetActualPos GetStatus GetFullStatus Is the OR function of UV2 and UV3 Resets only after reception of header of Get(Full)Status and if VBB > UV1 ‘0’ VddReset 1 GetActualPos GetStatus GetFullStatus Set at ‘1’ after power−up of the circuit. If this was due to a supply micro−cut, it warns that the RAM contents may have been lost; can be reset to ‘0’ with a GetStatus or a Get(Full)Status command ‘1’ Digital supply reset Related Commands Comment www.onsemi.com 29 Reset State NCV70627 Priority Encoder The table below describes the simplified state management performed by the main control block. Table 23. PRIORITY ENCODER (See table notes on the following page.) State → Standby Command ↓ Stopped GotoPos Motor Stopped, Ihold in Coils Motor Motion Ongoing Dual Position SoftStop HardStop No Influence on RAM and TagPos Motor Decelerating SoftStopped ShutDown Sleep Motor Forced to Stop Motor Stopped, H−bridges in Hi−Z No Power (Note 31) HardUnder ShutUnder GetActualPos LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response GetOTPparam LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response GetFullStatus or GetStatus [ attempt to clear <TSD> and <HS> flags] LIN in-frame response; if (<TSD> or <HS>) = ‘0’ then → Stopped LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response LIN in-frame response; if (<TSD> or <HS>) = ‘0’ then → Stopped LIN in-frame response SetMotorParam [Master takes care about proper update] RAM update RAM update RAM update RAM update RAM update RAM update RAM update RAM update RAM update <TagPos> kept <TagPos> and <ActPos> reset No action; <Sleep> flag will be evaluated when motor stops No action; <Sleep> flag will be evaluated when motor stops ResetPosition <TagPos> and <ActPos> reset SetPosition <TagPos> updated; → GotoPos <TagPos> updated <TagPos> updated SetPositionShort <TagPos> updated; → GotoPos <TagPos> updated <TagPos> updated GotoSec Position If <SecEn> = ‘1’ then <TagPos> = <SecPos>; → GotoPos If <SecEn> = ‘1’ then <TagPos> = <SecPos> If <SecEn> = ‘1’ then <TagPos> = <SecPos> DualPosition → Dual Position → Sleep (Note 38) HardStop VBB < UV2 and t > 15 seconds → Hard Under If <SecEn> = ‘1’ then <TagPos> = <SecPos> else → SoftStop If <SecEn> = ‘1’ then <Tag Pos> = <SecPos>; will be evaluated after DualPosition No action; <Sleep> flag will be evaluated when motor stops → Hard Stop → Hard Stop → Hard Stop → Hard Under → Hard Stop → Hard Under No action; <Sleep> flag will be evaluated when motor stops No action; <Sleep> flag will be evaluated when motor stops → Stopped VBB < UV2 and t < 15 seconds <ElDef> = ‘1’ ⇒ <HS> = ‘1’ <TagPos> and <ActPos> reset → SoftStop SoftStop Sleep or LIN timeout [ ⇒ <Sleep> = ‘1’, reset by any LIN command received later] RAM update → Shutdown → HardStop; <Step Loss> = ‘1’ → Hard Stop; <Step Loss> = ‘1’ → Hard Stop; <Step Loss> = ‘1’ → Shutdown www.onsemi.com 30 → Shutdown NCV70627 Table 23. PRIORITY ENCODER (See table notes on the following page.) State → Standby Dual Position Stopped GotoPos Command ↓ Motor Stopped, Ihold in Coils Motor Motion Ongoing No Influence on RAM and TagPos Thermal shutdown [<TSD> = ‘1’] → Shutdown → SoftStop → SoftStop Motion finished n.a. → Stopped → Stopped SoftStop HardStop Motor Decelerating Motor Forced to Stop SoftStopped ShutDown Sleep Motor Stopped, H−bridges in Hi−Z No Power (Note 31) → Shutdown → Stopped; <TagPos> = <Act Pos> → Stopped; <TagPos> = <ActPos> HardUnder ShutUnder → Shutdown n.a. n.a. With the Following Color Code: Command Ignored Master is responsible for proper update (see Note 36) Transition to Another State 31. Leaving <Sleep> state is equivalent to power−on−reset. 32. After power−on−reset, the <Standby> state is entered. 33. A DualPosition sequence runs with a separate set of RAM registers. The parameters that are not specified in a DualPosition command are loaded with the values stored in RAM at the moment the DualPosition sequence starts. <AccShape> is forced to ‘1’ during second motion. <AccShape> at ‘0’ will be taken into account after the DualPosition sequence. A GetFullStatus command will return the default parameters for <Vmax> and <Vmin> stored in RAM. 34. The <Sleep> flag is set to ‘1’ when a LIN timeout or a Sleep command occurs. It is reset by the next LIN command (<Sleep> is cancelled if not activated yet). 35. Shutdown state can be left only when <TSD> and <HS> flags are reset. 36. Flags can be reset only after the master could read them via a GetStatus or GetFullStatus command, and provided the physical conditions allow for it (normal temperature, correct battery voltage and no electrical defect). 37. A SetMotorParam command sent while a motion is ongoing (state <GotoPos>) should not attempt to modify <Acc> and <Vmin> values. This can be done during a DualPosition sequence since this motion uses its own parameters, the new parameters will be taken into account at the next SetPosition or SetPositionShort command. 38. Some transitions like <GotoPos> → <Sleep> are actually done via several states: <GotoPos> → <SoftStop> → <Stopped> → <Sleep> (see diagram below). 39. Two transitions are possible from state <Stopped> when <Sleep> = ‘1’: 1) Transition to state <Sleep> if (<SecEn> = ‘0’) or ((<SecEn> = ‘1’) and (<ActPos> = <SecPos>)) or <Stop> = ‘1’ 2) Otherwise transition to state <GotoPos>, with <TagPos> = <SecPos> 40. <SecEn> = ‘1’ when register <SecPos> is loaded with a value different from the most negative value (i.e. different from 0x400 = “100 0000 0000”). 41. <Stop> flag allows distinguishing whether state <Stopped> was entered after HardStop/SoftStop or not. <Stop> is set to ‘1’ when leaving state <HardStop> or <SoftStop> and is reset during first clock edge occurring in state <Stopped>. 42. Command for dynamic assignment of Ids is decoded in all states except <Sleep> and has no effect on the current state. 43. While in state <Stopped>, if <ActPos> → <TagPos> there is a transition to state <GotoPos>. This transition has the lowest priority, meaning that <Sleep>, <Stop>, <TSD>, etceteras are first evaluated for possible transitions. 44. If <StepLoss> is active, then SetPosition, SetPositionShort and GotoSecurePosition commands are not ignored. <StepLoss> can only be cleared by a GetStatus or GetFullStatus command. www.onsemi.com 31 NCV70627 Vbb > UV1 Vbb < UV2 StoppedUnder UV1 Vbb < UV3 Motion Finished and Vbb < UV1 Thermal Shutdown Vbb < UV3 POR RunInit Vbb < UV2 SoftStop HardStop HardStop Thermal Shutdown SoftStop Vbb < UV3 RunInit Motion finished Motion Finished GotoSecPos HardStop Thermal Shutdown ShutDown HardStop SetPosition Motion Finished Stopped HardStop GotoPos GetFullStatus Motion Finished and Vbb > UV1 <Sleep> OR LIN timeout Any LIN command Priorities 1 2 Sleep Vbb < UV2 3 <Sleep> AND (not <SecEn> OR <SecEn> AND ActPos = SecPos OR <Stop>) 4 HardUnder Vbb < UV2 Vbb > UV1 & T < 15 sec ShutUnder T > 15 sec Figure 15. Simplified State Diagram Remark: IF <SleepEn> = 0, then the arrow from stopped state to sleep state does not exist. www.onsemi.com 32 NCV70627 Motordriver Current Waveforms in the Coils Figure 16 below illustrates the current fed to the motor coils by the motor driver in half−step mode. Ix Coil X Iy t Coil Y Figure 16. Current Waveforms in Motor Coils X and Y in Halfstep Mode Whereas Figure 17 below shows the current fed to the coils in 1/16th micro stepping (1 electrical period). Coil X Iy Ix t Coil Y Figure 17. Current Waveforms in Motor Coils X and Y in 1/16th Micro−Step Mode Motor Current Boost Function PWM Regulation Under certain conditions it can happen that the normal motor currents are not sufficiently high enough to achieve the proper torque for bursting out the motor axis (Especially under cold conditions). For this reason the NCV70627 can be forced to boost mode by setting the <I_BOOST_ENB> bit to ‘0’ via the SetMotorParam command. The boost function increases the current as described in the Irun and Ihold tables. It can only be activated if the junction temperature is lower than tlow. When the temperature rises above ttw,, the <I_BOOST_ENB> bit is automatically set back to ‘1’ causing that the current is switched back to the normal current set point values. In order to force a given current (determined by <Irun> or <Ihold> and the current position of the rotor) through the motor coil while ensuring high energy transfer efficiency, a regulation based on PWM principle is used. The regulation loop performs a comparison of the sensed output current to an internal reference, and features a digital regulation generating the PWM signal that drives the output switches. The zoom over one micro−step in the Figure17 above shows how the PWM circuit performs this regulation. To reduce the current ripple, a higher PWM frequency is selectable. The RAM register PWMfreq is used for this. www.onsemi.com 33 NCV70627 Motor Starting Phase Table 24. PWM FREQUENCY SELECTION PWMfreq Applied PWM Frequency 0 22,8 kHz 1 45,6 kHz At motion start, the currents in the coils are directly switched from <Ihold> to <Irun> with a new sine/cosine ratio corresponding to the first half (or micro−) step of the motion. Motor Stopping Phase PWM Jitter At the end of the deceleration phase, the currents are maintained in the coils at their actual DC level (hence keeping the sine/cosine ratio between coils) during the stabilization time tstab (see AC Table). The currents are then set to the hold values, respectively Ihold x sin(TagPos) and Ihold x cos(TagPos), as illustrated below. A new positioning order can then be executed. The stabilization time tstab is programmable via a LIN command. There are 4 values possible that can be set dependant the requirement of the motor application. To lower the power spectrum for the fundamental and higher harmonics of the PWM frequency, jitter can be added to the PWM clock. The RAM register <PWMJEn> is used for this. Table 25. PWM JITTER SELECTION PWMJEn Status 0 Single PWM frequency 1 Added jitter to PWM frequency ly lx t tstab Figure 18. Motor Stopping Phase Electrical Defect on Coils, Detection and Confirmation Motor Shutdown Mode The principle relies on the detection of a voltage drop on at least one transistor of the H−bridge. Then the decision is taken to open the transistors of the defective bridge. This allows the detection the following short circuits: • External coil short circuit • Short between one terminal of the coil and Vbat or Gnd A motor shutdown occurs when: • The chip temperature rises above the thermal shutdown threshold Ttsd (see Thermal Shutdown Mode). • The battery voltage goes below UV2 for longer than 15 seconds (see Under−Voltage Condition and Autarkic Functionality). • Flag <ElDef> = ‘1’, meaning an electrical problem is detected on one or both coils, e.g. a short circuit. One cannot detect an internal short in the motor. Open circuits are detected by 100% PWM duty cycle value during one electrical period with duration, determined by Vmin. A motor shutdown leads to the following: • H−bridges in high impedance mode. • The <TagPos> register is loaded with the <ActPos>, Table 26. ELECTRICAL DEFECT DETECTION Pins except in autarkic states. Fault Mode Yi or Xi Short−circuit to GND Yi or Xi Short−circuit to Vbat Yi or Xi Open Y1 and Y2 Short circuited X1 and X2 Short circuited Xi and Yi Short circuited • The LIN interface remains active, being able to receive orders or send status. The conditions to get out of a motor shutdown mode are: • Reception of a GetStatus or GetFullStatus command AND • The four above causes are no longer detected This leads to H−bridges going in Ihold mode. Hence, the circuit is ready to execute any positioning command. www.onsemi.com 34 NCV70627 This can be illustrated in the following sequence given as an application example. The master can check whether there is a problem or not and decide which application strategy to adopt. Table 27. EXAMPLE OF POSSIBLE SEQUENCE USED TO DETECT AND DETERMINE CAUSE OF MOTOR SHUTDOWN Tj ≥Ttsd or VBB ≤ UV2 (>15s) or <ElDef> = ‘1’ ↓ SetPosition frame ↓ GetFullStatus or GetStatus frame ↓ GetFullStatus or GetStatus frame ↓... − The circuit is driven in motor shutdown mode − The application is not aware of this − The position set− point is updated by the LIN Master − Motor shutdown mode ⇒ no motion − The application is still unaware − The application is aware of a problem − Possible confirmation of the problem − Reset <TSD> or <UV2> or <StepLoss> or <ElDef> by the application − Possible new detection of over temperature or low voltage or electrical problem ⇒ Circuit sets <TW> or <TSD> or <UV2> or <StepLoss> or <ElDef> again at ‘1’ Important: While in shutdown mode, since there is no hold current in the coils, the mechanical load can cause a step loss, which indeed cannot be flagged by the NCV70627. Motion Detection If the LIN communication is lost while in shutdown mode, the circuit enters the sleep mode immediately. Note: The Priority Encoder is describing the management of states and commands. Warning: The application should limit the number of consecutive GetStatus or GetFullStatus commands to try to get the NCV70627 out of shutdown mode when this proves to be unsuccessful, e.g. there is a permanent defect. The reliability of the circuit could be altered since Get(Full)Status attempts to disable the protection of the H−bridges. Motion detection is based on the back emf generated internally in the running motor. When the motor is blocked, e.g. when it hits the end−stop, the velocity and as a result also the generated back emf, is disturbed. The NCV70627 senses the back emf and compares the value with an absolute threshold (AbsThr[3:0]). Instructions for correct use of this level in combination with three additional parameters (<MinSamples>, <FS2StallEn> and <DC100StEn>) are available in a dedicated Application Note “Robust Motion Control with AMIS−3062x Stepper Motor Drivers”. When the motor is blocked and the velocity is zero after the acceleration phase, the back emf is low or zero. When this value is below the Absolute threshold, <Stall> is set. Velocity Vmax Motor speed Vmin t Vbemf VABSTH Back emf t Stall t Figure 19. Triggering of the Stall Flag as Function of the Measured Backemf www.onsemi.com 35 NCV70627 MinSamples By design, the motion will only be detected when the motor is running at the maximum velocity, not during acceleration or deceleration. If the motor is positioning when Stall is detected, an (internal) HardStop of the motor is generated and the <StepLoss> and <Stall> flags are set. These flags can only be reset by sending a GetFullStatus command. If Stall appears during DualPosition then the first phase is cancelled (via internal hardstop) and after timeout Tstab (see AC table) the second phase at Vmin starts. When the <Stall> flag is set, the position controller will generate an internal HardStop. As a consequence also the <Steploss> flag will be set. The position in the internal counter will be copied to the <ActPos> register. All flags can be read out with the GetStatus or GetFullStatus command. <MinSamples[2:0]> is a programmable delay timer. After the zero crossing is detected, the delay counter is started. After the delay time−out (tdelay) the back−emf sample is taken. For more information please refer to the Application Note “Robust Motion Control with AMIS−3062x Stepper Motor Drivers”. Table 29. BACK EMF SAMPLE DELAY TIME Important Remark (limited to motion detection flags / parameters): Using GetFullStatus will read AND clear the following flags: <Steploss>, <Stall> and <AbsStall>. New positioning is possible and the <ActPos> register will be further updated. Using GetStatus will read AND clear ONLY the <Steploss> flag. The <Stall> and <AbsStall> flags are NOT cleared. New positioning is possible and the <ActPos> register will be further updated. Motion detection is disabled when the RAM registers <AbsThr[3:0]> is zero. The level can be programmed using the LIN command SetStallParam in the register <AbsThr[3:0]>. Also the OTP register <AbsThr[3:0]> can be set using the LIN command SetOTPParam. These values are copied in the RAM registers during power on reset. Index MinSamples[2:0] tDELAY (ms) 0 000 87 1 001 130 2 010 174 3 011 217 4 100 304 5 101 391 6 110 521 7 111 694 FS2StallEn If <AbsThr> <> 0 (i.e. motion detection is enabled), then stall detection will be activated AFTER the acceleration ramp + an additional number of full−steps, according to the following table: Table 30. ACTIVATION DELAY OF MOTION DETECTION Table 28. ABSOLUTE THRESHOLD SETTINGS Index FS2StallEn[2:0] Delay (Full Steps) 0 000 0 1 001 1 2 010 2 3 011 3 AbsThr Index AbsThr Level (V) (*) 4 100 4 0 Disabled 5 101 5 1 0.64 6 110 6 2 1.28 7 111 7 3 1.92 4 2.56 DC100StEn 5 3.19 6 3.83 7 4.47 8 5.11 When a motor with large bemf is operated at high speed and low supply voltage, then the PWM duty cycle can be as high as 100%. This indicates that the supply is too low to generate the required torque and might also result in erroneously triggering the stall detection. The bit <DC100StEn> enables stall detection when duty cycle is 100%. For more information please refer to the Application Note “Robust Motion Control with AMIS−3062x Stepper Motor Drivers”. NOTE: 9 5.75 A 6.38 B 7.03 C 7.67 D 8.30 E 8.94 F 9.58 (*) Not tested in production. Values are typical levels with spread of 0,48V. www.onsemi.com 36 NCV70627 Lin Controller General Description The analog circuitry implements a low side driver with a pull−up resistor as a transmitter, and a resistive divider with a comparator as a receiver. The specification of the line driver/receiver follows the ISO 9141 standard with some enhancements regarding the EMI behavior. The LIN (local interconnect network) is a serial communications protocol that efficiently supports the control of mechatronics nodes in distributed automotive applications. The physical interface implemented in the NCV70627 is compliant to the LIN rev. 2.0 & 2.1 specifications. It features a slave node, thus allowing for: • single−master / multiple−slave communication • self synchronization without quartz or ceramics resonator in the slave nodes • guaranteed latency times for signal transmission • single−signal−wire communication • transmission speed selectable between 9.6 and 19.2 kbit/s • selectable length of Message Frame: 2, 4, and 8 bytes • configuration flexibility • data checksum (classic checksum, cf. LIN1.3) security and error detection • detection of defective nodes in the network It includes the analog physical layer and the digital protocol handler. Slave Operational Range for Proper Self Synchronization The LIN interface will synchronize properly in the following conditions: • Vbat ≥ 8 V • Ground shift between master node and slave node < ±1V It is highly recommended to use the same type of reverse battery voltage protection diode for the Master and the Slave nodes. Functional Description Analog Part The transmitter is a low−side driver with a pull−up resistor and slope control. The receiver mainly consists of a comparator with a threshold equal to VBB/2. Figure 4 shows the characteristics of the transmitted and received signal. See AC Parameters for timing values. VBB Protocol Handler This block implements: • Bit synchronization • Bit timing • The MAC layer • The LLC layer • The supervisor 30 kW RxD to control block LIN protocol handler Filter TxD LIN Slope Control Error Status Register LIN address The LIN interface implements a register containing an error status of the LIN communication. This register is as follows: HW0 from OTP HW1 HW2 Figure 20. LIN Interface Table 31. LIN ERROR REGISTER Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Not used Not used Not used Not used Time out error Data error Flag Header error Flag Bit error Flag With: Data error flag: (= Checksum error + StopBit error + Length error) Header error flag: (= Parity error + SynchField error) Time out flag: The message frame is not fully completed within the maximum length Bit error flag: Difference in bit sent and bit monitored on the LIN bus A GetFullStatus frame will reset the error status register. www.onsemi.com 37 NCV70627 Physical Address of the Circuit limit the number of nodes in a LIN network to not exceed 16. Otherwise the reduced network impedance may prohibit a fault free communication under worst case conditions. Every additional node lowers the network impedance by approximately 3%. The node address is a combination of 4 OTP memory bits and 3 hardwired address bits (pins HW[2:0]). Depending on the Addressing Mode (ADM–bit in OTP) the bits of the address are combined as illustrated below. The circuit must be provided with a physical address in order to discriminate this circuit from other ones on the LIN bus. This address is coded on 7 bits, yielding the theoretical possibility of 128 different circuits on the same bus. It is a combination of 4 OTP memory bits and of the 3 hardwired address bits (pins HW[2:0]). However the maximum number of nodes in a LIN network is also limited by the physical properties of the bus line. It is recommended to MSB <ADM> = 0 LSB HW0 HW1 PA3 HW2 PA2 PA1 OTP memory Hardwired MSB <ADM> = 1 PA0 LSB HW0 PA0 OTP memory HW2 HW1 PA3 PA2 PA1 OTP memory Hardwired Figure 21. Combination of OTP and Hardwired Address Bits in Function of ADM (Address Mode) NOTE: Pins HW0 and HW1 are 3.3V digital inputs, whereas pin HW2 is compliant with a 12V level, e.g. it can be connected to Vbat or Gnd via a terminal of the PCB. For SetPositionShort it is recommended to set HW0, HW1 and HW2 to ’1’. LIN Frames Whereas reading frames will be used to: • Get the actual position of the stepper−motor; • Get status information such as error flags; • Verify the right programming and configuration of the component. The LIN frames can be divided in writing and reading frames. A frame is composed of an 8−bit Identifier followed by 2, 4 or 8 data−bytes and a checksum byte. Note: The checksum is conform LIN1.3, classic checksum calculation over only data bytes. (Checksum is an inverted 8−bit sum with carry over all data bytes.) Writing frames will be used to: • Program the OTP Memory; • Configure the component with the stepper−motor parameters (current, speed, stepping−mode, etc.); • Provide set−point position for the stepper−motor; • Control the motion state machine. Identifier Byte ID0 ID1 ID2 ID3 ID4 ID5 Writing Frames The LIN master sends commands and/or information to the slave nodes by means of a writing frame. According to the LIN specification, identifiers are to be used to determine a specific action. If a physical addressing is needed, then some bits of the data field can be dedicated to this, as illustrated in the example below. Data Byte 1 ID6 Data Byte 2 ID7 phys. address command parameters (e.g. position) <ID6> and <ID7> are used for parity check over <ID0> to <ID5>, conform LIN1.3 specification. <ID6> = <ID0> ⊗ <ID1> ⊗ <ID2> ⊗ <ID4> (even parity) and <ID7> = NOT(<ID1> ⊗ <ID3> ⊗ <ID4> ⊗ <ID5>) (odd parity). www.onsemi.com 38 NCV70627 Another possibility is to determine the specific action within the data field in order to use less identifiers. One can for example use the reserved identifier 0x3C and take ID 0x3C Data Byte 1 00 Data Byte 3 command physical address Data Byte 4 Data Byte 5 Data Byte 7 Data Byte 8 parameters Bit 7 of Data byte 1 must be at ‘1’ since the LIN specification requires that contents from 0x00 to 0x7F must be reserved for broadcast messages (0x00 being for the “Sleep” message). See also LIN command Sleep The writing frames used with the NCV70627 are the following: Type #1: General purpose 2 or 4 data bytes writing frame with a dynamically assigned identifier. This type is dedicated to short writing actions when the bus load can be an issue. They are used to provide direct command to one (<Broad> = ‘1’) or all the slave nodes (<Broad> = ‘0’). If <Broad> = ‘1’, the ID ID0 Data Byte 6 1 AppCmd NOTE: Data Byte 2 advantage of the 8 byte data field to provide a physical address, a command and the needed parameters for the action, as illustrated in the example below. ID1 NOTE: ID2 ID3 ID4 physical address of the slave node is provided by the 7 remaining bits of DATA2. DATA1 will contain the command code (see Dynamic assignment of Identifiers), while, if present, DATA3 to DATA4 will contain the command parameters, as shown below. Data1 ID5 ID6 ID7 Data2 command Physical address Data3... Broad Parameters... <ID4> and <ID5> indicate the number of data bytes. ID5 ID4 Ndata (number of data fields) 0 0 2 0 1 2 1 0 4 1 1 8 specific command. This ID provides the fastest access to a read command but is forbidden for any other action. • Indirect ID, which only specifies a reading command, the physical address of the slave node that must answer having been passed in a previous writing frame, called a preparing frame. Indirect ID gives more flexibility than a direct one, but provides a slower access to a read command. 1. A reading frame with indirect ID must always be consecutive to a preparing frame. It will otherwise not be taken into account. 2. A reading frame will always return the physical address of the answering slave node in order to ensure robustness in the communication. The reading frames, used with the NCV70627, are the following: Type #5: two, four or eight Data bytes reading frame with a direct identifier dynamically assigned to a particular slave node together with an application command. A preparing frame is not needed. Type #6: eight Data bytes reading frame with 0x3D identifier. This is intrinsically an indirect type, needing therefore a preparation frame. It has the advantage to use a reserved identifier. (Note: because of the parity calculation done by the master, the identifier becomes 0x7D as physical data over the bus). Type #2: two, four or eight data bytes writing frame with an identifier dynamically assigned to an application command, regardless of the physical address of the circuit. Type #3: two data bytes writing frame with an identifier dynamically assigned to a particular slave node together with an application command. This type of frame requires that there are as many dynamically assigned identifiers as there are NCV70627 circuits using this command connected to the LIN bus. Type #4: eight data bytes writing frame with 0x3C identifier. Reading Frames A reading frame uses an in−frame response mechanism. That is: the master initiates the frame (synchronization field + identifier field), and one slave sends back the data field together with the check field. Hence, two types of identifiers can be used for a reading frame: • Direct ID, which points at a particular slave node, indicating at the same time which kind of information is awaited from this slave node, thus triggering a www.onsemi.com 39 NCV70627 Preparing Frames reading frame and will also contain a command indicating which kind of information is awaited from the slave. The preparing frames used with the NCV70627 can be of type #7 or type #8 described below. A preparing frame is a frame from the master that warns a particular slave node that it will have to answer in the next frame (being a reading frame). A preparing frame is needed when a reading frame does not use a dynamically assigned direct ID. Preparing and reading frames must be consecutive. A preparing frame will contain the physical address of the LIN slave node that must answer in the Type #7: two data bytes writing frame with dynamically assigned identifier. The identifier of the preparing frame has to be assigned to ROM pointer 1000, see Table 35. Table 32. PREPARING FRAME #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data Where: (*) According to parity computation Type #8: eight data bytes preparing frame with 0x3C identifier. Table 33. PREPARING FRAME #8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] 3 Data 3 1 AD[6:0] 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data AppCMD = ... Where: AppCMD: If = ‘0x80’ this indicates that Data 2 contains an application command CMD[6:0]: Application Command “byte” AD[6:0]: Slave node physical address Data[7:0]: Data transmitted www.onsemi.com 40 NCV70627 Dynamic Assignment of Identifiers frame with identifier 0x3C issued by the LIN master will write dynamic identifiers into the RAM. One writing frame is able to assign 4 identifiers; therefore 3 frames are needed to assign all identifiers. Each ROM pointer <ROMp_x [3:0]> place the corresponding dynamic identifier <Dyn_ID_x [5:0]> at the correct place in the RAM (see Table below: LIN – Dynamic Identifiers Writing Frame). When setting <Broad> to zero broadcasting is active and each slave on the LIN bus will store the same dynamic identifiers, otherwise only the slave with the corresponding slave address is programmed. The identifier field in the LIN datagram denotes the content of the message. Six identifier bits and two parity bits are used to represent the content. The identifiers 0x3C and 0x3F are reserved for command frames and extended frames. Slave nodes need to be very flexible to adapt itself to a given LIN network in order to avoid conflicts with slave nodes from different manufacturers. Dynamic assignment of the identifiers will fulfill this requirement by writing identifiers into the circuits RAM. ROM pointers are linking commands and dynamic identifiers together. A writing Table 34. DYNAMIC IDENTIFIERS WRITING FRAME Structure Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Byte Content 0 Identifier 0x3C 1 AppCMD 0x80 2 CMD 1 3 Address Broad 4 Data 5 Data 6 Data 7 Data 8 Data 9 Checksum Bit 2 Bit 1 Bit 0 AD2 AD1 AD0 0x11 AD6 AD5 AD4 AD3 DynID_1[3:0] ROMp_1[3:0] DynID_2[1:0] ROMp_2[3:0] DynID_1[5:4] ROMp_3[3:0] DynID_2[5:2] ROMp_4[1:0] DynID_3[5:0] DynID_4[5:0] ROMp_4[3:2] Checksum over data Where: CMD[6:0]: 0x11, corresponding to dynamic assignment of four LIN identifiers Broad: If <Broad> = ‘0’ all the circuits connected to the LIN bus will share the same dynamically assigned identifiers. Dyn_ID_x [5:0]: Dynamically assigned LIN identifier to the application command which ROM pointer is <ROMp_x [3:0]> One frame allows only assigning of four identifiers. Therefore, additional frames could be needed in order to assign more identifiers (maximum three for the NCV70627). www.onsemi.com 41 NCV70627 Dynamic ID ROM pointer Application Command User Defined 0010 GetActualPos User Defined 0011 GetStatus User Defined 0100 SetPosition User Defined 0101 SetPositionShort (1 m) User Defined 0110 SetPositionShort (2 m) User Defined 0111 SetPositionShort (4 m) User Defined 0000 GeneralPurpose 2 bytes User Defined 0001 GeneralPurpose 4 bytes User Defined 1000 Preparation Frame Command assignment via Dynamic ID during operation Figure 22. Principle of Dynamic Command Assignment Commands Table Table 35. LIN COMMANDS WITH CORRESPONDING ROM POINTER Command Mnemonic Command Byte (CMD) Dynamic ID (example) ROM Pointer 0010 GetActualPos 000000 0x00 100xxx GetFullStatus 000001 0x01 n.a. GetOTPparam 000010 0x02 n.a. GetStatus 000011 0x03 000xxx GotoSecurePosition 000100 0x04 n.a. HardStop 000101 0x05 n.a. ResetPosition 000110 0x06 n.a. SetDualPosition 001000 0x08 n.a. SetMotorParam 001001 0x09 n.a. SetOTPparam 010000 0x10 n.a. SetStallParam 010110 0x16 n.a. SetPosition (16−bit) 001011 0x0B 10xxxx 0100 SetPositionShort (1 motor) 001100 0x0C 001001 0101 SetPositionShort (2 motors) 001101 0x0D 101001 0110 SetPositionShort (4 motors) 001110 0x0E 111001 0111 SetPosParam 101111 0x2F 110xxx 1001 n.a. Sleep 0011 n.a. SoftStop 001111 0x0F n.a. Dynamic ID assignment 010001 0x11 n.a. General purpose 2 Data bytes 011000 0000 General purpose 4 Data bytes 101000 0001 Preparing frame 011010 1000 NOTE: “xxx” allows addressing physically a slave node. Therefore, these dynamic identifiers cannot be used for more than eight stepper motors. Only ten ROM pointers are needed for the NCV70627. www.onsemi.com 42 NCV70627 LIN Lost Behavior Introduction LIN Lost During Normal Operation When the LIN communication is broken for a duration of 25000 consecutive frames (= 1,30s @ 19200 kbit/s) NCV70627 sets an internal flag called “LIN lost”. The functional behavior depends on the state of OTP bits <SleepEn> and <FailSafe>, and if this loss in LIN communication occurred at (or before) power on reset or in normal powered operation. If the LIN communication is lost during normal operation, it is assumed that NCV70627 is referenced (by Dual postioning or Resetposition). In other words the <ActPos> register contains the “real” actual position. At LIN – lost an absolute positioning to the stored secure position SecPos is done. This is further called Secure Positioning. If OTP bit <FailSafe> = 1, the reaction is the following: If the device has already been referenced, it is assumed that <ActPos> register contains the “real” actual position. At LIN – lost an absolute positioning to the stored secure position SecPos is done (identical to the case, when OTP bit <FailSafe> = 0). If the device was not referenced yet, the <ActPos> register does not contain a valid position. At LIN – lost a referencing is started using DualPositioning. A first negative motion of half the positioner range is initiated until the stall position is reached. The motion parameters stored in OTP will be used for this. After this mechanical end−position is reached, <ActPos> will be reset to zero. A second motion of 10 Fullsteps is executed to assure that the motion is really at the end position. After the second motion, a third motion is executed to the Secure Position also stored in OTP; if <SecPos> = 0x400, this second motion is not executed. Following sequence will be followed. See Figure 22. 1. <SecPos[10:0]> from RAM register will be used. This can be different from OTP register if earlier LIN master communication has updated this. See also Secure Position and command SetMotorParam. I. If <SecPos[10:0]> = 0x400: No Secure Positioning will be performed II. If <SecPos[10:0]> ≠ 0x400: Perform a Secure Positioning. This is an absolute positioning (slave knows its ActPos. <SecPos[10:0]> will be copied in <TagPos>) Depending on <Sleep> NCV70627 will enter the <Stopped> state or the <Sleep> state. See Table 36. Sleep Enable The OTP bit <SleepEn> enables or disables the entering in low−power sleep mode in case of LIN time−out. Default the entering of the sleep−mode is disabled. Table 36. SLEEP ENABLE SELECTION <SleepEn> Behavior 0 Entering low−power sleep mode is disabled except from <Standby> and <Shutdown> 1 Entering low−power sleep mode enabled Fail Safe Motion The OTP bit <FailSafe> enables or disables an automatic motion to a predefined secure position. See also Autonomous Motion. Table 37. FAIL SAFE ENABLE SELECTION <FailSafe> Behavior 0 NO reference motion in case of LIN – lost 1 ENABLES reference motion to a secure position in case of LIN–lost (if the device has not been yet referenced with SetDualPosition) NCV70627 is able to perform an Autonomous Motion to a preferred position. This positioning starts after the detection of lost LIN communication and depends on: − the OTP bit <FailSafe> = 1. − RAM register <SecPos[10:0]> ≠ 0x400 The functional behavior depends if LIN communication is lost during normal operation (see figure below case A) or at (or before) startup (case B): Power Up Important Remarks: 1. The Secure Position has a resolution of 11 bit (2Fs resolution on positions). 2. Same behavior in case of HW2 float (= lost LIN address), except for entering Sleep mode. If HW2 is floating, but there is LIN communication, Sleep mode is not entered. See also Hardwired Address HW2 OTP content is copied in RAM No B LIN Bus OK Yes A Figure 23. Flow Chart Power−Up of NCV70627 (Case A: LIN lost during operation and Case B: LIN lost at startup) www.onsemi.com 43 NCV70627 A Normal Operation GetFullStatus SetMotorParam (RAM content is overwritten) Yes LIN bus OK No FailSafe = 1 No Yes Reference done? Yes No First motion of DualPosition Half the position range Negative direction At Stall −> ActPos = ‘0000’ No SecPos ≠ 0x400 Yes STOP Secure Positioning to SecPos stored in RAM SleepEn = 1 No Yes SLEEP STOP Figure 24. Case A: LIN Lost During Normal Operation www.onsemi.com 44 NCV70627 LIN Lost Before or At Power On If LIN is lost before or at power on, following sequence will be followed. See Figure 23. 1. If the LIN communication is lost AND <FailSafe> = 0, secure positioning will be done at absolute position (stored secure position <SecPos>.) Depending on SleepEn NCV70627 will enter the <Stop> state or <Sleep> state. See Table 36. 2. If the LIN communication is lost AND <FailSafe> = 1 a referencing is started using DualPositioning, meaning a negative motion for half the positioner range is initiated until the stall position is reached. The motion parameters stored in OTP will be used for this. After this mechanical end position is reached <ActPos> will be reset to zero. The direction of the motion is given by the Shaft bit. −If <SecPos[10:0]> = 0x400: No Second Motion will be performed. If the LIN communication is lost before or at power on, the <ActPos> register does not reflect the “real” actual position. So at LIN − lost a referencing is started using DualPositioning. A first negative motion for half the positioner range is initiated until the stall position is reached. The motion parameters stored in OTP will be used for this. After this mechanical end position is reached, <ActPos> will be reset to zero. A second motion will start to the Secure Position also stored in OTP. More details are given below. B FailSafe = 1 No Yes First motion of DualPosition Half the position range Negative direction At Stall −> ActPos = ‘0000’ No SecPos ≠ 0x400 Yes STOP Secure Positioning to SecPos stored in RAM, copied from OTP SleepEn = 1 No Yes SLEEP STOP Figure 25. Case B: LIN Lost at or During Sart−Up www.onsemi.com 45 NCV70627 LIN Application Commands Introduction The LIN Master will have to use commands to manage the different application tasks the NCV70627 can feature. The commands summary is given in Table 38 below. Table 38. COMMANDS SUMMARY Command Frames Mnemonic Code Prep # Read # Write # GetActualPos 0x00 7, 8 5, 6 Returns the actual position of the motor GetFullStatus 0x01 7, 8 6 Returns a complete status of the circuit GetOTPparam 0x02 7, 8 6 Returns the OTP memory content GetStatus 0x03 5 Returns a short status of the circuit Description READING COMMAND WRITING COMMANDS GotoSecurePosition 0x04 1 Drives the motor to its secure position HardStop 0x05 1 Immediate motor stop ResetPosition 0x06 1 Actual position becomes the zero position SetDualPosition 0x08 4 Drives the motor to 2 different positions with different speeds SetMotorParam 0x09 4 Programs the motion parameters and values for the current in the motor’s coils SetOTPparam 0x10 4 Programs (and zaps) a selected byte of the OTP memory SetStallparam 0x16 4 Programs the motion detection parameters SetPosition 0x0B 1, 3, 4 Drives the motor to a given position SetPositionShort (1 m.) 0x0C 2 Drives the motor to a given position (11 bits 1/2step resolution) SetPositionShort (2 m.) 0x0D 2 Drives two motors to 2 given positions (11 bits 1/2step resolution) SetPositionShort (4 m.) 0x0E 2 Drives four motors to 4 given positions (11 bits 1/2step resolution) SetPosParam 0x2F 2 Drives the motor to a given position and programs some of the motion parameters. 1 Drives circuit into sleep mode if <SleepEn> = 1 Drives circuit into stopped mode if if <SleepEn> = 0 1 Motor stopping with a deceleration phase SERVICE COMMANDS Sleep 0x0F SoftStop These commands are described hereafter, with their corresponding LIN frames. Refer to LIN Frames for more details on LIN frames, particularly for what concerns dynamic assignment of identifiers. A color coding is used to distinguish between master and slave parts within the frames and to highlight dynamic identifiers. An example is shown below. Table 39. COLOR CODE USED IN THE DEFINITION OF LIN FRAMES GetStatus Reading Frame Byte Content Structure Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 * 0 ID4 ID3 ID2 ID1 ID0 0 Identifier * 1 Data 1 ESW 2 Data 2 VddReset AD[6:0] StepLoss ElDef UV www.onsemi.com 46 TSD TW Tinfo[1:0] NCV70627 Application Commands The Identifier is always sent by the LIN master. Convention: The Identifier and Data sent by the master are in gray presented. The Data sent by the slave is in white presented. Usually, the NCV70627 makes use of dynamic identifiers for general−purpose 2, 4 or 8 bytes writing frames. If dynamic identifiers are used for other purposes, this is acknowledged. Some frames implement a <Broad> bit that allows addressing a command to all the NCV70627 circuits connected to the same LIN bus. <Broad> is active when at ‘0’, in which case the physical address provided in the frame is thus not taken into account by the slave nodes. GetActualPos This command is provided to the circuit by the LIN master to get the actual position of the stepper−motor. This position (<ActPos[15:0]>) is returned in signed two’s complement 16−bit format. One should note that according to the programmed stepping mode, the LSB’s of <ActPos[15:0]> may have no meaning and should be assumed to be ‘0’, as prescribed in Position Ranges. GetActualPos also provides a quick status of the circuit and the stepper−motor, identical to that obtained by command GetStatus (see further). Note: A GetActualPos command will not attempt to reset any flag. GetActualPos corresponds to the following LIN reading frames. 1. four data bytes in−frame response with direct ID (type #5) Table 40. READING FRAME TYPE #5 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 0 ID3 ID2 ID1 ID0 1 Data 1 ESW 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 5 Checksum VddReset AD[6:0] StepLoss ElDef UV TSD TW Tinfo[1:0] Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this GetActualPos command as there are stepper−motors connected to the LIN bus. Note: Bit 5 and bit 4 in byte 0 indicate the number of data bytes. 2. The master sends either a type#7 or type#8 preparing frame. After the type#7 or #8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 41. GetActualPos PREPARING FRAME TYPE #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x00 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data www.onsemi.com 47 NCV70627 Table 42. GetActualPos PREPARING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 ESW 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 5 Data 5 6 Data 6 0xFF 7 Data 7 0xFF VddReset AD[6:0] StepLoss ElDef UV TSD TW 1 UV2 UV3 LIN_E Device ID Code 8 Data 8 0xFF 9 Checksum Checksum over data Tinfo[1:0] Where: (*) According to parity computation Table 43. GetActualPos PREPARING FRAME TYPE #8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x00 3 Data 3 1 AD[6:0] 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data AppCMD =80 Table 44. GetActualPos READING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 ESW 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 TSD TW 5 Data 5 1 UV2 6 Data 6 0xFF 7 Data 7 0xFF 8 Data 8 0xFF 9 Checksum Checksum over data VddReset AD[6:0] StepLoss ElDef UV Device ID Code www.onsemi.com 48 Tinfo[1:0] UV3 LIN_E NCV70627 GetFullStatus The master sends either type#7 or type#8 preparing frame. GetFullStatus corresponds to 2 successive LIN in−frame responses with 0x3D indirect ID. Note: It is not mandatory for the LIN master to initiate the second in−frame response if the data in the second response frame is not needed by the application. 1. The master sends a type #7 preparing frame. After the type#7 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. This command is provided to the circuit by the LIN master to get a complete status of the circuit and the stepper−motor. Refer to RAM Registers and Flags Table to see the meaning of the parameters sent to the LIN master. Note: A GetFullStatus command will attempt to reset flags<TW>,<TSD>,<UV2>,<UV3>,<UV>,<<ElDef>, <StepLoss>, <OVC1>, <OVC2>, <VddReset>, <Stall> and <AbsStall>. Table 45. GetFullStatus PREPARING FRAME TYPE #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x01 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data Table 46. GetFullStatus READING FRAME TYPE #6 (1) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 1 2 Data 2 Irun[3:0] Ihold[3:0] 3 Data 3 Vmax[3:0] Vmin[3:0] 4 Data 4 AccShape 5 Data 5 VddReset 6 Data 6 7 Data 7 8 Data 8 9 Checksum AD[6:0] StepMode[1:0] StepLoss Shaft ElDef Motion[2:0] PWMFreq I_BOOST_ENB Tstab[1] Acc[3:0] UV TSD TW ESW OVC1 OVC2 Tstab[0] TimeE DataE AbsThr[3:0] UV2 Tinfo[1:0] Stall 0 HeadE BitE UV3Thr[2:0] Checksum over data Table 47. GetFullStatus READING FRAME TYPE #6 (2) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 1 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 TagPos[15:8] 5 Data 5 TagPos[7:0] 6 Data 6 SecPos[7:0] 7 Data 7 8 Data 8 9 Checksum AD[6:0] FS2StallEn[2:0] AbsStall 0 1 0 DC100 MinSamples[2:0] SecPos[10:8] DC100StEn PWMJEn Checksum over data Where: (*) According to parity computation 2. The master sends a type #8 preparing frame. After the type#8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. www.onsemi.com 49 NCV70627 Table 48. GetFullStatus PREPARING FRAME TYPE#8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x01 3 Data 3 1 AD[6:0] 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF AppCMD =80 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data Table 49. GetFullStatus READING FRAME TYPE #6 (1) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 1 2 Data 2 Irun[3:0] Ihold[3:0] 3 Data 3 Vmax[3:0] Vmin[3:0] 4 Data 4 AccShape 5 Data 5 VddReset 6 Data 6 7 Data 7 8 Data 8 6 Checksum AD[6:0] StepMode[1:0] StepLoss Shaft ElDef TSD TW ESW OVC1 OVC2 Stall 0 Tstab[0] TimeE DataE HeadE BitE Motion[2:0] PWMFreq I_BOOST_ENB Tstab[1] Acc[3:0] UV AbsThr[3:0] UV2 Tinfo[1:0] UV3Thr[2:0] Checksum over data Table 50. GetFullStatus READING FRAME TYPE #6 (2) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 Data 1 1 1 1 1 0 1 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 TagPos[15:8] 5 Data 5 TagPos[7:0] 6 Data 6 7 Data 7 8 Data 8 9 Checksum AD[6:0] SecPos[7:0] FS2StallEn[2:0] AbsStall 0 1 0 DC100 MinSamples[2:0] Checksum over data www.onsemi.com 50 SecPos[10:8] DC100StEn PWMJEn NCV70627 GetOTPparam This command is provided to the circuit by the LIN master after a preparing frame (see Preparing frames), to read the content of an OTP memory segment which address was specified in the preparation frame. GetOTPparam corresponds to a LIN in−frame response with 0x3D indirect ID. 1. The master sends a type #7 preparing frame. After the type#7 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 51. GetOTPparam PREPARING FRAME TYPE #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x02 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data Table 52. GetOTPparam READING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 OTP byte @0x00 2 Data 2 OTP byte @0x01 3 Data 3 OTP byte @0x02 4 Data 4 OTP byte @0x03 5 Data 5 OTP byte @0x04 6 Data 6 If SecPosA = 0 OTP byte @0x05, else OTP byte @0x08 7 Data 7 If SecPosA = 0 OTP byte @0x06, else OTP byte @0x09 8 Data 8 OTP byte @0x07 9 Checksum Checksum over data Where: (*) According to parity computation 2. The master sends a type #8 preparing frame. After the type#8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 53. GetOTPparam PREPARING FRAME TYPE #8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x02 3 Data 3 1 AD[6:0] 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data AppCMD =80 www.onsemi.com 51 NCV70627 Table 54. GetOTPparam READING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 OTP byte @0x00 2 Data 2 OTP byte @0x01 3 Data 3 OTP byte @0x02 4 Data 4 OTP byte @0x03 5 Data 5 OTP byte @0x04 6 Data 6 If SecPosA = 0 OTP byte @0x05, else OTP byte @0x08 7 Data 7 If SecPosA = 0 OTP byte @0x06, else OTP byte @0x09 8 Data 8 OTP byte @0x07 9 Checksum Checksum over data GetStatus This command is provided to the circuit by the LIN master to get a quick status (compared to that of GetFullStatus command) of the circuit and of the stepper−motor. Refer to Flags Table to see the meaning of the parameters sent to the LIN master. Note: A GetStatus command will attempt to reset flags <TW>, <TSD>, <UV>, <ElDef>, <StepLoss> and <VddReset>. If there is only an open coil detected the < ElDef > flag will be cleared after the GetStatus command. If <ElDef> is set due to a short on one of the coils, the <Eldef> can only be cleared via a GetFullStatus command. GetStatus corresponds to a 2 data bytes LIN in−frame response with a direct ID (type #5). Table 55. GetStatus READING FRAME TYPE #5 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 ESW 2 Data 2 VddReset 3 Checksum AD[6:0] StepLoss ElDef UV TSD TW Tinfo[1:0] Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this GetStatus command as there are stepper−motors connected to the LIN bus. GotoSecurePosition This command is provided by the LIN master to one or all of the stepper−motors to move to the secure position <SecPos[10:0]>. It can also be internally triggered if the LIN bus communication is lost, after an initialization phase, or prior to going into sleep mode. See the priority encoder description for more details. The priority encoder table also acknowledges the cases where a GotoSecurePosition command will be ignored. Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. www.onsemi.com 52 NCV70627 GotoSecurePosition corresponds to the following LIN writing frame (type #1). Table 56. GotoSecurePosition WRITING FRAME TYPE #1 Structure Bit 7 Bit 6 Bit 5 Bit 4 Identifier * * 0 ID4 Data 1 CMD[6:0] = 0x04 2 Data Broad AD[6:0] 3 Checksum Byte Content 0 1 Bit 3 Bit 2 Bit 1 Bit 0 ID3 ID2 ID1 ID0 Checksum over data Where: (*) according to parity computation Broad: If Broad = ‘0’ all the stepper motors connected to the LIN bus will reach their secure position HardStop This command will be internally triggered when an electrical problem is detected in one or both coils, leading to shutdown mode. If this occurs while the motor is moving, the <StepLoss> flag is raised to allow warning of the LIN master at the next GetStatus command that steps may have been lost. Once the motor is stopped, <ActPos> register is copied into <TagPos> register to ensure keeping the stop position. Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. A hardstop command can also be issued by the LIN master for some safety reasons. It corresponds then to the following two data bytes LIN writing frame (type #1). Table 57. HardStop WRITING FRAME TYPE #1 Structure Bit 7 Bit 6 Bit 5 Bit 4 Identifier * * ID5 ID4 Data 1 CMD[6:0] = 0x05 2 Data Broad AD[6:0] 3 Checksum Byte Content 0 1 Bit 3 Bit 2 Bit 1 Bit 0 ID3 ID2 ID1 ID0 Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all stepper motors connected to the LIN bus will stop ResetPosition This command is provided to the circuit by the LIN master to reset <ActPos> and <TagPos> registers to zero. This can be helpful to prepare for instance a relative positioning. The reset position command sets the internal flag “Reference done”. Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. ResetPosition corresponds to the following LIN writing frames (type #1). Table 58. ResetPosition WRITING FRAME TYPE #1 Structure Bit 7 Bit 6 Bit 5 Bit 4 Identifier * * ID5 ID4 Data 1 CMD[6:0] = 0x06 2 Data Broad AD[6:0] 3 Checksum Byte Content 0 1 Bit 3 Bit 2 Bit 1 Bit 0 ID3 ID2 ID1 ID0 Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the circuits connected to the LIN bus will reset their <ActPos> and <TagPos> registers www.onsemi.com 53 NCV70627 SetDualPosition This command is provided to the circuit by the LIN master in order to perform a positioning of the motor using two different velocities. See Dual Positioning. After Dual positioning the internal flag “Reference done” is set. Note: This sequence cannot be interrupted by another positioning command. SetDualPosition corresponds to the following LIN writing frame with 0x3C identifier (type #4). Table 59. SetDualPositioning WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x08 3 Data 3 Broad AD[6:0] 4 Data 4 5 Data 5 Pos1[15:8] 6 Data 6 Pos1[7:0] 7 Data 7 Pos2[15:8] 8 Data 8 Pos2[7:0] 9 Checksum Checksum over data AppCMD = 0x80 Vmax[3:0] Vmin[3:0] Where: Broad: If broad = ‘0’ all the circuits connected to the LIN bus will run the dual positioning Vmax[3:0]: Max velocity for first motion Vmin[3:0]: Min velocity for first motion and velocity for the second motion Pos1[15:0]: First position to be reached during the first motion Pos2[15:0]: Relative position of the second motion SetStallParam This command sets the motion detection parameters and the related stepper−motor parameters, such as the minimum and maximum velocity, the run and hold current, acceleration and step mode. See Motion detection for the meaning of the parameters sent by the LIN Master. SetStallParam corresponds to a 0x3C LIN command (type #4). Table 60. SetStallParam WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x16 3 Data 3 Broad AD[6:0] 4 Data 4 Irun[3:0] Ihold[3:0] 5 Data 5 Vmax[3:0] Vmin[3:0] 6 Data 6 7 Data 7 8 Data 8 9 Checksum AppCMD = 0x80 MinSamples[2:0] Shaft AbsThr[3:0] FS2StallEn[2:0] Acc[3:0] 0 AccShape StepMode[1:0] UV3Thr[2:0] DC100StEn PWMJEn Checksum over data Where: Broad: If Broad = ‘0’ all the circuits connected to the LIN bus will set the parameters in their RAMs as requested www.onsemi.com 54 NCV70627 SetMotorParam Important: If a SetMotorParam occurs while a motion is ongoing, it will modify at once the motion parameters (see Position Controller). Therefore the application should not change other parameters than <Vmax> and <Vmin> while a motion is running, otherwise correct positioning cannot be guaranteed. This command is provided to the circuit by the LIN master to set the values for the stepper motor parameters (listed below) in RAM. Refer to RAM Registers to see the meaning of the parameters sent by the LIN master. SetMotorParam corresponds to the following LIN writing frame with 0x3C identifier (type #4). Table 61. SetMotorParam WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x09 3 Data 3 Broad AD[6:0] 4 Data 4 Irun[3:0] Ihold[3:0] 5 Data 5 Vmax[3:0] Vmin[3:0] 6 Data 6 7 Data 7 8 Data 8 9 Checksum AppCMD = 0x80 SecPos[10:8] Shaft Acc[3:0] SecPos[7:0] TStab[1] PWMfreq TStab[0] AccShape StepMode[1:0] I_BOOST_ENB PWMJEn Checksum over data Where: Broad: If Broad = ‘0’ all the circuits connected to the LIN bus will set the parameters in their RAMs as requested SetOTPparam Important: This command must be sent under a specific VBB voltage value. See parameter VBBOTP in DC Parameters. This is a mandatory condition to ensure reliable zapping. This command is provided to the circuit by the LIN master to program the content D[7:0] of the OTP memory byte OTPA[3]#, OTPA[2:0] and to zap it. SetOTPparam corresponds to a 0x3C LIN writing frames (type #4). Table 62. SetOTPparam WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 3 Data 3 Broad 4 Data 4 1 5 Data 5 D[7:0] 6 Data 6 0xFF 7 Data 7 0xFF 8 Data 8 0xFF 9 Checksum Checksum over data AppCMD = 0x80 CMD[6:0] = 0x10 AD[6:0] 1 1 1 OTPA[3]# OTPA[2:0] Where: Broad: If Broad = ‘0’ all the circuits connected to the LIN bus will set the parameters in their OTP memories as requested NOTE: OTPA[3]# is inverted bit. www.onsemi.com 55 NCV70627 SetPosition The priority encoder table (See Priority Encoder) describes the cases where a SetPosition command will be ignored. SetPosition corresponds to the following LIN write frames. This command is provided to the circuit by the LIN master to drive one or two motors to a given absolute position. See Positioning for more details. 1. Two (2) Data bytes frame with a direct ID (type #3) Table 63. SetPosition WRITING FRAME TYPE #3 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 Pos[15 :8] 2 Data 2 Pos[7 :0] 3 Checksum Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this SetPosition command as there are stepper−motors connected to the LIN bus. 2. Four (4) Data bytes frame with general purpose identifier (type #1). Note: The dynamic ID allocation has to be assigned to ‘General Purpose 4 Data bytes’ ROM pointer, i.e. ‘0001’. Table 64. SetPosition WRITING FRAME TYPE #1 Structure Bit 7 Bit 6 Bit 5 Identifier * * 1 Data 1 1 CMD[6:0] = 0x0B 2 Data 2 Broad AD[6:0] 3 Data 3 Pos[15:8] 4 Data 4 Pos[7:0] 5 Checksum Checksum over data Byte Content 0 1 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 ID3 ID2 ID1 ID0 Where: (*) According to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN will must go to Pos[15:0]. 3. Two (2) motors positioning frame with 0x3C identifier (type #4) Table 65. SetPosition WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x0B 3 Data 3 1 AD1[6:0] 4 Data 4 5 Data 5 6 Data 6 7 Data 7 Pos2[15:8] 8 Data 8 Pos2[7:0] 9 Checksum Checksum over data AppCMD = 0x80 Pos1[15:8] Pos1[7:0] 1 AD2[6:0] Where: Adn[6:0] : Motor #n physical address (n ∈ [1,2]). Posn[15:0] : Signed 16−bit position set−point for motor #n. www.onsemi.com 56 NCV70627 SetPositionShort The physical address is coded on 4 bits, hence SetPositionShort can only be used with a network implementing a maximum of 16 slave nodes. These 4 bits are corresponding to the bits PA[3:0] in OTP memory (address 0x02) See Physical Address of the Circuit. For SetPositionShort it is recommended to set HW0, HW1 and HW2 to ‘1’. The priority encoder table (See Priority Encoder) describes the cases where a SetPositionShort command will be ignored. This command is provided to the circuit by the LIN Master to drive one, two or four motors to a given absolute position. The Short Position is only 11 bits and mapped as half steps over the position range. The positioner still perform the motion with the programmed StepMode[1:0], but due to the reduced number of bits, the end position is always taken at a multiple of half steps (resolution). See Positioning for more details. SetPositionShort corresponds to the following LIN writing frames: 1. Two (2) data bytes frame for one (1) motor, with specific identifier (type #2) Table 66. SetPositionShort WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 2 Data 2 Pos [7:0] 3 Checksum Checksum over data Pos[10:8] Broad AD [3:0] Where: (*) According to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will go to Pos[10:0]. ID[5:0]: Dynamically allocated identifier to two data bytes SetPositionShort command. 2. Four (4) data bytes frame for two (2) motors, with specific identifier (type # 2) Table 67. SetPositionShort WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 0 ID3 ID2 ID1 ID0 1 Data 1 2 Data 2 3 Data 3 4 Data 4 Pos2[7:0] 5 Checksum Checksum over data Pos1[10:8] 1 Pos2[10:8] 1 AD1[3:0] Pos1[7:0] AD2[3:0] Where: (*) according to parity computation ID[5:0]: Dynamically allocated identifier to four data bytes SetPositionShort command. Adn[3:0]: Motor #n physical address least significant bits (n ∈ [1,2]). Posn[10:0]: Signed 11−bit position set point for Motor #n (see RAM Registers) 3. Eight (8) data bytes frame for four (4) motors, with specific identifier (type #2) www.onsemi.com 57 NCV70627 Table 68. SetPositionShort WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 1 ID3 ID2 ID1 ID0 1 Data 1 2 Data 2 3 Data 3 4 Data 4 5 Data 5 6 Data 6 7 Data 7 Pos1[10:8] 1 Pos2[10:8] 1 AD1[3:0] Pos1[7:0] AD2[3:0] Pos2[7:0] Pos3[10:8] 1 AD3[3:0] Pos3[7:0] Pos4[10:8] 1 AD4[3:0] 8 Data 8 Pos4[7:0] 9 Checksum Checksum over data Where: (*) according to parity computation ID[5:0]: Dynamically allocated identifier to eight data bytes SetPositionShort command. Adn[3:0]: Motor #n physical address least significant bits (n ∈ [1,4]). Posn[10:0]: Signed 11−bit position set point for Motor #n (see RAM Registers) SetPosParam This command is provided to the circuit by the LIN Master to drive one motor to a given absolute position. It also sets some of the values for the stepper motor parameters such as minimum and maximum velocity. SetPosParam corresponds to a four (4) data bytes writing LIN frame with specific dynamically assigned identifier (type # 2). Table 69. SetPosParam WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 0 ID3 ID2 ID5 ID4 1 Data 1 Pos[15:8] 2 Data 2 Pos[7:0] 3 Data 3 Vmax[3:0] Vmin[3:0] 4 Data 4 AbsThr[3:0] Acc[3:0] 5 Checksum Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will stop with deceleration. ID[5:0]: Dynamically allocated direct identifier to 4 Data bytes SetPosParam command. There should be as many dedicated identifiers to this SetPosParam command as there are stepper−motors connected to the LIN bus. Pos [15:0]: Signed 16−bit position set−point. Sleep frame is a master request command frame (identifier 0x3C) with data byte 1 containing 0x00 while the followings contain 0xFF. Note: SleepEnable needs to be set to 1 in order to allow the device to go to sleep. If SleepEnable is 0 the device will go into “stopped state” This command is provided to the circuit by the LIN master to put all the slave nodes connected to the LIN bus into sleep mode. If this command occurs during a motion of the motor, TagPos is reprogrammed to SecPos (provided SecPos is different from “100 0000 0000”), or a SoftStop is executed before going to sleep mode. See LIN 1.3 specification and Sleep Mode. The corresponding LIN www.onsemi.com 58 NCV70627 Table 70. SLEEP WRITING FRAME Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 0x00 2 Data 2 0xFF 3 Data 3 0xFF 4 Data 4 0xFF 5 Data 5 0xFF 6 Data 6 0xFF 7 Data 7 0xFF 8 Data 8 0xFF 3 Checksum Checksum over data SoftStop Command SoftStop occurs in the following cases: If a SoftStop command occurs during a motion of the stepper motor, it provokes an immediate deceleration to Vmin (see Minimum Velocity) followed by a stop, regardless of the position reached. Once the motor is stopped, TagPos register is overwritten with value in ActPos register to ensure keeping the stop position. Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer ‘0000’. The command is decoded only from the command data. Note: A SoftStop command occurring during a DualPosition sequence is not taken into account. • The chip temperature rises above the thermal shutdown • • threshold (see DC Parameters and Temperature Management); The VBB drops under the UV3 level; (see DC Parameters and Battery Voltage Management); The LIN master requests a SoftStop. Hence SoftStop will correspond to the following two data bytes LIN writing frame (type #1). Table 71. SoftStop WRITING FRAME TYPE #1 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x0F 2 Data 2 Broad AD[6:0] 3 Checksum Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will stop with deceleration. www.onsemi.com 59 NCV70627 PACKAGE DIMENSIONS SSOP36 EP CASE 940AB ISSUE O 0.20 C A-B D DETAIL B A 36 X 19 X = A or B E1 ÉÉÉ ÉÉÉ PIN 1 REFERENCE 1 e/2 E DETAIL B 36X 0.25 C 18 e 36X B 0.25 A DIM A A1 A2 b c D D2 E E1 E2 e h L L2 M M1 b M T A B S S NOTE 6 TOP VIEW H NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE b DIMENSION AT MMC. 4. DIMENSION b SHALL BE MEASURED BETWEEN 0.10 AND 0.25 FROM THE TIP. 5. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. DIMENSIONS D AND E1 SHALL BE DETERMINED AT DATUM H. 6. THIS CHAMFER FEATURE IS OPTIONAL. IF IT IS NOT PRESENT, A PIN ONE IDENTIFIER MUST BE LOACATED WITHIN THE INDICATED AREA. D 4X h A2 DETAIL A c h 0.10 C 36X SIDE VIEW A1 C SEATING PLANE END VIEW D2 M1 MILLIMETERS MIN MAX --2.65 --0.10 2.35 2.60 0.18 0.36 0.23 0.32 10.30 BSC 5.70 5.90 10.30 BSC 7.50 BSC 3.90 4.10 0.50 BSC 0.25 0.75 0.50 0.90 0.25 BSC 0_ 8_ 5_ 15 _ SOLDERING FOOTPRINT M GAUGE PLANE E2 L2 C SEATING PLANE 36X 5.90 36X 1.06 L DETAIL A BOTTOM VIEW 4.10 10.76 1 0.50 PITCH 36X 0.36 DIMENSIONS: MILLIMETERS www.onsemi.com 60 NCV70627 PACKAGE DIMENSIONS QFN32 5x5, 0.5P CASE 488AM ISSUE A A B D ÉÉ ÉÉ PIN ONE LOCATION L L L1 DETAIL A ALTERNATE TERMINAL CONSTRUCTIONS E NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30MM FROM THE TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L L1 0.15 C 0.15 C A DETAIL B 0.10 C ÉÉÉ ÉÉÉ ÇÇÇ EXPOSED Cu TOP VIEW (A3) A1 MOLD CMPD DETAIL B ALTERNATE CONSTRUCTION 0.08 C SEATING PLANE C SIDE VIEW NOTE 4 RECOMMENDED SOLDERING FOOTPRINT* DETAIL A 9 K D2 32X 5.30 3.35 17 8 MILLIMETERS MIN MAX 0.80 1.00 −−− 0.05 0.20 REF 0.18 0.30 5.00 BSC 2.95 3.25 5.00 BSC 2.95 3.25 0.50 BSC 0.20 −−− 0.30 0.50 −−− 0.15 32X 0.63 L E2 1 32 3.35 5.30 25 e e/2 32X BOTTOM VIEW b 0.10 M C A B 0.05 M C NOTE 3 0.50 PITCH 32X 0.30 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. FLEXMOS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 61 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCV70627/D