± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 D ESD Protection for RS-232 Bus Pins D D D D D D D DW OR N PACKAGE (TOP VIEW) − ±15-kV Human-Body Model Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU v.28 Standards Operates at 5-V VCC Supply Operates Up To 200 kbit/s Low Supply Current in Shutdown Mode . . . 2 µA Typical External Capacitors . . . 4 × 0.1 µF Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II Applications − Battery-Powered Systems, PDAs, Notebooks, Laptops, Palmtop PCs, and Hand-Held Equipment NC C1+ V+ C1− C2+ C2− V− DOUT2 RIN2 1 18 2 17 3 16 4 15 5 14 6 13 7 12 8 11 9 10 SHDN VCC GND DOUT1 RIN1 ROUT1 DIN1 DIN2 ROUT2 description/ordering information The MAX222 consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). This device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 5-V supply. This device operates at data signaling rates up to 200 kbit/s and a maximum of 30-V/µs driver output slew rate. By using SHDN, all receivers can be disabled. ORDERING INFORMATION PDIP (N) 0°C 0 C to 70 70°C C SOIC (DW) PDIP (N) −40°C −40 C to 85 85°C C ORDERABLE PART NUMBER PACKAGE† TA SOIC (DW) Tube of 20 MAX222CN Tube of 20 MAX222CDW Reel of 1000 MAX222CDWR Tube of 20 MAX222IN Tube of 20 MAX222IDW Reel of 1000 MAX222IDWR TOP-SIDE MARKING MAX222CN MAX222C MAX222IN MAX222I † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 Function Tables EACH DRIVER INPUT DIN OUTPUT DOUT L H H L H = high level, L = low level EACH RECEIVER INPUT RIN OUTPUT ROUT L H H L Open H H = high level, L = low level, Open = input disconnected or connected driver off logic diagram (positive logic) 12 15 DIN1 TTC/CMOS Inputs DOUT1 11 DIN2 DOUT2 13 14 ROUT1 TTC/CMOS Outputs RS-232 Outputs 8 RIN1 10 RS-232 Inputs 9 ROUT2 RIN2 18 SHDN 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Input voltage range, VI: Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC − 0.3 V Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V Output voltage range, VO: Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V Short-circuit duration, DOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Package thermal impedance, θJA (see Notes 2 and 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . TBD°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . TBD°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to network GND. 2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4 and Figure 4) VCC VIH VIL Supply voltage MIN NOM MAX 4.5 5 5.5 Driver high-level input voltage DIN 2 Shutdown high-level input voltage SHDN 2 Driver low-level input voltage DIN Shutdown low-level input voltage SHDN Driver input voltage DIN VI Receiver input voltage TA Operating free-air temperature MAX222C MAX222I UNIT V V V 0.8 V 0.8 V 0 5.5 −30 30 0 70 −40 85 V °C NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER ICC TEST CONDITIONS No load Supply current VCC = 5 V SHDN = VCC 3 kW on both inputs Shutdown supply current SHDN MIN TYP MAX 4 10 Shutdown input leakage current mA 15 2 UNIT 50 µA ±1 µA NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER VOH VOL IIH TEST CONDITIONS MIN TYP† High-level output voltage DOUT at RL = 3 kΩ to GND, DIN = GND 5 8 Low-level output voltage DOUT at RL = 3 kΩ to GND, DIN = VCC −5 −8 Driver high-level input current DIN = VCC Control high-level input current SHDN = VCC Driver low-level input current DIN = 0 V IIL Control low-level input current SHDN = 0 V IOS‡ Short-circuit output current VCC = 5.5 V, VO = 0 V Ioff ro Output leakage current VCC = 5.5 V, SHDN = GND, VCC, V+, and V− = 0 V, VO = ±10 V VO = ±2 V ±7 MAX V V 5 40 0.01 1 −5 −40 −0.01 −1 ±22 ±0.01 UNIT µA A µA A mA ±10 µA W † All typical values are at VCC = 5 V, and TA = 25°C. ‡ Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output should be shorted at a time. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. Output resistance 300 10 M switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER TEST CONDITIONS RL = 3 kΩ, See Figure 1 MIN TYP† MAX UNIT Data rate CL = 1000 pF, One DOUT switching, tPLH (D) Propagation delay time, low- to high-level output See Figure 1 1.5 3.5 µs tPHL (D) Propagation delay time, high- to low-level output See Figure 1 1.3 3.5 µs tPHL (D) − tPLH (D) Driver (+ to −) propagation delay difference tsk(p) Pulse skew§ CL = 150 pF to 2500 pF RL = 3 kΩ to 7 kΩ, See Figure 2 SR(tr) Slew rate, transition region (see Figure 1) RL = 3 kΩ to 7 kΩ, VCC = 5 V CL = 50 pF to 2500 pF tET Driver output enable time (after SHDN goes high) 250 µs tDT Driver output disable time (after SHDN goes low) 300 ns † All typical values are at VCC = 5 V and TA = 25°C. § Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 200 6 kbit/s 300 ns 300 ns 12 30 V/µs ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 RECEIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER VOH VOL High-level output voltage VIT+ VIT− Positive-going input threshold voltage Vhys ri Input hysteresis (VIT+ − VIT−) TEST CONDITIONS IOH = −1 mA IOL = 3.2 mA Low-level output voltage VCC = 5 V VCC = 5 V Negative-going input threshold voltage TYP† 3.5 VCC − 0.2 V 1.7 VI = ±3 V to ±25 V Input resistance MIN MAX UNIT V 0.4 V 2.4 V 0.8 1.3 0.2 0.5 1 V V 3 5 7 kW † All typical values are at VCC = 5 V, and TA = 25°C. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 3) tPLH (R) tPHL (R) PARAMETER TEST CONDITIONS Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output TYP† MAX CL= 150 pF 0.6 1 µs CL= 150 pF 0.5 1 µs MIN UNIT tPHL (R) − tPLH (R) Receiver (+ to −) propagation delay difference 100 ns tsk(p) Pulse skew‡ 100 ns † All typical values are at VCC = 5 V and TA = 25°C. ‡ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Test conditions are C1−C4 = 0.1 µF, at VCC = 5 V ± 0.5 V. ESD protection PIN DOUT, RIN TEST CONDITIONS Human-Body Model POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYP UNIT ±15 kV 5 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 PARAMETER MEASUREMENT INFORMATION 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V tPHL (D) CL (see Note A) tPLH (D) 3V Output −3 V TEST CIRCUIT SR(tr) + t PHL (D) 6V or t VOH 3V −3 V VOL VOLTAGE WAVEFORMS PLH (D) NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL 1.5 V Input 1.5 V 0V CL (see Note A) tPHL (D) tPLH (D) VOH 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 2. Driver Pulse Skew Input 3V 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω CL (see Note A) tPHL (R) tPLH (R) VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Receiver Propagation Delay Times 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 APPLICATION INFORMATION 18 1 NC 2 SHDN VCC 17 C1+ + CBYPASS − = 0.1 µF + 3 C1 †+ − C3 0.1 µF, 0.1 µF, − 6.3 V 6.3 V 4 V+ GND 16 15 C1− DOUT1 14 5 RIN1 C2+ 5 kΩ + C2 − 0.1 µF, 6V 6 C2− 13 7 C4 DOUT2 RIN2 − 12 V− ROUT1 DIN1 + 8 11 9 10 DIN2 ROUT2 5 kΩ † C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. Figure 4. Typical Operating Circuit and Capacitor Values POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 APPLICATION INFORMATION capacitor selection The capacitor type used for C1−C4 is not critical for proper operation. The MAX222 requires 0.1-µF capacitors, although capacitors up to 10 µF can be used without harm. Ceramic dielectrics are suggested for the 0.1-µF capacitors. When using the minimum recommended capacitor values, ensure that the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2×) nominal value. The capacitors’ effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V−. Use larger capacitors (up to 10 µF) to reduce the output impedance at V+ and V−. Bypass VCC to ground with at least 0.1 µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1−C4). ESD protection TI MAX222 devices have standard ESD protection structures incorporated on the pins to protect against electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures were designed to successfully protect these bus pins against ESD discharge of ±15-kV when powered down. ESD test conditions ESD testing stringently is performed by TI, based on various conditions and procedures. Contact TI for a reliability report that documents test setup, methodology, and results. Human-Body Model The Human-Body Model (HBM) of ESD testing is shown in Figure 5, while Figure 6 shows the current waveform that is generated during a discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage of concern, and subsequently discharged into the DUT through a 1.5-kΩ resistor. RD 1.5 kΩ VHBM + − CS 100 pF DUT Figure 5. HBM ESD Test Circuit 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 APPLICATION INFORMATION 1.5 VHBM = 2 kV DUT = 10-V, 1-Ω Zener Diode I DUT − A 1 0.5 0 0 50 100 150 200 Time − ns Figure 6. Typical HBM Current Waveform Machine Model The Machine Model (MM) ESD test applies to all pins using a 200-pF capacitor with no discharge resistance. The purpose of the MM test is to simulate possible ESD conditions that can occur during the handling and assembly processes of manufacturing. In this case, ESD protection is required for all pins, not just RS-232 pins. However, after PC board assembly, the MM test no longer is as pertinent to the RS-232 pins. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 ± SLLS590D − SEPTEMBER 2003 − REVISED AUGUST 2004 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty MAX222CDW ACTIVE SOIC DW 18 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222CDWG4 ACTIVE SOIC DW 18 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222CDWR ACTIVE SOIC DW 18 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222CDWRG4 ACTIVE SOIC DW 18 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222CN ACTIVE PDIP N 18 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type MAX222CNE4 ACTIVE PDIP N 18 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type MAX222IDW ACTIVE SOIC DW 18 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222IDWG4 ACTIVE SOIC DW 18 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222IDWR ACTIVE SOIC DW 18 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222IDWRG4 ACTIVE SOIC DW 18 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR MAX222IN ACTIVE PDIP N 18 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type MAX222INE4 ACTIVE PDIP N 18 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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