Intersil ICM7216D 8-digit, multi-function, frequency counters/timer Datasheet

ICM7216A, ICM7216B,
ICM7216D
8-Digit, Multi-Function,
Frequency Counters/Timers
August 1997
Features All Versions
Description
• Functions as a Frequency Counter (DC to 10MHz)
The ICM7216A and ICM7216B are fully integrated Timer
Counters with LED display drivers. They combine a high
frequency oscillator, a decade timebase counter, an
8-decade data counter and latches, a 7-segment decoder,
digit multiplexers and 8-segment and 8-digit drivers which
directly drive large multiplexed LED displays. The counter
inputs have a maximum frequency of 10MHz in frequency
and unit counter modes and 2MHz in the other modes. Both
inputs are digital inputs. In many applications, amplification
and level shifting will be required to obtain proper digital
signals for these inputs.
• Four Internal Gate Times: 0.01s, 0.1s, 1s, 10s in
Frequency Counter Mode
• Directly Drives Digits and Segments of Large Multiplexed LED Displays (Common Anode and Common
Cathode Versions)
• Single Nominal 5V Supply Required
• Highly Stable Oscillator, Uses 1MHz or 10MHz Crystal
• Internally Generated Decimal Points, Interdigit Blanking,
Leading Zero Blanking and Overflow Indication
• Display Off Mode Turns Off Display and Puts Chip Into
Low Power Mode
• Hold and Reset Inputs for Additional Flexibility
Features ICM7216A and ICM7216B
• Functions Also as a Period Counter, Unit Counter,
Frequency Ratio Counter or Time Interval Counter
• 1 Cycle, 10 Cycles, 100 Cycles, 1000 Cycles in Period,
Frequency Ratio and Time Interval Modes
The ICM7216D functions as a frequency counter only, as
described above.
• Measures Period From 0.5µs to 10s
Features ICM7216D
• Decimal Point and Leading Zero Banking May Be
Externally Selected.
Ordering Information
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
The ICM7216A and ICM7216B can function as a frequency
counter, period counter, frequency ratio (fA /fB) counter, time
interval counter or as a totalizing counter. The counter uses
either a 10MHz or 1MHz quartz crystal timebase. For period
and time interval, the 10MHz timebase gives a 0.1µs
resolution. In period average and time interval average, the
resolution can be in the nanosecond range. In the frequency
mode, the user can select accumulation times of 0.01s, 0.1s,
1s and 10s. With a 10s accumulation time, the frequency
can be displayed to a resolution of 0.1Hz in the least
significant digit. There is 0.2s between measurements in all
ranges.
PKG.
NO.
ICM7216AlJl
-25 to 85
28 Ld CERDIP
F28.6
ICM7216BlPl
-25 to 85
28 Ld PDIP
E28.6
ICM7216DlPl
-25 to 85
28 Ld PDIP
E28.6
All versions of the ICM7216 incorporate leading zero
blanking. Frequency is displayed in kHz. In the ICM7216A
and ICM7216B, time is displayed in µs. The display is
multiplexed at 500Hz with a 12.2% duty cycle for each digit.
The ICM7216A is designed for common anode displays with
typical peak segment currents of 25mA. The ICM7216B and
ICM7216D are designed for common cathode displays with
typical peak segment currents of 12mA. In the display off
mode, both digit and segment drivers are turned off,
enabling the display to be used for other functions.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
9-10
File Number
3166.1
ICM7216A, ICM7216B, ICM7216D
Pinouts
ICM7216A
COMMON ANODE
(CERDIP)
TOP VIEW
CONTROL INPUT 1
INPUT B 2
FUNCTION INPUT 3
DECIMAL POINT
4
OUTPUT
SEG e OUTPUT 5
ICM7216B
COMMON CATHODE
(PDIP)
TOP VIEW
28 INPUT A
CONTROL INPUT 1
27 HOLD INPUT
INPUT B 2
FUNCTION INPUT 3
26 OSC OUTPUT
28 INPUT A
27 HOLD INPUT
26 OSC OUTPUT
25 OSC INPUT
DIGIT 1 OUTPUT 4
25 OSC INPUT
24 EXT OSC INPUT
DIGIT 3 OUTPUT 5
SEG g OUTPUT 6
23 DIGIT 1 OUTPUT
DIGIT 2 OUTPUT 6
SEG a OUTPUT 7
22 DIGIT 2 OUTPUT
DIGIT 4 OUTPUT 7
24 EXT OSC INPUT
DECIMAL POINT
23
OUTPUT
22 SEG g OUTPUT
VSS 8
21 DIGIT 3 OUTPUT
VSS 8
21 SEG e OUTPUT
SEG d OUTPUT 9
20 DIGIT 4 OUTPUT
DIGIT 5 OUTPUT 9
20 SEG a OUTPUT
SEG b OUTPUT 10
19 DIGIT 5 OUTPUT
DIGIT 6 OUTPUT 10
19 SEG d OUTPUT
SEG c OUTPUT 11
18 VDD
DIGIT 7 OUTPUT 11
18 VDD
SEG f OUTPUT 12
17 DIGIT 6 OUTPUT
DIGIT 8 OUTPUT 12
17 SEG b OUTPUT
RESET INPUT 13
16 DIGIT 7 OUTPUT
RESET INPUT 13
16 SEG c OUTPUT
RANGE INPUT 14
15 DIGIT 8 OUTPUT
RANGE INPUT 14
15 SEG f OUTPUT
ICM7216D
COMMON CATHODE
(PDIP)
TOP VIEW
28 INPUT A
CONTROL INPUT 1
27 HOLD INPUT
MEASUREMENT IN PROGRESS 2
DIGIT 1 OUTPUT 3
26 OSC OUTPUT
DIGIT 3 OUTPUT 4
25 OSC INPUT
DIGIT 2 OUTPUT 5
24 EXT OSC INPUT
DIGIT 4 OUTPUT 6
23 DECIMAL POINT OUTPUT
VSS 7
22 SEG g OUTPUT
DIGIT 5 OUTPUT 8
21 SEG e OUTPUT
DIGIT 6 OUTPUT 9
20 SEG a OUTPUT
DIGIT 7 OUTPUT 10
19 SEG d OUTPUT
DIGIT 8 OUTPUT 11
18 VDD
RESET INPUT 12
17 SEG b OUTPUT
EX. DECIMAL POINT INPUT 13
16 SEG c OUTPUT
RANGE INPUT 14
15 SEG f OUTPUT
9-11
ICM7216A, ICM7216B, ICM7216D
Functional Block Diagram
EXT
OSC
INPUT
OSC
INPUT
3
OSC
SELECT
8
DIGIT
DRIVERS
DECODER
OSC
OUTPUT
8
DIGIT
OUTPUTS
(8)
REFERENCE
COUNTER
103
÷
RANGE
CONTROL
LOGIC
RANGE SELECT
LOGIC
÷ 104 OR ÷ 105
RANGE
INPUT
100Hz
5
STORE AND
RESET LOGIC
RESET
INPUT
6
CONTROL
LOGIC
CONTROL
INPUT
MAIN
÷ 103 COUNTER
EN
CL
INPUT A
INPUT B
(NOTE 1)
4
INPUT
CONTROL
LOGIC
DP
LOGIC
OVERFLOW
4
4
4
4
4
4
4
DATA LATCHES AND
STORE
OUTPUT MUX
4
DECODER
LOGIC
7
SEGMENT
DRIVER
8
SEGMENT
OUTPUTS
(8)
Q
D
INPUT
CONTROL
LOGIC
FUNCTION
INPUT
(NOTE 1)
EXT
DP
INPUT
(NOTE 2)
MEASUREMENT
IN PROGRESS
OUTPUT
(NOTE 2)
CL
MAIN
FF
FN
CONTROL
LOGIC
6
HOLD
INPUT
NOTES:
1. Function input and input B available on ICM7216A/B only.
2. Ext DP input and MEASUREMENT IN PROGRESS output available on ICM7216D only.
9-12
ICM7216A, ICM7216B, ICM7216D
Absolute Maximum Ratings
Thermal Information
Maximum Supply Voltage (VDD - VSS). . . . . . . . . . . . . . . . . . . . 6.5V
Maximum Digit Output Current . . . . . . . . . . . . . . . . . . . . . . . . 400mA
Maximum Segment Output Current . . . . . . . . . . . . . . . . . . . . . 60mA
Voltage On Any Input or
Output Terminal (Note 1) . . . . . . . . . . . .(VDD +0.3V) to (VSS -0.3V)
Thermal Resistance (Typical, Note 2)
θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . .
50
10
PDIP Package . . . . . . . . . . . . . . . . . . .
55
N/A
Maximum Junction Temperature
CERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The ICM7216 may be triggered into a destructive latchup mode if either input signals are applied before the power supply is applied or if
input or outputs are forced to voltages exceeding VDD to VSS by more than 0.3V.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VDD = 5.0V, VSS = 0V, TA = 25oC, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-
2
5
mA
ICM7216A/B
Operating Supply Current, IDD
Display Off, Unused Inputs to VSS
Supply Voltage Range (VDD -VSS), VSUPPLY
INPUT A, INPUT B Frequency at fMAX
4.75
-
6.0
V
Maximum Frequency INPUT A, Pin 28, fA(MAX)
Figure 9, Function = Frequency, Ratio,
Unit Counter
10
-
-
MHz
Function = Period, Time Interval
2.5
-
-
MHz
Maximum Frequency INPUT B, Pin 2, fB(MAX)
Figure 10
2.5
-
-
MHz
Minimum Separation INPUT A to INPUT B Time
Interval Function
Figure 1
250
-
-
ns
10
-
-
MHz
-
-
100
kHz
2000
-
-
µS
Maximum Oscillator Frequency and External Oscillator
Frequency, fOSC
Minimum External Oscillator Frequency, fOSC
Oscillator Transconductance, gM
VDD = 4.75V, TA = 85oC
Multiplex Frequency, fMUX
fOSC = 10MHz
-
500
-
Hz
Time Between Measurements
fOSC = 10MHz
-
200
-
ms
Input Low Voltage, VINL
-
-
1.0
V
Input High Voltage, VlNH
3.5
-
-
V
100
400
-
kΩ
Input Voltages: Pins 2, 13, 25, 27, 28
Input Resistance to VDD Pins 13, 24, RIN
VIN = VDD -1.0V
Input Leakage Pins 27, 28, 2, IILK
Input Range of Change, dVlN /dt
Supplies Well Bypassed
-
-
20
µA
-
15
-
mV/µs
ICM7216A
Digit Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23
High Output Current, IOH
VOUT = VDD -2.0V
-140
-180
-
mA
Low Output Current, IOL
VOUT = VSS +1.0V
-
0.3
-
mA
Low Output Current, IOL
VOUT = VSS +1.5V
20
35
-
mA
High Output Current, IOH
VOUT = VDD -2.5V
-
-100
-
µA
Input Low Voltage, VINL
-
-
0.8
V
Input High Voltage, VINH
2.0
-
-
V
50
100
-
kΩ
Segment Driver: Pins 4, 5, 6, 7, 9,10, 11, 12
Multiplex Inputs: Pins 1, 3, 14
Input Resistance to VSS , RIN
VIN = VSS +1.0V
9-13
ICM7216A, ICM7216B, ICM7216D
Electrical Specifications
VDD = 5.0V, VSS = 0V, TA = 25oC, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ICM7216B
Digit Driver: Pins 4, 5, 6, 7, 9, 10, 11, 12
Low Output Current, IOL
VOUT = VSS +1.3V
50
75
-
mA
High Output Current, IOH
VOUT = VDD -2.5V
-
-100
-
µA
High Output Current, IOH
VOUT = VDD -2.0V
-10
-
-
mA
Leakage Current, ISLK
VOUT = VDD -2.5V
-
-
10
µA
Input Low Voltage, VINL
-
-
VDD -2.0
V
Input High Voltage, VlNH
VDD -0.8
-
-
V
100
360
-
kΩ
-
2
5
mA
4.75
-
6.0
V
10
-
-
MHz
10
-
-
MHz
-
-
100
kHz
Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23
Multiplex Inputs: Pins 1, 3, 14
Input Resistance to VDD, RIN
VlN = VDD -2.5V
ICM7216D
Operating Supply Current, IDD
Display Off, Unused Inputs to VSS
Supply Voltage Range (VDD -VSS), VSUPPLY
INPUT A Frequency at fMAX
Maximum Frequency INPUT A, Pin 28, fA(MAX)
Figure 9
Maximum Oscillator Frequency and External Oscillator
Frequency, fOSC
Minimum External Oscillator Frequency, fOSC
Oscillator Transconductance, gM
VDD = 4.75V, TA = 85oC
2000
-
-
µS
Multiplex Frequency, fMUX
fOSC = 10MHz
-
500
-
Hz
Time Between Measurements
fOSC = 10MHz
-
200
-
ms
-
-
1.0
V
Input Voltages: Pins 12, 27, 28
Input Low Voltage, VINL
Input High Voltage, VINH
Input Resistance to VDD, Pins 12, 24, RIN
VIN = VDD -1.0V
Input Leakage, Pins 27, 28, IILK
3.5
-
-
V
100
400
-
kΩ
-
-
20
µA
Output Current, Pin 2, IOL
VOL = +0.4V
0.36
-
-
mA
Output Current, Pin 2, IOH
VOH = VDD -0.8V
265
-
-
µA
Input Rate of Change, dVlN /dt
Supplies Well Bypassed
-
15
-
mV/µs
50
75
-
mA
-
µA
Digit Driver: Pins 3, 4, 5, 6, 8, 9, 10, 11
Low Output Current, IOL
VOUT = +1.3V
High Output Current, IOH
VOUT = VDD -2.5V
-
100
High Output Current, IOH
VOUT = VDD -2.0V
10
15
Leakage Current, ISLK
VOUT = VDD -2.5V
-
-
10
Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23
mA
µA
Multiplex Inputs: Pins 1, 13, 14
Input Low Voltage, VlNL
-
-
VDD -2.0
V
Input High Voltage, VINH
VDD -0.8
-
-
V
100
360
-
kΩ
Input Resistance to VDD, RlN
VIN = VDD -1.0V
9-14
ICM7216A, ICM7216B, ICM7216D
Timing Diagram
40ms
INTERNAL
STORE
30ms TO 40ms
60ms
FUNCTION:
TIME INTERVAL
INTERNAL
RESET
40ms
UPDATE
190ms TO 200ms
UPDATE
MEASUREMENT INTERVAL
PRIMING
MEASUREMENT
IN PROGRESS
(INTERNAL ON
7216A/B)
INPUT A
PRIMING EDGES
INPUT B
250ns MIN
MEASURED
INTERVAL
(FIRST)
MEASURED
INTERVAL
(LAST)
NOTE:
1. If range is set to 1 event, first and last measured interval will coincide.
FIGURE 1. WAVEFORMS FOR TIME INTERVAL MEASUREMENT (OTHERS ARE SIMILAR, BUT WITHOUT PRIMING PHASE)
Typical Performance Curves
20
300
4.5 ≤ VDD ≤ 6.0V
fA (MAX) FREQUENCY UNIT COUNTER,
FREQUENCY RATIO MODES
200
IDIG (mA)
FREQUENCY (MHz)
15
10
fA (MAX) fB (MAX) PERIOD,
TIME INTERVAL MODES
100
5
25oC
85oC
-20oC
TA = 25oC
0
0
3
4
5
0
6
1
2
VDD-VOUT (V)
VDD-VSS (V)
FIGURE 2. fA(MAX), fB(MAX) AS A FUNCTION OF SUPPLY
FIGURE 3. ICM7216A TYPICAL IDIG vs VDD-VOUT
9-15
3
ICM7216A, ICM7216B, ICM7216D
Typical Performance Curves
30
(Continued)
80
4.5 ≤ VDD ≤ 6V
TA = 25oC
-20oC
VDD = 5.5V
25oC
60
VDD = 5V
20
ISEG (mA)
ISEG (mA)
85oC
VDD = 4.5V
40
10
20
0
0
1
2
0
3
0
1
2
VDD-VOUT (V)
FIGURE 4. ICM7216B AND ICM7216D TYPICAL ISEG vs VDD-VOUT
FIGURE 5. ICM7216A TYPICAL ISEG vs VOUT
200
80
VDD = 5V
-20oC
VDD = 5V
-20oC
25oC
25oC
60
ISEG (mA)
IDIGIT (mA)
150
85oC
100
85oC
40
20
50
0
3
VOUT (V)
0
0
1
2
0
3
1
FIGURE 6. ICM7216B AND ICM7216D TYPICAL IDIGIT vs VOUT
200
FIGURE 7. ICM7216A TYPICAL ISEG vs VOUT
TA = 25oC
VDD = 5.5V
50
VDD = 5V
IDIGIT (mA)
2
VOUT (V)
VOUT (V)
VDD = 4.5V
100
50
0
0
1
2
3
VOUT (V)
FIGURE 8. ICM7216B AND ICM7216D TYPICAL IDIGIT vs VOUT
9-16
3
ICM7216A, ICM7216B, ICM7216D
Description
COUNTED
TRANSITIONS
INPUTS A and B
INPUTS A and B are digital inputs with a typical switching
threshold of 2V at VDD = 5V. For optimum performance the
peak-to-peak input signal should be at least 50% of the
supply voltage and centered about the switching voltage.
When these inputs are being driven from TTL logic, it is
desirable to use a pullup resistor. The circuit counts high to
low transitions at both inputs. (INPUT B is available only on
lCM7216A and lCM7216B).
Note that the amplitude of the input should not exceed the
device supply (above the VDD and below the VSS) by more
than 0.3V, otherwise the device may be damaged.
50ns MIN
INPUT A
4.5V
0.5V
FIGURE 9. WAVEFORM FOR GUARANTEED MINIMUM fA(MAX)
FUNCTION = FREQUENCY, FREQUENCY RATIO,
UNIT COUNTER
9.
MEASURED
INTERVAL
Multiplexed Inputs
The FUNCTION, RANGE, CONTROL and EXTERNAL
DECIMAL POINT inputs are time multiplexed to select the
function desired. This is achieved by connecting the appropriate Digit driver output to the inputs. The function, range
and control inputs must be stable during the last half of each
digit output, (typically 125µs). The multiplexed inputs are
active high for the common anode lCM7216A and active low
for the common cathode lCM7216B and lCM7216D.
Noise on the multiplex inputs can cause improper operation.
This is particularly true when the unit counter mode of
operation is selected, since changes in voltage on the digit
drivers can be capacitively coupled through the LED diodes
to the multiplex inputs. For maximum noise immunity, a 10kΩ
resistor should be placed in series with the multiplexed
inputs as shown in the application circuits.
Table 1 shows the functions selected by each digit for these
inputs.
TABLE 1. MULTIPLEXED INPUT FUNCTIONS
FUNCTION
FUNCTION INPUT (Pin
3, lCM7216A and B
Only)
RANGE INPUT, Pin 14
CONTROL INPUT,
Pin 1
External DP INPUT (Pin
13, ICM7216D Only)
tr = tf = 10ns
50ns MIN
DIGIT
Frequency
D1
Period
D8
Frequency Ratio
D2
Time Interval
D5
Unit Counter
D4
Oscillator Frequency
D3
0.01s/1 Cycle
D1
0.1s/10 Cycles
D2
1s/100 Cycles
D3
10s/1K Cycles
D4
Display Off
D4 and
Hold
Display Test
D8
1MHz Select
D2
External Oscillator Enable
D1
External Decimal Point
Enable
D3
250ns
MIN
INPUT A OR 4.5V
INPUT B 0.5V
250ns
MIN
tr = tf = 10s
FIGURE 10. WAVEFORM FOR GUARANTEED MINIMUM fB(MAX)
AND fA(MAX) FOR FUNCTION = PERIOD AND
TIME INTERVAL
Function Input
The six functions that can be selected are: Frequency,
Period, Time Interval, Unit Counter, Frequency Ratio and
Oscillator Frequency. This input is available on the
lCM7216A and lCM7216B only.
The implementation of different functions is done by routing
the different signals to two counters, called “Main Counter”
and “Reference Counter”. A simplified block diagram of the
device for functions realization is shown in Figure 11. Table 2
shows which signals will be routed to each counter in
different cases. The output of the Main Counter is the
information which goes to the display. The Reference
Counter divides its input by 1, 10, 100 and 1000. One of
these outputs will be selected through the range selector
and drive the enable input of the Main Counter. This means
that the Reference Counter, along with its associated blocks,
directs the Main Counter to begin counting and determines
the length of the counting period. Note that Figure 11 does
not show the complete functional diagram (See the
Functional Block Diagram). After the end of each counting
period, the output of the Main Counter will be latched and
displayed, then the counter will be reset and a new
measurement cycle will begin. Any change in the
FUNCTION INPUT will stop the present measurement
without updating the display and then initiate a new
measurement. This prevents an erroneous first reading after
the FUNCTION INPUT is changed. In all cases, the 1-0
transitions are counted or timed.
Decimal point is output for same digit
that is connected to this input.
9-17
ICM7216A, ICM7216B, ICM7216D
INTERNAL CONTROL
INTERNAL CONTROL
100Hz
INPUT
SELECTOR
INPUT A
CLOCK
INPUT B
REFERENCE COUNTER
÷1
INTERNAL CONTROL
INTERNAL OR
EXTERNAL
OSCILLATOR
INTERNAL CONTROL
÷10
÷100 ÷1000
RANGE SELECTOR
ENABLE
INPUT
SELECTOR
INPUT A
CLOCK
MAIN COUNTER
FIGURE 11. SIMPLIFIED BLOCK DIAGRAM OF FUNCTIONS IMPLEMENTATION
display becomes updated; note this when measuring long
time intervals to give enough time for measurement completion. The resolution in this mode is the same as for period
measurement. See the Time Interval Measurement section
also.
TABLE 2. 7216A/B INPUT ROUTING
FUNCTION
MAIN
COUNTER
REFERENCE COUNTER
Frequency (fA)
Input A
100Hz (Oscillator ÷105 or 104)
Period (tA)
Oscillator
Input A
Ratio (fA /fB)
Input A
Input B
Time Interval
(A→B)
Oscillator
Input A
Input B
Unit Counter
(Count A)
Input A
Not Applicable
Osc. Freq.
(fOSC)
Oscillator
100Hz (Oscillator ÷105 or 104)
Unit Counter - In this mode, the Main Counter is always
enabled. The input A is counted by the Main Counter and
displayed continuously.
Oscillator Frequency - In this mode, the device makes a
frequency measurement on its timebase. This is a self test
mode for device functionality check. For 10MHz timebase
the display will show 10000.0, 10000.00, 10000.000 and
Overflow in different ranges.
Range Input
Frequency - In this mode input A is counted by the Main
Counter for a precise period of time. This time is determined
by the time base oscillator and the selected range. For the
10MHz (or 1MHz) time base, the resolutions are 100Hz,
10Hz, 1Hz and 0.1Hz. The decimal point on the display is
set for kHz reading.
Period - In this mode, the timebase oscillator is counted by
the Main Counter for the duration of 1, 10, 100 or 1000
(range selected) periods of the signal at input A. A 10MHz
timebase gives resolutions of 0.1µs to 0.0001µs for 1000
periods averaging. Note that the maximum input frequency
for period measurement is 2.5MHz.
Frequency Ratio - In this mode, the input A is counted by
the Main Counter for the duration of 1, 10, 100 or 1000
(range selected) periods of the signal at input B. The frequency at input A should be higher than input B for meaningful result. The result in this case is unitless and its resolution
can go up to 3 digits after decimal point.
Time Interval - In this mode, the timebase oscillator is
counted by the Main Counter for the duration of a 1-0 transition of input A until a 1-0 transition of input B. This means
input A starts the counting and input B stops it. If other ranges,
except 0.01s/1 cycle are selected the sequence of input A and
B transitions must happen 10, 100 or 1000 times until the
The RANGE INPUT selects whether the measurement
period is made for 1, 10, 100 or 1000 counts of the Reference Counter. As it is shown in Table 1, this gives different
counting windows for frequency measurement and various
cycles for other modes of measurement.
In all functional modes except Unit Counter, any change in
the RANGE INPUT will stop the present measurement
without updating the display and then initiate a new measurement. This prevents an erroneous first reading after the
RANGE INPUT is changed.
Control Input
Unlike the other multiplexed inputs, to which only one of the
digit outputs can be connected at a time, this input can be
tied to different digit lines to select combination of controls.
In this case, isolation diodes must be used in digit lines to
avoid crosstalk between them (see Figure 17). The direction
of diodes depends on the device version, common anode or
common cathode. For maximum noise immunity at this input,
in addition to the 10K resistor which was mentioned before,
a 39pF to 100pF capacitor should also be placed between
this input and the VDD or VSS (See Figure 17).
Display Off - To disable the display drivers, it is necessary to
tie the D4 line to the CONTROL INPUT and have the HOLD
9-18
ICM7216A, ICM7216B, ICM7216D
input at VDD . While in Display Off mode, the segments and
digit drivers are all off, leaving the display lines floating, so the
display can be shared with other devices. In this mode, the
oscillator continues to run with a typical supply current of
1.5mA with a 10MHz crystal, but no measurements are made
and multiplexed inputs are inactive. A new measurement
cycle will be initiated when the HOLD input is switched to
VSS .
low) is stopped, the main counter is reset and the chip is
held ready to initiate a new measurement as soon as HOLD
goes low. The latches which hold the main counter data are
not updated, so the last complete measurement is displayed.
In unit counter mode when HOLD input is at VDD , the
counter is not stopped or reset, but the display is frozen at
that instantaneous value. When HOLD goes low the count
continues from the new value in the new counter.
Display Test - Display will turn on with all the digits showing
8s and all decimal points on. The display will be blanked if
Display Off is selected at the same time.
RESET Input
1MHz Select - The 1MHz select mode allows use of a 1MHz
crystal with the same digit multiplex rate and time between
measurement as with a 10MHz crystal. This is done by
dividing the oscillator frequency by 104 rather than 105. The
decimal point is also shifted one digit to the right in period
and time interval, since the least significant digit will be in µs
increment rather than 0.1µs increment.
External Oscillator Enable - In this mode, the signal at EXT
OSC INPUT is used as a timebase instead of the on-board
crystal oscillator (built around the OSC INPUT, OSC OUTPUT inputs). This input can be used for an external stable
temperature compensated crystal oscillator or for special
measurements with any external source. The on-board crystal oscillator continues to work when the external oscillator is
selected. This is necessary to avoid hang-up problems, and
has no effect on the chip's functional operation. If the onboard oscillator frequency is less than 1MHz or only the
external oscillator is used, THE OSC INPUT MUST BE
CONNECTED TO THE EXT OSC INPUT providing the timebase has enough voltage swing for OSC INPUT (See Electrical Specifications). If the external timebase is TTL level a
pullup resistor must be used for OSC INPUT. The other way
is to put a 22MΩ resistor between OSC INPUT and OSC
OUTPUT and capacitively couple the EXT OSC INPUT to
OSC INPUT. This will bias the OSC INPUT at its threshold
and the drive voltage will need to be only 2VP-P . The external timebase frequency must be greater than 100kHz or the
chip will reset itself to enable the on-board oscillator.
External Decimal Point Enable - In this mode, the EX DP
INPUT is enabled (lCM7216D only). A decimal point will be
displayed for the digit that its output line is connected to this
input (EX DP INPUT). Digit 8 should not be used since it will
override the overflow output. Leading zero blanking is effective for the digits to the left of selected decimal point.
The RESET input resets the main counter, stops any
measurement in progress, and enables the main counter
latches, resulting in an all zero output. A capacitor to ground
will prevent any hang-ups on power-up.
MEASUREMENT IN PROGRESS
This output is provided in lCM7216D. It stays low during
measurements and goes high for intervals between measurements. It is provided for system interfacing and can drive
a low power Schottky TTL or one ECL load if the ECL device
is powered from the same supply as lCM7216D.
Decimal Point Position
Table 3 shows the decimal point position for different modes
of lCM7216 operation. Note that the digit 1 is the least significant digit. Table 3 is for 10MHz timebase frequency.
Overflow Indication
When overflow happens in any measurement it will be indicated
on the decimal point of the digit 8. A separate LED indicator can
be used. Figure 12 shows how to connect this indicator.
a
f
b
g
e
c
DP
d
FIGURE 12. SEGMENT IDENTIFICATION AND DISPLAY FONT
Overflow will be indicated on the decimal point output of
digit 8. A separate LED overflow indicator can be connected
as follows:
DEVICE
Hold Input
ICM7216A
Except in the unit counter mode, when the HOLD input is
at VDD , any measurement in progress (before STORE goes
ICM7216B/D
CATHODE
ANODE
Decimal Point
D8
D8
Decimal Point
TABLE 3. DECIMAL POINT POSITIONS
FREQUENCY
PERIOD
FREQUENCY
RATIO
TIME
INTERVAL
UNIT
COUNTER
OSCILLATOR
FREQUENCY
0.01s/1 Cycle
D2
D2
D1
D2
D1
D2
0.1s/10 Cycle
D3
D3
D2
D3
D1
D3
1s/100 Cycle
D4
D4
D3
D4
D1
D4
10s/1K Cycle
D5
D5
D4
D5
D1
D5
RANGE
9-19
ICM7216A, ICM7216B, ICM7216D
Time Interval Measurement
CO = Crystal Static Capacitance
When in the time interval mode and measuring a single
event, the lCM7216A and lCM7216B must first be “primed”
prior to measuring the event of interest. This is done by first
generating a negative going edge on Channel A followed by a
negative going edge on Channel B to start the “measurement
interval”. The inputs are then primed ready for the measurement. Positive going edges on A and B, before or after the
priming, will be needed to restore the original condition.
RS = Crystal Series Resistance
Priming can be easily accomplished using the circuit in
Figure 13.
SIGNAL A
2
INPUT A
2
INPUT B
VDD
PRIME
N.O.
1
1
1
10K
6
0.1µF
VSS
The required gM should not exceed 50% of the gM specified
for the lCM7216 to insure reliable startup. The OSCillator
INPUT and OUTPUT pins each contribute about 5pF to CIN
and COUT . For maximum stability of frequency, CIN and
COUT should be approximately twice the specified crystal
static capacitance.
the 1MHz mode. The time between measurements is
10nF
VSS
DEVICE
VSS
The crystal and oscillator components should be located as
close to the chip as practical to minimize pickup from other
signals. Coupling from the EXTERNAL OSClLLATOR INPUT
to the OSClLLATOR OUTPUT or INPUT can cause undesirable shifts in oscillator frequency.
TYPE
1
CD4049B Inverting Buffer
2
CD4070B Exclusive - OR
FIGURE 13. PRIMING CIRCUIT, SIGNALS A AND B BOTH HIGH
OR LOW
Following the priming procedure (when in single event or 1
cycle range) the device is ready to measure one (only)
event.
When timing repetitive signals, it is not necessary to “prime”
the lCM7216A and lCM7216B as the first alternating signal
states automatically prime the device. See Figure 1.
During any time interval measurement cycle, the ICM7216A
and lCM7216B require 200ms following B going low to
update all internal logic. A new measurement cycle will not
take place until completion of this internal update time.
Oscillator Considerations
The oscillator is a high gain CMOS inverter. An external
resistor of 10MΩ to 22MΩ should be connected between the
OSCillator INPUT and OUTPUT to provide biasing. The
oscillator is designed to work with a parallel resonant 10MHz
quartz crystal with a static capacitance of 22pF and a series
resistance of less than 35Ω.
For a specific crystal and load capacitance, the required gM
can be calculated as follows:
CO 2

g M = ω C IN C OUT R S 1 + -------- 
CL 

2
 C IN C OUT 
where C L =  --------------------------------- 
 C IN + C OUT 
5
2 × 10
2 × 10
------------------- in the 10MHz mode and ------------------- in the 1MHz mode.
f OSC
f OSC
1N914
100K
ω = 2πf
f OSC
f OSC
f MUX = ------------------- for 10MHz mode and f MUX = ------------------- for
4
3
2 × 10
2 × 10
150K
1
COUT = Output Capacitance
In cases where non decade prescalers are used it may be
desirable to use a crystal which is neither 10MHz or 1MHz.
In that case both the multiplex rate and time between measurements will be different. The multiplex rate is
SIGNAL B
VDD
CIN = Input Capacitance
Display Considerations
The display is multiplexed at a 500Hz rate with a digit time of
244µs. An interdigit blanking time of 6µs is used to prevent
display ghosting (faint display of data from previous digit
superimposed on the next digit). Leading zero blanking is
provided, which blanks the left hand zeroes after decimal
point or any non zero digits. Digits to the right of the decimal
point are always displayed. The leading zero blanking will be
disabled when the Main Counter overflows.
The lCM7216A is designed to drive common anode LED
displays at peak current of 25mA/segment, using displays
with VF = 1.8V at 25mA. The average DC current will be over
3mA under these conditions. The lCM7216B and lCM7216D
are designed to drive common cathode displays at peak current of 15mA/segment using displays with VF = 1.8V at
15mA. Resistors can be added in series with the segment
drivers to limit the display current in very efficient displays, if
required. The Typical Performance Curves show the digit
and segment currents as a function of output voltage.
To get additional brightness out of the displays, VDD may be
increased up to 6.0V. However, care should be taken to see
that maximum power and current ratings are not exceeded.
The segment and digit outputs in lCM7216s are not directly
compatible with either TTL or CMOS logic when driving
LEDs. Therefore, level shifting with discrete transistors may
be required to use these outputs as logic signals.
9-20
ICM7216A, ICM7216B, ICM7216D
Accuracy
In a Universal Counter crystal drift and quantization effects
cause errors. In frequency, period and time interval
modes, a signal derived from the oscillator is used in either
the Reference Counter or Main Counter. Therefore, in
these modes an error in the oscillator frequency will cause
an identical error in the measurement. For instance, an
oscillator temperature coefficient of 20PPM /oC will cause a
measurement error of 20PPM /oC.
In addition, there is a quantization error inherent in any digital
measurement of ±1 count. Clearly this error is reduced by displaying more digits. In the frequency mode the maximum
accuracy is obtained with high frequency inputs and in period
mode maximum accuracy is obtained with low frequency
inputs (as can be seen in Figure 14). In time interval measurements there can be an error of 1 count per interval. As a
result there is the same inherent accuracy in all ranges as
shown in Figure 15. In frequency ratio measurement can be
more accurately obtained by averaging over more cycles of
INPUT B as shown in Figure 16.
0
0
FREQUENCY MEASURE
MAXIMUM NUMBER OF
SIGNIFICANT DIGITS
MAXIMUM NUMBER OF
SIGNIFICANT DIGITS
1
0.01s
0.1s
1s
10s
2
4
1 CYCLE
10 CYCLES
2
10 CYCLES
103 CYCLES
6
2
MAXIMUM TIME INTERVAL
FOR 103 INTERVALS
3
4
MAXIMUM TIME
INTERVAL FOR
102 INTERVALS
5
6
MAXIMUM TIME INTERVAL
FOR 10 INTERVALS
7
PERIOD MEASURE
fOSC = 10MHz
8
1
10
103
FREQUENCY (Hz)
8
105
1
107
102
10
103
104
105
106
107
108
TIME INTERVAL (µs)
FIGURE 14. MAXIMUM ACCURACY OF FREQUENCY AND
PERIOD MEASUREMENTS DUE TO LIMITATIONS
OF QUANTIZATION ERRORS
FIGURE 15. MAXIMUM ACCURACY OF TIME INTERVAL MEASUREMENT DUE TO LIMITATIONS OF QUANTIZATION ERRORS
0
MAXIMUM NUMBER OF
SIGNIFICANT DIGITS
1
RANGE
2
3
1 CYCLE
10 CYCLES
102 CYCLES
103 CYCLES
4
5
6
7
8
1
10
102
103
104
fA /fB
105
106
107
108
FIGURE 16. MAXIMUM ACCURACY FOR FREQUENCY RATIO MEASUREMENT DUE TO LIMITATION OF QUANTIZATION ERRORS
9-21
ICM7216A, ICM7216B, ICM7216D
Test Circuit
VDD
INPUT A
FUNCTION
GENERATOR
DISPLAY DISPLAY
BLANK
TEST 1MHz
10kΩ
HOLD
100pF
INPUT B
F
D8
FR
D2
TI.
D5
U.C.
O.F.
1
28
2
27
3
26
DP
4
25
e
g
5
24
6
23
a
7
FUNCTION
P
8
D4
D3
ICM7216A
22MΩ
D1
22
D2
21
D3
9
20
D4
b
10
19
D5
c
11
18
f
12
17
D6
13
16
D7
14
15
D8
D8
D2
D1
D5
1N914s
10MHz
CRYSTAL
EXT
OSC
INPUT
8
TYPICAL CRYSTAL SPECS:
F = 10MHz PARALLEL RESONANCE
CL = 22pF
RS = <35Ω
VDD
RANGE
D1
D2
10kΩ
8
LED
OVERFLOW
INDICATOR
TEST
39pF
TYP
39pF
D4
d
RESET
6
EXT
OSC
10kΩ
FUNCTION
GENERATOR
10K
D1
VDD
VDD
D3
D4
a
b
c
d
e
f
g
.01/1
4
.1/10
1/100
10/1K
8
DP
D8
D8
D7
D6
D5
D4
D3
D2
D1
FIGURE 17. TEST CIRCUIT (ICM7216A SHOWN, OTHERS SIMILAR)
Typical Applications
The lCM7216 has been designed for use in a wide range of
Universal and Frequency counters. In many cases, prescalers
will be required to reduce the input frequencies to under 10MHz.
Because INPUT A and INPUT B are digital inputs, additional
circuitry is often required for input buffering, amplification,
hysteresis, and level shifting to obtain a good digital signal.
The lCM7216A or lCM7216B can be used as a minimum
component complete Universal Counter as shown in
Figure 18. This circuit can use input frequencies up to
10MHz at INPUT A and 2MHz at INPUT B. If the signal at
INPUT A has a very low duty cycle it may be necessary to
use a 74LS121 monostable multivibrator or similar circuit to
stretch the input pulse width to be able to guarantee that it is
at least 50ns in duration.
To measure frequencies up to 40MHz the circuit of Figure
19 can be used. To obtain the correct measured value, it is
necessary to divide the oscillator frequency by four as well
as the input frequency. In doing this the time between
measurements is also lengthened to 800ms and the display
multiplex rate is decreased to 125Hz.
If the input frequency is prescaled by ten, then the oscillator
can remain at 10MHz or 1MHz, but the decimal point must
be moved one digit to the right. Figure 20 shows a frequency
counter with a ÷10 prescaler and an lCM7216A. Since there
is no external decimal point control with the lCM7216A and
lCM7216B, the decimal point may be controlled externally
with additional drivers as shown in Figure 20. Alternatively, if
separate anodes are available for the decimal points, they
can be wired up to the adjacent digit anodes. Note that there
can be one zero to the left of the decimal point since the
internal leading zero blanking cannot be changed. In
Figure 21 additional logic has been added to count the input
directly in period mode for maximum accuracy. In Figures 20
and 21, INPUT A comes from QC of the prescaler rather
than QD to obtain an input duty cycle of 40%.
9-22
ICM7216A, ICM7216B, ICM7216D
VDD
EXT
DISPLAY DISPLAY
OSC
BLANK
TEST ENABLE
VDD
INPUT A
10kΩ
39pF
TYP
100pF
HOLD
CONTROL
SWITCHES
22MΩ
28
1
INPUT B
10kΩ
F
D1
P
D8
F.R.
D2
T.I.
D5
U.C.
27
3
26
D3
FUNCTION
0.1µF
4
25
5
24
D3
6
23
DP
D4
7
22
g
21
e
D5
9
20
a
D6
10
19
d
D7
11
18
D8
12
17
b
13
16
c
14
15
6
8
RESET
RANGE
D1
D2
D3
10kΩ
D4
SEC
D6
D5
CYCLES
D1
0.01
1.0
D2
0.1
10.0
D3
1.0
100.0
D4
10.0
1K
VDD
8
SEGMENT DRIVERS
f
8
D4
D3
8
a
b
c
d
e
f
g
DP
DIGIT
DRIVERS
D7
D1
EXT
OSC
INPUT
4
COMMON CATHODE LED DISPLAY
D8
D8
IN914s
3
D2
ICM7216B
D4
10MHz
CRYSTAL
39pF
VDD
D1
8
D4
O.F.
2
100kΩ
D2
D1
D8
LED
OVERFLOW
INDICATOR
FIGURE 18. 10MHz UNIVERSAL COUNTER
9-23
ICM7216A, ICM7216B, ICM7216D
INPUT A
J 3
P
4
1
CL
K 2
C
15
1/ 74LS112
2
Q 5
Q 6
K 12
10
P
V+
13 CL
J 11
VDD
C
14
1/ 74LS112
2
EXT
OSC DISPLAY DISPLAY
ENABLE
OFF
TEST
VDD
3kΩ
Q 9
Q 7
VDD
10kΩ
39pF
39pF
HOLD
100pF
100kΩ
2
27
D1
3
26
D2
4
25
D3
5
24
6
23
D4
22MΩ
DP
8
21
g
e
D6
9
20
a
D7
10
19
d
D8
11
18
12
17
b
13
16
c
14
15
f
22
RESET
8
ICM7216D
IN914s
LED
OVERFLOW
INDICATOR
VDD
RANGE
D1
D2
4
D3
D8
D7
3
8
COMMON CATHODE LED DISPLAY
D4
D6
D2
a
b
c
d
e
f
g
DP
DP
D8
D8
EXT
OSC
INPUT
10kΩ
a
b
c
d
e
f
g
D4
2.5MHz
CRYSTAL
D5
7
0.1µF
D1
28
1
D5
D4
D3
D1
8
OVERFLOW
INDICATOR
FIGURE 19. 40MHz FREQUENCY COUNTER
9-24
ICM7216A, ICM7216B, ICM7216D
VDD
VDD
INPUT B
INPUT A
CK1 CK2
QA
QA
QC
VDD
3kΩ
QC
30pF
TYP
39pF
HOLD
11C90
DP
1
28
2
27
3
26
4
25
e
g
5
24
6
23
a
7
0.1µF
D8
D2
22
D2
D3
20
D4
b
10
19
D5
c
11
18
f
12
17
D6
13
16
D7
14
15
D8
8
8
4
VSS
4
VDD
1kΩ
RANGE
DP
D1
D1
10kΩ
a
b
c
d
e
f
g
10MHz
CRYSTAL
D1
21
10kΩ
F
22MΩ
9
RESET
D1
ICM7216A
1N914 D7
d
8
F.R.
10kΩ
10kΩ
100pF
3kΩ
P
DISPLAY
TEST
VDD
CK1 CK2
74LS90 OR
11C90
VDD
D2
D2
D3
D3
1kΩ
2N2222
D4
D4
COMMON ANODE LED DISPLAY
40Ω
DP
D8
D8
D7
D6
D5
D4
LED
OVERFLOW
INDICATOR
FIGURE 20. 100MHz MULTIFUNCTION COUNTER
9-25
D3
D2
D1
8
ICM7216A, ICM7216B, ICM7216D
INPUT A
11C90
CK1
CK2 QA OC
3kΩ
74LS00
VDD
VDD
VDD
VDD
3kΩ
VDD
10kΩ
10kΩ
100pF
100kΩ
10kΩ
39pF
TYP
39pF
VDD
10kΩ
2N2222
HOLD
FUNCTION SWITCH
OPEN: FREQ.
CLOSED: PERIOD
1
28
2
27
3
26
4
25
e
5
24
g
6
23
a
7
V+
DP
8
0.1µF
22
D2
21
D3
9
20
D4
b
10
19
D5
c
11
18
f
12
17
D6
13
16
D7
14
15
D8
8
2
D1
13
CD4016
4
CONT
3
a
b
c
d
e
f
g
D3
10MHz
CRYSTAL
8
4
1kΩ
4
2N2222
VDD
RANGE
DP
D1
1kΩ
D1
D2
D2
D3
D3
D4
1kΩ
2N2222
D4
COMMON CATHODE LED DISPLAY
40Ω
D8
5
VSS
VSS
10kΩ
1
CONT
D1
d
RESET
10kΩ
ICM7216A
22MΩ
DP
D8
D8
D7
D6
D5
D4
D3
D2
D1
8
LED
OVERFLOW
INDICATOR
FIGURE 21. 100MHz FREQUENCY, 2MHz PERIOD COUNTER
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
9-26

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