LINER LTC1473L Dual low voltage powerpath switch driver Datasheet

LTC1473L
Dual Low Voltage
PowerPathTM Switch Driver
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DESCRIPTIO
FEATURES
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The LTC®1473L provides reliable and efficient switching
between two DC power sources. This device drives two
external sets of back-to-back N-channel MOSFET switches
to route power to the input of a low voltage system. An
internal boost regulator provides the voltage to fully enhance the logic-level N-channel MOSFET switches while
an internal undervoltage lock-out circuit keeps the system
alive down to 2.8V.
Power Path Management for Systems
with Multiple DC Sources
Switches and Isolates Sources from 3.3V to 10V
All N-Channel Switching to Reduce Power Losses
and System Cost
Built-In Step-Up Regulator for N-Channel Gate Drive
Capacitor Inrush and Short-Circuit Current Limited
User-Programmable Timer Prevents Overdissipation
During Current Limiting
Undervoltage Lockout Prevents Operation with Low
Inputs
Small Footprint: 16-Pin Narrow SSOP
The LTC1473L senses current to limit inrush between the
batteries and the system supply capacitor during switchover transitions or during fault conditions. A user-programmable timer monitors the time the MOSFET switches
are in current limit and latches them off when the programmed time is exceeded.
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APPLICATIO S
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A unique “2-diode” logic mode ensures system start-up
regardless of which input receives power first.
Portable Computers
Portable Instruments
Fault Tolerant Computers
Battery-Backup Systems
3.3V/5V Power Management
, LTC and LT are registered trademarks of Linear Technology Corporation.
PowerPath is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATIO
3.3V to 4-Cell NiMH Backup Switch
Si9926DY
DCIN
3.3V
1
BAT54C
LOGIC
DRIVEN
VBAT1
4× NiMH
2
3
4
5
6
CTIMER
2000pF
1mH*
1µF
1µF
7
8
LTC1473L
IN1
GA1
IN2
SAB1
16
15
14
DIODE
GB1
TIMER
13
SENSE +
V+
VGG
SW
GND
RSENSE
0.04Ω
3.3V OR
VBAT1
+
12
SENSE –
11
GA2
10
SAB2
9
GB2
COUT
1473 TA01
* COILCRAFT 1812LS-105XKBC
Si9926DY
1
LTC1473L
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PACKAGE/ORDER I FOR ATIO
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ABSOLUTE
AXI U RATI GS
(Note 1)
TOP VIEW
SENSE +, SENSE –, V + .................................. – 0.3 to 10V
GA1, GB1, GA2, GB2 ................................... – 0.3 to 20V
SAB1, SAB2 ................................................. – 0.3 to 10V
SW, VGG ...................................................... – 0.3 to 20V
IN1, IN2, DIODE ...........................................– 0.3V to 7V
Junction Temperature (Note 2) ............................. 125°C
Operating Temperature Range ..................... 0°C to 70°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
IN1 1
16 GA1
IN2 2
15 SAB1
ORDER PART
NUMBER
DIODE 3
14 GB1
TIMER 4
13 SENSE +
V+ 5
12 SENSE –
VGG 6
11 GA2
SW 7
10 SAB2
GND 8
9
LTC1473LCGN
GN PART MARKING
GB2
1473L
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
TJMAX = 125°C, θJA = 150°C/ W
Consult factory for Military and Industrial grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test circuit, V+ = 5V, unless otherwise specified.
SYMBOL
PARAMETER
V+
Supply Operating Range
CONDITIONS
MIN
TYP
2.8
MAX
UNITS
9
V
IS
Supply Current
VIN1 = VDIODE = 5V, VIN2 = 0V, VSENSE = VSENSE = 5V
●
100
200
µA
VGS
VGS Gate Supply Voltage
VGS = VGG – V +, 2.8V ≤ V + ≤ 10V (Note 3)
●
7.5
8.5
9.5
V
V+
UVLO
V + Undervoltage Lockout Threshold
V + Ramping
●
2.3
2.5
2.8
V
UVLOHYS
V + Undervoltage Lockout Hysteresis
70
mV
2
0.9
V
V+
+
–
Down
VHIDIGIN
Digital Input Logic High
(Note 4)
●
VLODIGIN
Digital Input Logic Low
(Note 4)
●
IIN
Input Current
VIN1 = VIN2 = VDIODE = 5V
VGS(ON)
Gate-to-Source ON Voltage
IGA1 = IGA2 = IGB1 = IGB2 = – 1µA, VSAB1 = VSAB2 = 5V
●
VGS(OFF)
Gate-to-Source OFF Voltage
IGA1 = IGA2 = IGB1 = IGB2 = 100µA, VSAB1 = VSAB2 = 5V
●
4.5
0.6
0.4
V
±1
µA
5.6
7.0
V
0
0.4
V
Input Bias Current
VSENSE VSENSE 10V (Note 3)
VSENSE + = VSENSE – = 0V (Note 5)
●
●
2
– 300
4.5
– 175
10
– 75
µA
µA
IBSENSE –
SENSE – Input Bias Current
VSENSE + = VSENSE – = 10V (Note 3)
VSENSE + = VSENSE – = 0V (Note 5)
●
●
2
– 300
4.5
– 175
10
– 75
µA
µA
VSENSE
Inrush Current Limit Sense Voltage
VSENSE – = 10V (VSENSE + – VSENSE –) (Note 3)
VSENSE – = 0V (VSENSE + – VSENSE –)
0.15
0.10
0.20
0.20
0.25
0.30
V
V
IPDSAB
SAB1, SAB2 Pull-Down Current
VIN1 = VIN2 = VDIODE = 0.4V, V + = 10V (Note 3)
VIN1 = VIN2 = 0.4V, VDIODE = 2V
5
30
20
140
35
300
µA
µA
ITIMER
Timer Source Current
VIN1 = 0.4V, VIN2 = VDIODE = 2V, VTIMER = 0V,
VSENSE + – VSENSE – = 300mV
●
3
6
9
µA
VTIMER
Timer Latch Threshold Voltage
VIN1 = 0.4V, VIN2 = VDIODE = 2V
●
1.05
1.16
1.25
t ON
Gate Drive Rise Time
CGS = 1000pF, VSAB1 = VSAB2 = 0V (Note 6)
33
µs
t OFF
Gate Drive Fall Time
CGS = 1000pF, VSAB1 = VSAB2 = 5V (Note 6)
2
µs
t D1
Gate Drive Turn-On Delay
CGS = 1000pF, VSAB1 = VSAB2 = 0V (Note 6)
22
µs
t D2
Gate Drive Turn-Off Delay
CGS = 1000pF, VSAB1 = VSAB2 = 5V (Note 6)
1
µs
fOVGG
VGS Regulator Operating Frequency
30
kHz
IBSENSE
2
+
SENSE +
+=
–=
V
LTC1473L
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD)(150°C/W)
Note 3: Some tests are performed under more stringent conditions to
ensure reliable operation over the entire supply voltage range.
Note 4: Digital inputs include: IN1, IN2 and DIODE.
Note 5: IS increases by the same amount as IBSENSE+ + IBSENSE– when
their common mode falls below 5V.
Note 6: Gate turn-on and turn-off times are measured with no inrush
current limiting, i.e., VSENSE = 0V. Gate rise times are measured from 1V to
4.5V and fall times are measured from 4.5V to 1V. Delay times are
measured from the input transition to when the gate voltage has risen or
fallen to 3V. Results are not tested, but guaranteed by design.
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TYPICAL PERFOR A CE CHARACTERISTICS
DC Supply Current
vs Supply Voltage
250
DC Supply Current
vs Temperature
140
VSENSE + = VSENSE – = V +
DC Supply Current vs VSENSE
400
V + = 5V
130
100
VDIODE = 5V
VIN1 = VIN2 = 0V
50
0
0
1
2
3
4
5
6
7
8
9
VDIODE = VIN1 = 5V
VIN2 = 0V
100
90
80
0
– 25
25
50
0
TEMPERATURE (°C)
5.7
5.6
5.5
5.4
5.3
5.2
5.1
– 60 – 40 –20 0
20 40 60
TEMPERATURE (°C)
80 100
1473 G04
75
0
100
1
2 3 4 5 6 7 8
VSENSE COMMON MODE (V)
Undervoltage Lockout Threshold (V +)
vs Temperature
2.75
9.0
8.9
2.60
START-UP
THRESHOLD
2.55
2.50
2.45
SHUTDOWN
THRESHOLD
2.40
2.35
V + = 5V
VGS = VGG – V +
8.8
8.7
8.6
8.5
8.4
8.3
8.2
2.30
2.25
– 60 –40 –20 0 20 40 60
TEMPERATURE (°C)
10
VGS Gate Supply Voltage
vs Temperature
2.70
2.65
9
1473 G03
1473 G02
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
VGS GATE-TO-SOURCE ON VOLTAGE (V)
5.8
150
50
VGS Gate-to-Source ON Voltage
vs Temperature
5.9
200
60
1473 G01
V + = VSAB = 10V
250
100
SUPPLY VOLTAGE (V)
6.0
300
70
50
– 50
10
SUPPLY CURRENT (µA)
150
120
110
VGS GATE SUPPLY VOLTAGE (V)
VDIODE = VIN1 = 5V
VIN2 = 0V
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
200
V+ = 5V
VDIODE = VIN1 = 5V
VIN2 = 0V
VSENSE+ – VSENSE– = 0V
350
80
100
1473 G05
8.1
20 40 60
– 60 – 40 – 20 0
TEMPERATURE (°C)
80
100
1473 G06
3
LTC1473L
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TYPICAL PERFOR A CE CHARACTERISTICS
2.0
1.8
45
V + = 5V
CLOAD = 1000pF
VSAB = 5V
GATE FALL
TIME
1.6
1.4
1.2
TURN-OFF
DELAY
1.0
0.8
0.6
0.4
20 40 60
–60 –40 – 20 0
TEMPERATURE (°C)
80
V + = 5V
CLOAD = 1000pF
VSAB = 0V
40
35
40
35
GATE RISE
TIME
30
TURN-ON
DELAY
25
20
15
10
10
FALL TIME
VSAB = 5V
10
100
100
1000
GATE CAPACITIVE LOADING (pF)
TIMER LATCH THRESHOLD VOLTAGE (V)
1.28
1.6
1.4
V + = 10V
1.0
V + = 2.8V
0.6
0.4
0.2
80
V + = 5V
1.26
1.24
1.22
1.20
1.18
1.16
1.14
1.12
1.10
– 50
100
– 25
25
50
75
0
TEMPERATURE (°C)
100
1473 G10
SENSE Pin Source Current
(IBSENSE) vs VSENSE
300
V + = 5V
TIMER = 0V
7.5
7.0
6.5
6.0
5.5
5.0
150
100
50
– 50
– 25
25
50
75
0
TEMPERATURE (°C)
100
125
1473 G12
4
200
0
4.5
4.0
– 50
V+ = 5V
VDIODE = VIN1 = 5V
VIN2 = 0V
VSENSE+ – VSENSE– = 0V
250
SENSE PIN CURRENT (µA)
TIMER SOURCE CURRENT (µA)
8.0
125
1473 G11
Timer Source Current
vs Temperature
8.5
10000
1473 G08
Timer Latch Threshold Voltage
vs Temperature
2.0
0
– 60 –40 –20 0 20 40 60
TEMPERATURE (°C)
15
1473 G08
1.8
0.8
20
0
80
Logic Input Threshold Voltage
vs Temperature
1.2
25
5
0
20 40 60
– 60 – 40 – 20 0
TEMPERATURE (°C)
100
RISE TIME
VSAB = 0V
30
5
1473 G07
INPUT THRESHOLD VOLTAGE (V)
Rise and Fall Time
vs Gate Capacitive Loading
RISE AND FALL TIME (µs)
2.2
Turn-On Delay and Gate Rise Time
vs Temperature
TURN-ON DELAY AND GATE RISE TIME (µs)
TURN-OFF DELAY AND GATE FALL TIME (µs)
Turn-Off Delay and Gate Fall Time
vs Temperature
0
1
2
3
4 5 6
VSENSE (V)
7
8
9
10
1473 G13
LTC1473L
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PI FU CTIO S
IN1 (Pin 1): Logic Input of Gate Drivers GA1 and GB1. IN1
is disabled when IN2 is high or DIODE is low. During
2-diode mode, asserting IN1 disables the fault timer
function.
SW (Pin 7): Open Drain of an Internal N-Channel MOSFET
Switch. This pin drives the bottom of the VGG switching
regulator inductor which is connected between this pin and
the V+ pin.
IN2 (Pin 2): Logic Input of Gate Drivers GA2 and GB2. IN2
is disabled when IN1 is high or DIODE is low. During
2-diode mode, asserting IN2 disables the fault timer
function.
GND (Pin 8): Ground.
DIODE (Pin 3): “2-Diode Mode” Logic Input. Diode overrides IN1 and IN2 by forcing the two back-to-back
external N-channel MOSFET switches to mimic two diodes.
SAB2 (Pin 10): Source Return. The SAB2 pin is connected
to the sources of SW A2 and SW B2. A small pull-down
current source returns this node to 0V when the switches
are turned off.
TIMER (Pin 4): Fault Timer. A capacitor connected from
this pin to GND programs the time the MOSFET switches
are allowed to be in current limit. To disable this function,
Pin 4 can be grounded.
SENSE – (Pin 12): Inrush Current Input. This pin should be
connected directly to the bottom (output side) of the low
valued resistor in series with the two input power selector
switch pairs, SW A1/B1 and SW A2/B2, for detecting and
controlling the inrush current into and out of the power
supply sources and the output capacitor.
V+ (Pin 5): Power Supply. Bypass this pin with at least a
1µF capacitor.
VGG (Pin 6): Gate Driver Supply. This high voltage supply
is intended only for driving the internal micropower gate
drive circuitry. Do not load this pin with any external
circuitry. Bypass this pin with at least 1µF.
GB2, GA2 (Pins 9, 11): Switch Gate Drivers. GA2 and GB2
drive the gates of the second back-to-back external
N-channel switches.
SENSE + (Pin 13): Inrush Current Input. This pin should be
connected directly to the top (switch side) of the low
valued resistor in series with the two input power selector
switch pairs, SW A1/B1 and SW A2/B2, for detecting and
controlling the inrush current into and out of the power
supply sources and the output capacitor. Current limit is
invoked when (VSENSE + – VSENSE –) exceeds ±0.2V.
Pin Function Table
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
IN1
IN2
DIODE
TIMER
V+
VGG
SW
GND
GB2
SAB2
GA2
SENSE –
SENSE +
GB1
SAB1
GA1
DESCRIPTION
Logic Input of Gate Drivers GA1 and GB1
Logic Input of Gate Drivers GA2 and GB2
“2-Diode Mode” Logic Input
Fault Timer Programs Time in Current Limit
Power Supply
Gate Driver Supply
Switch Node of Internal Boost Switching Regulator
Ground
Switch Gate Driver for Switch B2
Source Return of Switch 2
Switch Gate Driver for Switch A2
Inrush Current Input, Low Side
Inrush Current Input, High Side
Switch Gate Driver for Switch B1
Source Return of Switch 1
Switch Gate Driver for Switch A1
NOMINAL (V)
TYP
MAX
1
2
1
2
1
2
1.16
2.8
9
10.2
20
0
20
0
0
17
0
10
0
17
0
10
0
10
0
17
0
10
0
17
MIN
0.4
0.4
0.4
ABSOLUTE MAX (V)
MIN
MAX
– 0.3
7
– 0.3
7
– 0.3
7
– 0.3
5
– 0.3
10
– 0.3
20
– 0.3
20
0
0
– 0.3
20
– 0.3
10
– 0.3
20
– 0.3
10
– 0.3
10
– 0.3
20
– 0.3
10
– 0.3
20
5
LTC1473L
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PI FU CTIO S
GB1, GA1 (Pins 14, 16): Switch Gate Drivers. GA1 and GB1
drive the gates of the first back-to-back external N-channel
switches.
SAB1 (Pin 15): Source Return. The SAB1 pin is connected
to the sources of SW A1 and SW B1. A small pull-down
current source returns this node to 0V when the switches
are turned off.
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16 GA1
SW A1/B1
GATE
DRIVERS
IN1
1
IN2
2
DIODE
15 SAB1
14 GB1
13 SENSE +
INRUSH
CURRENT
SENSE
12 SENSE –
3
11 GA2
V+
SW A2/B2
GATE
DRIVERS
6µA
10 SAB2
9 GB2
TIMER
4
TO
GATE
DRIVERS
V+
5
VGG
6
SW
7
R
S
900k
VGG
SWITCHING
REGULATOR
GND
LATCH
+
–
1.16V
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1473 FD
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LTC1473L
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OPERATIO
The LTC1473L is responsible for low-loss switching and
isolation for a dual supply system, where during a power
backup situation, a battery pack can be connected or
disconnected seamlessly. Smooth switching between input power sources is accomplished with the help of
low-loss N-channel switches. They are driven by special
gate drive circuitry which limits the inrush current in and
out of the battery packs and the system power supply
capacitors.
Figure 2 shows a block diagram of a switch driver pair, SW
A1/B1. A bidirectional current sensing and limiting circuit
determines when the voltage drop across RSENSE reaches
±200mV. The gate-to-source voltage, VGS, of the appropriate switch is limited during the transition period until
the inrush current subsides.
This scheme allows capacitors and MOSFET switches of
differing sizes and current ratings to be used in the same
system without circuit modifications.
All N-Channel Switching
DCIN
The LTC1473L drives external back-to-back N-channel
MOSFET switches to direct power from two sources: the
primary battery and the secondary battery, or a battery and
a DC power supply. (N-channel MOSFET switches are
more cost effective and provide lower voltage drops than
their P-channel counterparts.)
LTC1473L
V+
L1
1mH
(8.5V + V +)
TO GATE
DRIVERS
VGG
Gate Drive (VGG) Power Supply
VGG
SWITCHING
REGULATOR
C2
1µF
25V
GND
1473 F01
Figure 1. VGG Switching Regulator
SW B1
SW A1
RSENSE
OUTPUT
LOAD
BAT1
+
COUT
GA1
6V
SAB1
6V
VGG
SW A/B
GATE
DRIVERS
Inrush and Short-Circuit Current Limiting
The LTC1473L uses an adaptive inrush current limiting
scheme to reduce current flowing in and out of the battery
and the following system’s input capacitor during switchover transitions. The voltage across a single small valued
resistor, RSENSE, is measured to ascertain the instantaneous current flowing through either of the two switch
pairs, SW A1/B1 and SW A2/B2, during the transitions.
C1
1µF
25V
SW
The gate drive for the low-loss N-channel switches is
supplied by an internal micropower boost regulator which
is regulated at approximately 8.5V above V +, up to 20V
maximum. In a DC supply and backup battery system, the
LTC1473L V + pin is diode ORed through two external
Schottky diodes connected to the two main power sources,
DCIN and BAT1. Thus, VGG is regulated at 8.5V above the
higher power source and will provide the overdrive
required to fully enhance the MOSFET switches.
For maximum efficiency the input to the boost regulator
inductor is connected to V + as shown in Figure 1. C1
provides filtering to the input of the 1mH switched inductor, L1, which is housed in a small surface mount package.
An internal diode directs the current from the 1mH inductor to the VGG output capacitor C2.
BAT1
GB1
VSENSE +
VSENSE –
± 200mV
THRESHOLD
BIDIRECTIONAL
INRUSH CURRENT
SENSING AND
LIMITING
LTC1473L
1473 F02
Figure 2. SW A1/B1 Inrush Current Limiting
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LTC1473L
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APPLICATIO S I FOR ATIO
After the transition period, the VGS of both MOSFETs in the
selected switch pair rises to approximately 5.6V. The gate
drive is set at 5.6V to provide ample overdrive for logiclevel MOSFET switches without exceeding their maximum
VGS rating.
In the event of a fault condition, the current limit loop limits
the inrush of current into the short. At the instant the
MOSFET switch is in current limit, i.e., when the voltage
drop across RSENSE is ±200mV, a fault timer starts timing.
It will continue to time as long as the MOSFET switch is in
current limit. Eventually the preset time will lapse and the
MOSFET switch will latch off. The latch is reset by deselecting the gate drive input. Fault time-out is programmed
by an external capacitor connected between the TIMER pin
and ground.
Each of the switches is controlled by a logic compatible
input that can interface directly with a digital pin.
Using Tantalum Capacitors
The inrush (and “outrush”) current of the load capacitor is
limited by the LTC1473L, i.e., the current flowing both in
and out of the capacitor during transitions from one input
power source to another is limited. In many applications,
this inrush current limiting makes it feasible to use lower
cost/size tantalum surface mount capacitors in place of
more expensive/larger aluminum electrolytics.
Note: The capacitor manufacturer should be consulted for
specific inrush current specifications and limitations and
some experimentation may be required to ensure compliance with these limitations under all possible operating
conditions.
POWER PATH SWITCHING CONCEPTS
Back-to-Back Switch Topology
Power Source Selection
The LTC1473L drives low-loss switches to direct power
from either the battery pack or the DC supply during power
backup situations.
Figure 3 is a conceptual block diagram that illustrates the
main features of an LTC1473L dual supply power management system starting with a 4 NiMH battery pack and a 5V/
3.3V DC supply and ending with an uninterrupted output
load. Switches SW A1/B1 and SW A2/B2 direct power
from either the DC supply or the battery to the output load.
The simple SPST switches shown in Figure 3 actually
consist of two back-to-back N-channel switches. These
low-loss N-channel switch pairs are housed in 8-pin SO or
SSOP packaging and are available from a number of
manufacturers. The back-to-back topology eliminates the
problems associated with the inherent body diodes in
power MOSFET switches and allows each switch pair to
block current flow in either direction when the two switches
are turned off.
SW A1/B1
INRUSH
CURRENT
LIMITING
DCIN
5V/3.3V
SW A2/B2
BAT1
4 NiMH
+
CLOAD
LTC1473L
1473 F03
Figure 3. LTC1473L PowerPath Conceptual Diagram
8
LTC1473L
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APPLICATIO S I FOR ATIO
sources, DCIN and BAT1 through two common cathode
Schottky diodes as shown in Figure 1.)
The back-to-back topology also allows for independent
control of each half of the switch pair which facilitates
bidirectional inrush current limiting and the so-called
“2-diode mode” described in the following section.
The 2-diode mode is asserted by applying an active low to
the DIODE input.
The 2-Diode Mode
COMPONENT SELECTION
Under normal operating conditions, both halves of each
switch pair are turned on and off simultaneously. For
example, when the input power source is switched from
BAT1 to DCIN in Figure 4, both gates of switch pair SW
A1/B1 are normally turned off and both gates of switch pair
SW A2/B2 are turned on. The back-to-back body diodes in
switch pair, SW A1/B1, block current flow in or out of the
BAT1 input connector.
N-Channel Switches
The LTC1473L adaptive inrush limiting circuitry permits
the use of a wide range of logic-level N-Channel MOSFET
switches. A number of dual low RDS(ON) N-channel switches
in 8-lead surface mount packages are available that are
well suited for LTC1473L applications.
The maximum allowable drain-source voltage, VDS(MAX),
of the two switch pairs, SW A1/B1 and SW A2/B2 must be
high enough to withstand the maximum input DC supply
voltage. Since the DC supply is in the 3.3V to 10V range,
12V MOSFET switches will suffice.
In the “2-diode mode,” only the first half of each power
path switch pair, i.e., SW A1 and SW A2, is turned on; and
the second half, i.e., SW B1 and SW B2, is turned off. These
two switch pairs now act simply as two diodes connected
to the two main input power sources as illustrated in
Figure 4. The power path diode with the highest input
voltage passes current through to the output load to
ensure that the output is powered even under start-up or
abnormal operating conditions. (An undervoltage lockout
circuit defeats this mode when the V + pin drops below
2.5V. The supply to V + comes from the main power
As a general rule, select the switch with the lowest
RDS(ON) at the maximum allowable VDS. This will minimize the heat dissipated in the switches while increasing
the overall system efficiency. Higher switch resistances
can be tolerated in some systems with lower current
requirements, but care should be taken to ensure that the
SW B1
RSENSE
SW A1
OUTPUT
LOAD
BAT1
ON
SW B2
+
CIN
OFF
SW A2
DCIN
ON
OFF
LTC1473L
1473 F04
Figure 4. LTC1473L PowerPath Switches in 2-Diode Mode
9
LTC1473L
U
W
U
U
APPLICATIO S I FOR ATIO
power dissipated in the switches is never allowed to rise
above the manufacturers’ recommended level.
Inrush Current Sense Resistor, RSENSE
A small valued sense resistor (current shunt) is used by
the two switch pair drivers to measure and limit the inrush
or short-circuit current flowing through the conducting
switch pair.
The inrush current limit should be set at approximately 2×
or 3× the maximum required output current. For example,
if the maximum current required by the DC/DC converter
is 2A, an inrush current limit of 6A is set by selecting a
0.033Ω sense resistor, RSENSE, using the following
formula:
RSENSE = (200mV)/IINRUSH
Note that the voltage drop across the resistor in this
example is only 66mV under normal operating conditions.
Therefore, the power dissipated in the resistor is extremely small (132mW), and a small 1/4W surface mount
resistor can be used in this application (the resistor will
tolerate the higher power dissipation during current limit
for the duration of the fault time-out). A number of small
valued surface mount resistors are available that have
been specifically designed for high efficiency current
sensing applications.
Programmable Fault Timer Capacitor, CTIMER
A fault timer capacitor, CTIMER, is used to program the time
duration the MOSFET switches are allowed to be in current
limit continuously. This feature can be disabled by either
grounding the TIMER pin or asserting DIODE low and
asserting either IN1 or IN2 high.
In the event of a fault condition, the MOSFET switch is
driven into current limit by the inrush current limit loop.
The MOSFET switch operating in current limit is in a high
dissipation mode and can fail catastrophically if not
promptly terminated.
The fault time delay is programmed with an external
capacitor connected between the TIMER pin and GND. At
10
the instant the MOSFET switch enters current limit, a 6µA
current source starts charging CTIMER through the TIMER
pin. When the voltage across CTIMER reaches 1.16V an
internal latch is set and the MOSFET switch is turned off.
To reset the latch, the logic input of the MOSFET gate
driver must be deselected.
The fault time delay should be programmed as large as
possible, at least 3× to 5× the maximum switching transition period, to avoid prematurely tripping the protection
circuit. Conversely, for the protection circuit to be effective, the fault time delay must be within the safe operating
area of the MOSFET switches as stated in the manufacturer’s
data sheet.
The maximum switching transition period happens during
a cold start, when a fully charged battery is connected to
an unpowered system. The inrush current charging up the
system supply capacitor to the battery voltage determines
the switching transition period.
The following example illustrates the calculation of CTIMER.
Assume the maximum battery voltage is 10V, the system
supply capacitor is 100µF, the inrush current limit is 6A
and the maximum current required by the following system is 2A. Then, the maximum switching transition period
is calculated using the following formula:
tSW(MAX) =
(VBAT(MAX) )(CIN(SYSTEM) )
IINRUSH − ILOAD
(10)(100µF ) = 250µs
tSW(MAX) =
6 A − 2A
Multiplying 3 by 250µs gives 0.75ms, the minimum fault
delay time. Make sure this delay time does not fall outside
of the safe operating area of the MOSFET switch dissipating 30W (6A • 10V/2). Using this delay time the CTIMER can
be calculated using the following formula:
 6µA 
CITMER = 0.75ms 
 = 3879pF
 1.16V 
Therefore, CTIMER can be 3900pF.
LTC1473L
U
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U
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APPLICATIO S I FOR ATIO
VGG Regulator Inductor and Capacitors
The VGG regulator provides a power supply voltage significantly higher than either of the two main power source
voltages to allow the control of N-channel MOSFET
switches. This micropower, step-up voltage regulator is
powered by the higher potential available from the two
main power sources for maximum regulator efficiency.
Three external components are required by the VGG regulator: L1, C1 and C2, as shown in Figure 5.
L1 is a small, low current, 1mH surface mount inductor. C1
provides filtering to the input of the 1mH switched inductor and should be at least 1µF to filter switching transients.
The VGG output capacitor, C2, provides storage and filtering for the VGG output and should be at least 1µF and rated
for 25V operation. C1 and C2 can be ceramic capacitors.
DCIN
LTC1473L
BAT1
V+
L1*
1mH
TO GATE
DRIVERS
(8.5V + V +)
VGG
C1
1µF
25V
SW
VGG
SWITCHING
REGULATOR
C2
1µF
25V
GND
*COILCRAFT 1812LS-105 XKBC. (708) 639-6400
1473 F05
Figure 5. VGG Step-Up Switching Regulator
11
LTC1473L
U
TYPICAL APPLICATIO S
LTC1473L with Battery Charger
DCIN
3.3V
C3
22µF
25V
C2**
22µF
VIN
SYNC
AND/OR
SHDN
S/S
Si9926DY
L1A*
C5
0.1µF
R5
1k
100mA
VSW
LT®1512
GND GND
D1
MBRS130LT3
BAT54C
FB
VC IFB
1
L1B*
R4
24Ω
C4
0.22µF
R1
47.55k
R3
1Ω
C1
22µF
25V
LOGIC
DRIVEN
R2
12.45k
2
3
4
5
CTIMER
2000pF
6
1mH
*L1A, L1B ARE TWO 33µH WINDINGS ON A
SINGLE INDUCTOR: COILTRONICS CTX33-3
**TOKIN CERAMIC 1E22ZY5U-C203-F
1µF
7
8
1µF
LTC1473L
IN1
GA1
IN2
SAB1
DIODE
GB1
TIMER
+
V
+
SENSE
SENSE –
VGG
GA2
SW
SAB2
GND
GB2
16
15
14
RSENSE
0.04Ω
13
+
12
COUT
11
10
9
1473 TA03
BAT1
4 NiMH
12
3.3V OR
VBAT1
Si9926DY
LTC1473L
U
TYPICAL APPLICATIO S
2-Cell Li-Ion to 5V/3.5A DC/DC Converter with Battery Charger and Automatic Switchover Between Battery and DCIN
C2, 0.1µF
COSC
51pF
1
CSS, 0.1µF
RC, 33k
TG
RUN/SS
3
CC2, 220pF
C1
100pF
COSC
2
BOOST
ITH
SW
16
15
14
SFB
C4
0.1µF
D1
CMDSH-3
13
LTC1735
12
INTVCC
SGND
11
6
BG
VOSENSE
10
7
–
SENSE
PGND
9
8 SENSE +
EXTVCC
5V
4
CC
470pF
VIN
L1*
10µH
5
C5
1000pF
CIN
22µF
30V
OS-CON
+
M1
Si4412DY
+
C3
4.7µF
16V
M2
Si4412DY
RSENSE
0.015Ω
COUT
100µF
10V
×3
D2
MBRS140T3
VOUT
5V/3.5A
+
R1
105k
1%
C6
100pF
SGND
R2
20k
1%
Si9926DY
74C00
13
11
BAT54C
1
12
2
3
10
7
8
4
6
3
9
1
2
5
2600pF
CTIMER
5
4
14
R5
500k
6
C7
1µF
C8
1µF
7
L2**
1mH
8
LTC1473L
IN1
GA1
IN2
SAB1
16
15
14
DIODE
GB1
TIMER
SENSE +
13
V+
SENSE –
12
VGG
GA2
SW
SAB2
GND
GB2
RSENSE
0.033Ω
11
10
9
DCIN
D4
MBRD340
D3
6.8V
Si9926DY
RSENSE
0.033Ω
D5
MBRD340
R14
510Ω
1
R6
900k
1%
R7
130k
1%
R8
427k
1%
R9
113k
1%
OUT A
OUT B
2
V–
3
IN + A
REF
IN – B
HYST
4
LTC1442
C10
1µF
8
5
2,3
L3***
20µH
7
V+
6
1
R10
50k
1%
R11
1132k
1%
1,4
R12
3k
1%
C9
0.1µF
C11
0.47µF
D6
MBR0540T
2
3
4
5
6
7
R13
5.1k
1%
8
9
*SUMIDA CDRH125-10
**COILCRAFT 1812LS-105XKBC
***COILTRONICS CTX20-4
10
11
12
C16
220pF
GND
GND
SW
GND
BOOST
VCC1
GND
VCC2
GND
VCC3
UV
GND
PROG
LT1511
VC
OVP
UVOUT
CLP
GND
CLN
COMP2
COMP1
BAT
SENSE
SPIN
24
23
C12
10µF
22
21
C13
10µF
20
19
18
17
R15
1k
16
C15
0.33µF
15
+
C17
10µF
13
R19
200Ω
1%
R18, 200Ω, 1%
R20
395k
0.1%
R21
164k
0.1%
R17
4.93k
14
RSENSE
0.033Ω
8.4V
Li-Ion
BATTERY
R16
300Ω
C14
1µF
1473 TA04
13
LTC1473L
U
TYPICAL APPLICATIO S
Automatic PowerPath Switching for 3.3V Applications
DCIN
3.3V
Si4966DY
R1
1.65M
1%
R2
1.13M
1%
LTC1442
3
7
+
1
6
–
BAT54C
5
1
2
+
3
8
4
4
–
5
1.182V
CTIMER
4700pF
2
6
1µF
1mH*
1µF
7
8
BAT1
4 NiMH
LTC1473L
IN1
GA1
IN2
SAB1
16
15
14
DIODE
GB1
TIMER
13
SENSE +
RSENSE
0.04Ω
+
12
SENSE –
11
GA2
10
SAB2
9
GB2
V+
VGG
SW
GND
COUT
1473 TA05
* COILCRAFT 18126S-105XKBC
Si4966DY
3.3V or 5V, 6A, PowerPath Switch
Si4966DY
DCIN
3.3V
1
BAT54C
LOGIC
DRIVEN
2
3
4
5
6
CTIMER
550pF
DCIN
5V
14
1mH
1µF
1µF
7
8
LTC1473L
IN1
GA1
IN2
SAB1
16
15
14
DIODE
GB1
TIMER
13
SENSE +
V+
VGG
SW
GND
RSENSE
0.015Ω
3.3V OR 5V
6A
+
12
SENSE –
11
GA2
10
SAB2
9
GB2
COUT
1473 TA06
Si4966DY
3.3V OR
VBAT1
LTC1473L
U
TYPICAL APPLICATIO S
Protected Hot SwapTM Switchover Between Two Supplies for Portable PC
DOCKING
CONNECTOR
5V
LONG PIN
100k
Q1
Si9926DY
SUPPLY V1
5V
D1
MMBD2838LT1
1
2
3
4
100k
5
C6
4700pF
6
C7
1µF
L1*, 1mH
C5
1µF
7
8
LTC1473L
IN1
GA1
IN2
SAB1
GB1
DIODE
15
14
R3
0.1Ω
+ 13
TIMER
SENSE
V+
SENSE –
GA2
VGG
16
SW
SAB2
GND
GB2
OUT
12
LONG PIN
11
10
9
SUPPLY V2
3.3V
Q2
Si9926DY
*1812LS-105XKBC,
COILCRAFT
ON
SHORT PIN
U
PACKAGE DESCRIPTIO
1473 • TA07
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196*
(4.801 – 4.978)
0.009
(0.229)
REF
16 15 14 13 12 11 10 9
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
1
0.015 ± 0.004
× 45°
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
2 3
4
5 6
7
8
0.004 – 0.0098
(0.102 – 0.249)
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.008 – 0.012
(0.203 – 0.305)
0.0250
(0.635)
BSC
GN16 (SSOP) 1098
Hot Swap is a trademark of Linear Technology Corporation
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC1473L
U
TYPICAL APPLICATIO
Protected Automatic Switchover Between Two Supplies
1
5V
LT1121-5
8
Q1
Si9926DY
3
SUPPLY V1
10k
1µF
1M
BAT54C
1M
3
+
8
LT1490
1
2
–
1
5
4
2
+
3
7
6
4
–
1M
5
C6
2600pF
1M
6
C7
1µF
10k
L1*, 1mH
C5
1µF
7
8
LTC1473L
IN1
GA1
IN2
SAB1
DIODE
GB1
16
15
14
R3
0.033Ω
+ 13
TIMER
SENSE
V+
SENSE –
VGG
GA2
SW
SAB2
GND
GB2
OUT
12
11
10
9
SUPPLY V2
Q2
Si9926DY
*1812LS-105XKBC, COILCRAFT
1473 • TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1155
Dual High Side Micropower MOSFET Driver
Internal Charge Pump Requires No External Components
LTC1161
Quad Protected High Side MOSFET Driver
Rugged, Designed for Harsh Environment
LTC1735
Single High Efficiency Synchronous DC/DC Controller
Constant Frequency, 3.5 ≤ VIN ≤ 36V, Fault Protection
LTC1473
Dual PowerPath Switch Driver
V + Range from 4.75V to 30V
LTC1479
PowerPath Controller for Dual Battery Systems
Designed to Interface with a Power Management µP
LT1505
Synchronous Battery Charger with Adapter Current Limit
High Efficiency, Up to 8A Charge Current, End-of-Charge Flag,
28-Pin SSOP, 0.5V Dropout Voltage
LT1510
Constant-Voltage/Constant-Current Battery Charger
Up to 1.5A Charge Current for Lithium-Ion, NiCd and NiMH Batteries
LT1511
3A Constant-Voltage/Constant-Current Battery Charger
High Efficiency, Minimal External Components to Fast Charge
Lithium, NiMH and NiCd Batteries
LTC1558/LTC1559
Backup Battery Controller with Programmable Output
Power Supply Backup Using a Single NiCd Cell
LTC1622
Current Mode Step-Down DC/DC Converter
550kHz Operation, 100% Duty Cycle, VIN from 2V to 10V
LTC1628
Dual High Efficiency Synchronous Buck DC/DC Controller
2-Phase Switching, 5V Standby in Shutdown, Fault Protection
LT1769
2A Constant-Voltage/Constant-Current Battery Charger
Charges Lithium, NiCd and NiMH Batteries, 28-Lead SSOP
16
Linear Technology Corporation
1473lf LT/TP 1099 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1999