CM1420, CM1422 LCD EMI Filter Array with ESD Protection Description The CM1420 and CM1422 are EMI filter arrays with ESD protection, which integrate six and eight Pi−filters (C−R−C), respectively. The CM1420/22 has component values of 15 pF − 100 − 15 pF. These devices include ESD protection diodes on every pin, which provide a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge (ESD). The ESD diodes connected to the filter ports safely dissipate ESD strikes of ±15 kV, well beyond the maximum requirement of the IEC 61000−4−2 international standard. Using the MIL−STD−883 (Method 3015) specification for Human Body Model (HBM) ESD, the pins are protected for contact discharges at greater than ±30 kV. This device is particularly well suited for portable electronics (e.g. wireless handsets, PDAs, notebook computers) because of its small package format and easy−to−use pin assignments. In particular, the CM1420/22 is ideal for EMI filtering and protecting data lines from ESD for the LCD display in clamshell handsets. The CM1420 and CM1422 incorporate OptiGuardt coating which results in improved reliability at assembly. The CM1420 and CM1422 are available in space−saving, low−profile chip scale packages with RoHS compliant lead−free finishing. http://onsemi.com WLCSP15 CP SUFFIX CASE 567BS WLCSP20 CP SUFFIX CASE 567BZ MARKING DIAGRAM N203 N223 CM1420 15−Bump CSP Package CM1422 20−Bump CSP Package N203 N223 = CM1420−03CP = CM1422−03CP Features • Functionally and Pin Compatible with CSPEMI606 (CM1420) and • • • • • • • • • CSPEMI608 (CM1422) Devices OptiGuardtCoated for Improved Reliability at Assembly Six and Eight Channels of EMI Filtering ±15 kV ESD Protection on Each Channel (IEC 61000−4−2 Level 4, Contact Discharge) ±30 kV ESD Protection on Each Channel (HBM) Better than 30 dB of Attenuation at 1 GHz to 3 GHz Chip Scale Package Features Extremely Low Lead Inductance for Optimum Filter and ESD Performance 15−Bump, 2.960 mm x 1.330 mm Footprint Chip Scale Package (CM1420) 20−Bump, 4.000 mm x 1.458 mm Footprint Chip Scale Package (CM1422) These Devices are Pb−Free and are RoHS Compliant ORDERING INFORMATION Device Package Shipping† CM1420−03CP CSP−15 (Pb−Free) 3500/Tape & Reel CM1422−03CP CSP−20 (Pb−Free) 3500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Applications • • • • • • LCD Data Lines in Clamshell Wireless Handsets EMI Filtering & ESD Protection for High−Speed I/O Data Ports Wireless Handsets / Cell Phones Notebook Computers PDAs / Handheld PCs EMI Filtering for High−Speed Data Lines © Semiconductor Components Industries, LLC, 2011 March, 2011 − Rev. 4 1 Publication Order Number: CM1420/D CM1420, CM1422 BLOCK DIAGRAM 100 FILTERn* FILTERn* 15 pF 15 pF GND (Pins B1−Bn) 1 of n EMI Filtering + ESD Channels (n = 6 for CM1420, 8 for CM1422) *See Package/Pinout Diagrams for expanded pin information. PACKAGE / PINOUT DIAGRAMS Orientation Marking Top View (Bumps Down View) + A 1 2 3 4 5 Bottom View (Bumps Up View) 6 C1 N203 B C3 B1 Orientation Marking C C2 C4 C5 B2 C6 B3 A1 A1 A2 A3 A4 A5 A6 C2 C3 C4 C5 C6 C7 CM1420 CSP Package Orientation Marking + A 1 2 4 3 5 6 7 8 C1 N223 B Orientation Marking C B1 A1 A1 B2 A2 A3 B3 A4 A5 C8 B4 A6 A7 A8 CM1422 CSP Package Table 1. PIN DESCRIPTIONS CM1420 CM1422 CM1420 CM1422 Pin(s) Pin(s) Name Pin(s) Pin(s) Name A1 A1 FILTER1 Filter Channel 1 C1 C1 FILTER1 Filter Channel 1 A2 A2 FILTER2 Filter Channel 2 C2 C2 FILTER2 Filter Channel 2 A3 A4 A3 FILTER3 Filter Channel 3 C3 C3 FILTER3 Filter Channel 3 A4 FILTER4 Filter Channel 4 C4 C4 FILTER4 Filter Channel 4 A5 A5 FILTER5 Filter Channel 5 C5 C5 FILTER5 Filter Channel 5 A6 A6 FILTER6 Filter Channel 6 C6 C6 FILTER6 Filter Channel 6 − A7 FILTER7 Filter Channel 7 − C7 FILTER7 Filter Channel 7 − A8 FILTER8 Filter Channel 8 − C8 FILTER8 Filter Channel 8 B1−B3 B1−B4 GND Device Ground Description http://onsemi.com 2 Description CM1420, CM1422 SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units −65 to +150 °C DC Power per Resistor 100 mW DC Package Power Rating 500 mW Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range Rating Units −40 to +85 °C Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol Parameter Conditions R Resistance C Capacitance At 2.5 V DC, 1 MHz, 30 mV AC VDIODE Min Typ Max 80 100 120 12 15 18 pF nA Diode Standoff Voltage IDIODE = 10 A 6.0 ILEAK Diode Leakage Current (reverse bias) VDIODE = 3.3 V 100 200 VSIG Signal Clamp Voltage Positive Clamp Negative Clamp ILOAD = 10 mA (Note 3) 6.8 −0.8 9.0 −0.4 VESD In−system ESD Withstand Voltage a) Human Body Model, MIL−STD−883, Method 3015 b) Contact Discharge per IEC 61000−4−2 Level 4 (Note 2) RDYN Dynamic Resistance Positive Negative fC 5.6 −1.5 R = 100 , C = 15 pF V V kV ±30 ±15 2.30 0.90 Cut−off Frequency ZSOURCE = 50 , ZLOAD = 50 Units 120 MHz 1. TA = 25 °C unless otherwise specified. 2. ESD applied to input and output pins with respect to GND, one at a time. 3. Clamping voltage is measured at the opposite side of the EMI filter to the ESD pin. For example, if ESD is applied to Pin A1, then clamping voltage is measured at Pin C1. http://onsemi.com 3 CM1420, CM1422 PERFORMANCE INFORMATION Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 1. Insertion Loss vs. Frequency (A1−C1 to GND B1) Figure 2. Insertion Loss vs. Frequency (A2−C2 to GND B1) http://onsemi.com 4 CM1420, CM1422 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 3. Insertion Loss vs. Frequency (A3−C3 to GND B2) Figure 4. Insertion Loss vs. Frequency (A4−C4 to GND B2) http://onsemi.com 5 CM1420, CM1422 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 5. Insertion Loss vs. Frequency (A5−C5 to GND B3) Figure 6. Insertion Loss vs. Frequency (A6−C6 to GND B3) http://onsemi.com 6 CM1420, CM1422 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 7. Insertion Loss vs. Frequency (A7−C7 to GND B4, CM1422 Only) Figure 8. Insertion Loss vs. Frequency (A8−C8 to GND B4, CM1422 Only) http://onsemi.com 7 CM1420, CM1422 PERFORMANCE INFORMATION (Cont’d) Figure 9. Filter Capacitance vs. Input Voltage over Temperature (normalized to capacitance at 2.5 VDC and 255C) http://onsemi.com 8 CM1420, CM1422 APPLICATION INFORMATION Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS Parameter Value Pad Size on PCB 0.240 mm Pad Shape Round Pad Definition Non−Solder Mask defined pads Solder Mask Opening 0.290 mm Round Solder Stencil Thickness 0.125 − 0.150 mm Solder Stencil Aperture Opening (laser cut, 5% tapered walls) 0.300 mm Round Solder Flux Ratio 50/50 by volume Solder Paste Type No Clean Pad Protective Finish OSP (Entek Cu Plus 106A) Tolerance − Edge To Corner Ball ±50 m Solder Ball Side Coplanarity ±20 m Maximum Dwell Time Above Liquidous 60 seconds Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste 260°C Non−Solder Mask Defined Pad 0.240 mm DIA. Solder Stencil Opening 0.300 mm DIA. Solder Mask Opening 0.290 mm DIA. Figure 10. Recommended Non−Solder Mask Defined Pad Illustration Temperature (5C) 250 200 150 100 50 0 1:00.0 2:00.0 3:00.0 Time (minutes) 4:00.0 Figure 11. Lead−free (SnAgCu) Solder Ball Reflow Profile http://onsemi.com 9 CM1420, CM1422 PACKAGE DIMENSIONS WLCSP15, 2.96x1.33 CASE 567BS−01 ISSUE O PIN A1 REFERENCE 2X D ÈÈ A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B E DIM A A1 A2 b D E eD eE 0.05 C 2X 0.05 C TOP VIEW A2 0.05 C A 0.05 C NOTE 3 A1 C SIDE VIEW SEATING PLANE eD/2 15X eD b 0.05 C A B 0.03 C eE C B A 1 2 3 4 5 6 7 8 9 BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* PACKAGE OUTLINE A1 0.87 0.44 15X 0.50 PITCH 0.25 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 10 MILLIMETERS MIN MAX 0.65 0.56 0.21 0.27 0.40 REF 0.29 0.35 2.96 BSC 1.33 BSC 0.50 BSC 0.435 BSC CM1420, CM1422 PACKAGE DIMENSIONS WLCSP20, 4.00x1.46 CASE 567BZ−01 ISSUE O PIN A1 REFERENCE 2X D ÈÈ ÈÈ A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. E DIM A A1 A2 b D E eD eE 0.05 C 2X 0.05 C TOP VIEW A2 0.05 C MILLIMETERS MIN MAX 0.56 0.65 0.21 0.27 0.40 REF 0.29 0.35 4.00 BSC 1.46 BSC 0.50 BSC 0.435 BSC A 0.05 C NOTE 3 A1 C SIDE VIEW SEATING PLANE eD/2 20X eD b 0.05 C A B 0.03 C eE C B A 1 2 3 4 5 6 7 8 9 10 11 12 BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* PACKAGE OUTLINE A1 0.87 0.44 20X 0.50 PITCH 0.25 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. OptiGuardt is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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