CCPD-575 Model 5×7.5 mm SMD, 3.3V, LVPECL CCPD-575 5×7.5mm SMD Ultra-Low Phase Noise LVPECL Clock Oscillator Model CCPD-575 has an industry leading phase noise for an LVPECL oscillator. The noise floor is typically @ -162 dBc/Hz! This is at least 15 dB lower phase noise than most LVPECL oscillators on the market today. Close-in phase noise is also excellent @ -90 dBc/Hz for the 100 MHz variant. This overall ultra-low phase noise translates to a typical phase jitter of 65 fs RMS (12 kHz to 20 MHz) at 156.250 MHz. 5×7.5mm SMD Applications: Digital Video SONET/SDH/DWDM Storage Area Networks Broadband Access Ethernet, Gigabit Ethernet Rev: S Date: 18-Jan-2017 Page 1 of 4 C CRYSTEK CORPORATION 12730 Commonwealth Drive • Fort Myers, Florida 33913 Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CCPD-575 Model 5×7.5 mm SMD, 3.3V, LVPECL CCPD-575 5×7.5mm SMD Ultra-Low Phase Noise LVPECL Clock Oscillator Frequency Range: 50.000 MHz to 156.250 MHz* *Standard Frequencies Frequency Stability Options: ±20ppm, ±25ppm, ±50ppm (MHz) Operating Temperature Range: -40°C to +85°C 80.000 100.000 -45°C to 90°C Storage Temperature Range: 122.880 3.3V ± 0.3V Input Voltage: 125.000 156.250 Input Current: 80mA Typical, 88mA Max Output: Differential LVPECL 40/60% Max @ zero crossing point Symmetry: Rise/Fall Time: 300 ps Max (20% to 80%) Logic Terminated to Vdd-2V into 50 Ω: “0”=1.37 Min, 1.74 Max Output Low Voltage: “1”=2.05 Min, 2.54 Max Output High Voltage: 200 ns Max Disable Time: 200 ms Max Enable Time: 65 fs RMS Typical @ 156.250 MHz Phase Jitter: 12kHz~20MHz Phase Noise: (See Plot Below) None Sub-harmonics: <3ppm 1st year, <1ppm every year thereafter Aging: Part Number Example: CCPD-575X-20-100.000 3.3V, -40/85°C, ±20ppm, 100.000 MHz 100.000 MHz LVPECL 3.3V Rev: S Date: 18-Jan-2017 Page 2 of 4 Specifications subject to change without notice. C CRYSTEK CORPORATION 12730 Commonwealth Drive • Fort Myers, Florida 33913 Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CCPD-575 Model 5×7.5 mm SMD, 3.3V, LVPECL CCPD-575 5×7.5mm SMD Ultra-Low Phase Noise LVPECL Clock Oscillator 122.880 MHz LVPECL 3.3V 156.250 MHz LVPECL 3.3V Rev: S Date: 18-Jan-2017 Page 3 of 4 C CRYSTEK CORPORATION 12730 Commonwealth Drive • Fort Myers, Florida 33913 Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com CCPD-575 5×7.5mm SMD Ultra-Low Phase Noise LVPECL Clock Oscillator CCPD-575 Model 5×7.5 mm SMD, 3.3V, LVPECL Mechanical: Shock: Solderability: Vibration: Solvent Resistance: Resistance to Soldering Heat: Environmental: Thermal Shock: Moisture Resistance: MIL-STD-883, Method 2002, Condition B MIL-STD-883, Method 2003 MIL-STD-883, Method 2007, Condition A MIL-STD-202, Method 215 MIL-STD-202, Method 210, Condition I or J MIL-STD-883, Method 1011, Condition A MIL-STD-883, Method 1004 RECOMMENDED REFLOW SOLDERING PROFILE Ramp-Up 3°C/Sec Max. Critical Temperature Zone TEMPERATURE 260°C Ramp-Down 6°C/Sec. 217°C 200°C 150°C Preheat 180 Secs. Max. 90 Secs. Max. 8 Minutes Max. 260°C for 10 Secs. Max. NOTE: Reflow Profile with 240°C peak also acceptable. 0.295 -0.008 +0.035 (7.50 -0.20 +0.89) CCPD-575X-TT Freq YYWW XX TT=Tolerance Dimensions inches (mm) All dimensions are Max unless otherwise specified. 0.200 ±0.015 (5.08 ±0.38) Denotes pad 1 YYWW=Date Code XX=Lot Code 0.099 (2.50) 0.050 (1.27) 0.01µF 6 0.058 (1.47) #1 #2 #3 #6 #5 #4 C 5 4 0.046 (1.16) 0.100 (2.54) 0.200 (5.08) CRYSTEK CORPORATION Function pin 1 Output pin Open or N/C "1" level 2.0V Min "0" level 0.8V Max Active Active High Z SUGGESTED PAD LAYOUT via to ground 0.046 (1.16) Enable/Disable 0.154 (3.91) 0.071 (1.80) 1 2 0.100 (2.54) 0.200 (5.08) 3 PIN Connection 1 2 3 4 5 6 Enable/Disable N/C GND Output Comp Output Vcc Rev: S Date: 18-Jan-2017 Page 4 of 4 12730 Commonwealth Drive • Fort Myers, Florida 33913 Phone: 239-561-3311 • 800-237-3061 Fax: 239-561-1025 • www.crystek.com