Micrel MIC2551ABML Usb transceiver Datasheet

MIC2551A
Micrel
MIC2551A
USB Transceiver
General Description
Features
The MIC2551A is a single chip transceiver that complies with
the physical layer specifications of the Universal Serial Bus
(USB) 2.0. It supports both full speed (12Mbps) and low
speed (1.5Mbps) operation and introduces superior edge
rate control, producing crisper eye diagrams, which ease the
task of passing USB compliance testing.
A unique, patented, dual supply voltage operation allows the
MIC2551A to reference the system I/F I/O signals to a supply
voltage down to 1.6V while independently powered by the
USB VBUS. This allows the system interface to operate at its
core voltage without addition of buffering logic and also
reduce system operating current.
• Compliant to USB Specification Revision 2.0 for full
speed (12Mbs) and low speed (1.5Mbps) operation
• Compliant to IEC-61000-4.2 (Level 3)
• Separate I/O supply with operation down to 1.6V
• Integrated speed select termination supply
• Very-low power consumption to meet USB suspendcurrent requirements
• Small TSSOP and MLF™ packages
• No power supply sequencing requirements
• Software controlled re-enumeration
Applications
• PDAs
• Palmtops
• Cell phones
Ordering Information
Part Number
Package
MIC2551ABTS
14-Pin TSSOP
MIC2551ABML
16-Pin MLF™
Typical Application
System
Supply Voltage
MIC2551A
VCC GPIO
USB SIE
Controller
VIF
VTRM
CON
OE#
RCV
VP
VBUS
VM
SPD
SUS
D–
VBUS
VPU
RS
20Ω/±1%
1.5k
D+
GND
RS
20Ω/±1%
1.0µF (min)
10µF (max)
D+
D–
GND
USB
Port
1µF
41206ESDA SurgX
(See “Applications Information”
for additional suppliers.)
Typical Application Circuit
MicroLeadFrame and MLF are trademarks of Amkor Technology.
SurgX is a registered trademark of Cooper Electronics Technologies.
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
May 2004
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MIC2551A
Micrel
VIF 1
NC
VIF
VBUS
VPU
Pin Configuration
14 VBUS
SPD 2
13 VPU
RCV 3
16 15 14 13
12 VTRM
VP 4
11 D+
1
12
VTRM
RCV
2
11
VP
VM
3
4
10
9
D+
D—
OE#
10 D-
CON 6
9 OE#
GND 7
8 SUS
5 6 7 8
CON
GND
SUS
NC
VM 5
SPD
14-Pin TSSOP
16-Pin MLF™ (ML)
Pin Description
Pin Number
Pin Number
MIC2551ABTS MIC2551ABML
Pin Name
I/O
Pin Function
1
15
VIF
I
System Interface Supply Voltage: Used to provide reference
supply voltage for system I/O interface signaling.
2
1
SPD
I
Edge Rate Control: A logic HIGH operates at edge rates for “full
speed” operation. A logic LOW operates edge rates for “low
speed” operation.
3
2
RCV*
O
Receive Data: Output for USB differential data.
4
3
VP*
I/O
If OE# = 1, VP = Receiver output (+)
If OE# = 0, VP = Driver input (+)
5
4
VM*
I/O
If OE# = 1 VM, = Receiver output (-)
If OE# = 0, VM = Driver input (-)
6
5
CON
I
7
6
GND
8
7
SUS
I
Suspend: Active-High. Turns off internal circuits to reduce supply
current.
9
9
OE#*
I
Output Enable: Active-Low. Enables the transceiver to transmit
data onto the bus. When inactive, the transceiver is in the receive
mode.
10/11
10/11
D–, D+*
I/O
Differential data lines conforming to the USB standard.
12
12
VTRM
O
3.3V Reference Supply Output: Requires a minimum 0.1µF
decoupling capacitor for stability. A 1µF capacitor is recommended
13
13
VPU
O
Pull-up Supply Voltage Output: Used to connect 1.5kΩ pull-up
speed detect resistor. If CON = 1, VPU is high impedance.
If CON = 0, VPU = 3.3V.
14
14
VBUS
I
USB Bus Supply Voltage: Used to power USB transceiver and
internal circuitry.
8,16
NC
CONNECT (Input): Controls state of VPU. Refer to VPU pin
description for detail.
Ground Reference.
No connect.
* See Table 1 for description of logic states.
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May 2004
MIC2551A
Micrel
SUS
OE#
D+, D–
RCV
VP/VM
Function
0
0
Driving
Active
Active
Normal transmit mode.
0
1
Receiving
Active
Active
Normal receive mode.
1
0
Hi-Z
0
Not active
1
1
Hi-Z
0
Active
Low power state.
Receiving during suspend (low power
state) (Note 1).
Note 1. During suspend VP and VM are active in order to detect out-of-band signaling conditions.
Table 1. Function Selection
OE# = 0:
Input
Output
Result
VP
VM
D+
D-
RCV
0
0
0
0
X
SE0
0
1
0
1
0
Logic 0
1
0
1
0
1
Logic 1
1
1
1
1
X
Undefined
OE# = 1:
Input
Output
Result
D+
D-
VP
VM
RCV
0
0
0
0
X
SE0
0
1
0
1
0
Logic 0
1
0
1
0
1
Logic 1
1
1
1
1
X
Undefined
X - Undefined
Table 2. Truth Table During Normal Mode
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Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 2)
Supply Voltage (VBUS) ................................................. 6.5V
All Other Inputs ............................................. –0.5V to 5.5V
Ambient Storage Temperature ................. –65°C to +150°C
Output Current (D+, D–) .......................................... ± 50mA
Output Current (all others) ....................................... ±15mA
Input Current ............................................................ ±50mA
ESD, Note 3
VBUS, D+, D– ........................................................ ±11KV
All other pins .......................................................... ±2KV
Supply Voltage (VBUS) ................................. 4.0V to 5.25V
Ambient Operating Temperature ................ –40°C to +85°C
Package Thermal Resistance
TSSOP (θJA) .................................................. 100(°C/W)
MLF (θJA) ......................................................... 59(°C/W)
DC Electrical Characteristics (System and USB Interface) (Note 7)
VIF = 3.6V, VBUS = 5V unless otherwise noted; TA = 25°C. bold indicates specifications over temperature, –40°C to 85°C.
Symbol
Parameter
VBUS
USB Supply Voltage
VIF
System I/F Supply Voltage
VIL
Max
Units
4.0
5.25
V
1.6
3.6
V
LOW-Level Input Voltage, Note 4
VIF – 0.3
0.15VIF
V
VIH
HIGH-Level Input Voltage, Note 4
0.85VIF
VIF + 0.3
V
VOH
HIGH-Level Output Voltage, Note 4
IOH = 20µA
VOL
LOW-Level Output Voltage, Note 4
IOL = 20µA
IIL
Input Leakage Current, Note 4
IIF
VIF Supply Current
IBUS
VBUS Supply Current
Conditions
Min
Typ
0.9VIF
V
0.1
V
5
µA
D+, D– are idle, OE# = SUS = 0
5
µA
D+, D– are idle, OE# = 0, SUS = 1
5
µA
–5
D+, D– active, CLOAD = 50pF,
SPD = 1, f = 6MHz, Note 5
450
650
µA
D+, D– active, CLOAD = 600pF
SPD = 0, f = 750kHz, Note 5
50
75
µA
VBUS = 5.25V, D+, D– are idle
SUS = 0, OE# = 1, SPD = 1
200
500
µA
VBUS = 5.25V, D+, D– are idle, SPD = 1
SUS = OE# = 0
3.3
5
mA
VBUS = 5.25V, D+, D– are idle
SUS = OE# = SPD = 0
500
700
µA
VBUS = 5.25V, D+, D– are idle, OE# = 1
SUS = SPD = 0
250
350
µA
VBUS = 5.25V, D+, D– active,
CLOAD = 50pF, SPD = 1
SUS = OE# = 0, f = 6MHz, Note 5
7.3
10
mA
VBUS = 5.25V, D+, D– active, CLOAD = 600pF
SPD = SUS = OE# = 0, f = 750kHz, Note 5
3.6
5
mA
IVPULEAK
VPU Leakage Current
CON = 1, VPU = 0V
–5
5
µA
IVIFLEAK
VIF Leakage Current
VIF = 3.6V, VBUS = 0V
–5
5
µA
VPU
Pull-Up Output Voltage
ITERM = 200µA, VBUS = 4.0 to 5.25V
3.0
3.6
V
RSW
Internal Pull-Up Termination Switch
ITERM = 10mA, VBUS = 4.0 to 5.25V
10
Ω
IEC-1000-4-2 Air Discharge
10 pulses
±8
kV
(D+, D–,
VBUS only)
10 pulses
±9
kV
3.3
ESD Protection
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MIC2551A
Micrel
DC Electrical Characteristics (Transceiver) (Note 7)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Hi-Z State Data Line Leakage
(Suspend Mode)
0V < VIN < 3.3V, SUS = 1
–10
10
µA
VDI
Differential Input Sensitivity
|(D+) – (D–)|
0.2
VCM
Differential Common Mode Range
Includes VDI range
0.8
2.5
V
VSE
Single-Ended Receiver Threshold
0.8
2.0
V
Leakage Current
ILO
Input Levels
Receiver Hysteresis
V
200
mV
Output Levels
VOL
Static Output Low
RL = 1.5kΩ to 3.6V
VOH
Static Output High
RL = 15kΩ to GND
CIN
Transceiver Capacitance
Pin to GND
ZDRV
Driver Output Resistance
Steady state drive
2.8
0.3
V
3.6
V
Capacitance
10
8
16
pF
24
Ω
AC Electrical Characteristics (Notes 6, 7)
Driver Characteristics (Low Speed)
TR
Transition Rise Time
Transition Fall Time
TF
TR, TF
Rise/Fall Time Matching
VCRS
Output Signal Crossover Voltage
CL = 50pF, Figure 2
CL = 600pF
75
ns
CL = 50pF, Figure 2
CL = 600pF
75
(TR, TF)
80
125
%
1.3
2.0
V
300
ns
300
Driver Characteristics (Full Speed)
TR
Transition Rise Time
CL = 50pF, Figure 2
4
20
ns
TF
Transition Fall Time
CL = 50pF, Figure 2
4
20
ns
TR, TF
Rise/Fall Time Matching
(TR, TF)
90
111.11
%
VCRS
Output Signal Crossover Voltage
1.3
2.0
V
15
ns
Transceiver Timing
tPVZ
OE# to RCVR Tri-State Delay
Figure 1
tPZD
Receiver Tri-State to Transmit Delay
Figure 1
tPDZ
OE# to DRVR Tri-State Delay
Figure 1
tPZV
Driver Tri-State to Receive Delay
Figure 1
tPLH
tPHL
VP, VM to D+, D– Propagation Delay
Figure 4
15
ns
tPLH
tPHL
D+, D– to RCV Propagation Delay
Figure 3
15
ns
tPLH
tPHL
D+, D– to VP, VM Propagation Delay
Figure 3
8
ns
15
15
15
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
Note 4.
Specification applies to the following pins: SUS, SPD, RCV, CON, RCV, VP, VM, OE#.
Note 5.
Characterized specification(s), but not production tested.
Note 6.
All AC parameters guaranteed by design but not production tested.
Note 7.
Specification for packaged product only.
May 2004
ns
5
ns
ns
M9999-051004
MIC2551A
Micrel
Timing Diagrams
RECEIVE
TRANSMIT
OE#
tPVZ
tPZV
VP/VM
tPZD
tPDZ
D+/D–
Figure 1. Enable and Disable Times
Rise Time
Differential
Data Lines
Fall Time
90%
90%
10%
10%
tR
tF
Figure 2. Rise and Fall Times
D+
Differential
Data Lines
VCRS
D–
VCRS
tPHL
tPLH
VOH
VOL
VSS
Figure 3. Receiver Propagation Delay
VOH
VOL
D+
tPLH
tPHL
Differential
Data Lines
VCRS
D–
VCRS
Figure 4. Driver Propagation Delay
Test Circuits
D.U.T.
25pF
Figure 5. Load for VP, VM, RCV
VTRM
1.5k
D.U.T.
20Ω
15k
CL
Figure 6. Load for D+, D–
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MIC2551A
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Functional Diagram
To Internal
Circuitry
LDO
Regulator
VBUS
VIF
VTERM
VPU
CON
D+
SPD
OE#
D–
Level
Translator
RCV
VP
VM
SUS
GND
MIC2551A
Applications Information
The MIC2551A is designed to provide USB connectivity in
mobile systems where available system supply voltages are
not able to satisfy USB requirements. The MIC2551A can
operate down to supply voltages of 1.6V and still meet USB
physical layer specifications. As shown in the circuit above,
the MIC2551A takes advantage of the USB supply voltage,
VBUS, to operate the transceiver. The system voltage, VIF, is
used to set the reference voltage used by the digital I/O lines
interfacing to the system controller. Internal circuitry provides
translation between the USB and system voltage domains.
VIF will typically be the main supply voltage rail for the
controller.
May 2004
In addition, a 3.3V, 10% termination supply voltage, (VPU), is
provided to support speed selection. VPU can be disabled or
enabled under software control via the CON input. This
allows for software-controlled connect or disconnect states.
A 1.5k resistor is required to be connected between this pin
and the D+ or D– lines to respectively specify high speed or
low speed operation.
The use of ESD transient protection devices is not required
for operation, but is recommended. The MIC2551A is ESD
rated for 11kV at the VBUS and D+, D– pins and 2kV for all
other pins.
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Micrel
Power Supply Configuration
The MIC2551A can be set up for different power supply
configurations which modify the behavior of the device. Both
VBUS and VIF have special thresholds that detect when they
are either removed or grounded. Table 3 depicts the behavior
under the different power supply configuration scenarios that
are explained below.
Signal Amplitude Respective to VIF
When operating the MIC2551A, it is necessary to provide
input signals which do not exceed VIF + 0.3V.
Suspend
When the suspend pin (SUS) is high, power consumption is
reduced to a minimum. VTRM is not disabled. RCV, VP and VM
are still functional to enable the device to detect USB activity.
For minimal current consumption in suspend mode, it is
recommended that OE# = 1, and SPD = 0.
Speed
The speed pin (SPD) sets D+/D– output edge rates by increasing or decreasing biasing current sources within the output
drivers. For low speed, SPD = 0. For full speed, SPD = 1. By
setting SPD = 0 during idle periods, in conjunction with suspend
(SUS), the lowest quiescent current can be obtained. However,
designers must provide a 300ns delay between changing SPD
from 0 to 1 and transmission of data at full speed. This delay
ensures the output drivers have arrived at their proper operating
conditions. Failure to do so can result in leading edge distortion
on the first few data bits transmitted.
External ESD Protection
The use of ESD transient protection devices is not required
for operation, but is recommended. We recommend the
following devices or the equivalent:
Cooper Electronic Technologies (www.cooperet.com)
41206ESDA SurgX
0805ESDA SurgX
Normal Mode
VBUS is connected to the 5.0V USB bus voltage and VIF is
connected to a supply voltage in the range of 1.6V to 3.6V. In
this case VTRM supplies a 3.3V voltage for powering the
speed select resistor via VPU depending on the state of CON
pin.
Disconnect Mode
VIF is connected to a supply in a range of 1.6V to 3.6V and
VBUS is open or grounded. If VBUS is opened while transmitting, the data lines (D+, D–) have sharing capability and may
be driven with external devices up to approximately 3.6V if
and only if SUSPEND is enabled (SUS = 1). With VBUS
ground, D+, D– sharing mode is not permitted.
Disable Mode
VBUS is connected to the 5.0V USB bus voltage and VIF is
open. All logic controlled inputs become high impedances,
thus minimal current will be supplied by VIF if the input pins are
pulled up to an external source.
Alternate Power Supply Configuration Options
I/O Interface Using 3.3V
In systems where the I/O interface utilizes a 3.3V USB
controller, an alternate solution is shown in Figure 7. No extra
components are required; however, the load on VTRM must
not exceed 10mA.
Littelfuse (www.littelfuse.com)
V0402MHS05
SP0503BAHT
Non-Multiplexed Bus
In order to save pin count for the USB logic controller
interface, the MIC2551A was designed with VP and VM as bidirectional pins. To interface the MIC2551A with a nonmultiplexed data bus, resistors can be used for low cost
isolation as shown in Figure 9.
3.3V
MIC2551A
VDD
VIF
VBUS
VBUS
USB
Controller
I/O
VP/VM/
VTRM
RCV/OE#
USB Logic
Controller
(SIE)
Figure 7. I/O Interface Using 3.3V
Bypass Input
MIC2551A
VP
10k
VBUS and VTRM are tied together to a supply voltage in the
range of 3.0V to 3.6V. The internal regulator is bypassed and
the internal circuitry is run from the VTRM input. See Figure 8.
VPO
VM
VBUS
VM
10k
MIC2551A
VIF
VP
VMO
3.3V
Figure 9. MIC2551A Interface to
Non-Multiplexed Data Bus
VTRM
Figure 8. Powering MIC2551A
from External 3.3V
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May 2004
MIC2551A
Configuration Mode
Micrel
VBUS/VTRM
VIF
Connected
Connected
Normal supply configuration and operation.
Open
Connected
VP/VM are HIGH outputs, RCV is LOW.
With OE# = 0 and SUS = 1, data lines may be driven with
external devices up to 3.6V.
With D+, D– floating, IIF draws less than 1µA.
Ground
Connected
VP/VM are HIGH outputs, RCV is LOW.
With D+, D– floating, IIF draws less than 1µA.
Disable Mode
Connected
Open
Prohibited
Connected
Ground
Normal
Disconnect
(D+/D– sharing)
Disconnect
Notes
Logic controlled inputs pins are Hi-Z.
Prohibited condition.
Table 3. Power Supply Configuration
PCB Layout Recommendations
Although the USB standard and applications are not based in
an impedance controlled environment, a properly designed
PCB layout is recommended for optimal transceiver performance. The suggested PCB layout hints are as follows:
• Match signal line traces (VP/VM, D+, D–) to
40ps, approximately 1/3 inch if possible. FR-4
PCB material propagation is about 150ps/inch,
so to minimize skew try to keep VP/VM, D+/D–
traces as short as possible.
• For every signal line trace width (w), separate
the signal lines by 1.5 – 2 widths. Place all other
traces at >2 widths from all signal line traces.
• Maintain the same number of vias on each
differential trace, keeping traces approximately
at same separation distance along the line.
• Control signal line impedances to ±10%.
• Keep RS as close to the IC as possible, with
equal distance between RS and the IC for both
D+ and D–.
May 2004
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M9999-051004
MIC2551A
Micrel
Package Information
4.50 (0.177)
6.4 BSC (0.252)
4.30 (0.169)
DIMENSIONS:
MM (INCH)
0.30 (0.012)
0.19 (0.007)
5.10 (0.200)
4.90 (0.193)
0.20 (0.008)
0.09 (0.003)
1.10 MAX (0.043)
0.65 BSC
(0.026)
1.00 (0.039) REF
8°
0°
0.15 (0.006)
0.05 (0.002)
0.70 (0.028)
0.50 (0.020)
14-lead TSSOP (TS)
0.42 +0.18
–0.18
0.23 +0.07
–0.05
0.85 +0.15
–0.65
0.01 +0.04
–0.01
3.00BSC
1.60 +0.10
–0.10
0.65 +0.15
–0.65
0.20 REF.
2.75BSC
0.42
PIN 1 ID
+0.18
–0.18
N
16
1
1
0.50 DIA
2
2
2.75BSC 3.00BSC
3
3
1.60 +0.10
–0.10
4
4
12° max
0.42 +0.18
–0.18
SEATING
PLANE
CC
0.23 +0.07
–0.05
4
0.5BSC
0.40 +0.05
–0.05
1.5 REF
BOTTOM VIEW
TOP VIEW
CL
0.5 BSC
SECTION "C-C"
SCALE: NONE
0.01 +0.04
–0.01
1.
2.
3.
4.
DIMENSIONS ARE IN mm.
DIE THICKNESS ALLOWABLE IS 0.305mm MAX.
PACKAGE WARPAGE MAX 0.05mm.
THIS DIMENSION APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.20mm AND 0.25mm FROM TIP.
5. APPLIES ONLY FOR TERMINALS
FOR EVEN TERMINAL/SIDE
Rev. 02
16-Pin MLF™ (ML)
M9999-051004
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May 2004
MIC2551A
Micrel
16-Pin MLF™ (ML)
MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
USA
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2004 Micrel, Incorporated.
May 2004
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M9999-051004
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