CET CED540N N-channel enhancement mode field effect transistor Datasheet

CED540N/CEU540N
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
100V, 25A, RDS(ON) = 53mΩ @VGS = 10V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
D
Lead free product is acquired.
TO-251 & TO-252 package.
G
D
G
S
CEU SERIES
TO-252(D-PAK)
ABSOLUTE MAXIMUM RATINGS
Parameter
G
D
S
CED SERIES
TO-251(I-PAK)
Tc = 25 C unless otherwise noted
Symbol
Limit
100
Units
V
VGS
±20
V
ID
25
A
IDM
100
A
56
W
Drain-Source Voltage
VDS
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed
S
a
Maximum Power Dissipation @ TC = 25 C
PD
- Derate above 25 C
0.45
W/ C
TJ,Tstg
-55 to 175
C
Symbol
Limit
Units
Thermal Resistance, Junction-to-Case
RθJC
2.2
C/W
Thermal Resistance, Junction-to-Ambient
RθJA
50
C/W
Operating and Store Temperature Range
Thermal Characteristics
Parameter
Specification and data are subject to change without notice .
1
Rev .4 2008.Oct.
http://www.cetsemi.com
CED540N/CEU540N
Electrical Characteristics
Parameter
Tc = 25 C unless otherwise noted
Symbol
Test Condition
Min
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = 250µA
100
Zero Gate Voltage Drain Current
IDSS
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
Typ
Max
Units
VDS = 100V, VGS = 0V
25
µA
IGSSF
VGS = 20V, VDS = 0V
100
nA
IGSSR
VGS = -20V, VDS = 0V
-100
nA
4
V
53
mΩ
Off Characteristics
V
On Characteristics b
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
Dynamic Characteristics
Input Capacitance
VGS(th)
VGS = VDS, ID = 250µA
2
RDS(on)
VGS = 10V, ID = 18A
45
gFS
VDS = 25V, ID = 18A
14
S
1275
pF
200
pF
25
pF
c
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VDS = 25V, VGS = 0V,
f = 1.0 MHz
Switching Characteristics c
Turn-On Delay Time
td(on)
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
VDD = 50V, ID = 18A,
VGS = 10V, RGEN = 5.1Ω
17
34
ns
10
20
ns
40
80
ns
Turn-Off Fall Time
tf
4
8
ns
Total Gate Charge
Qg
28
56
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS = 80V, ID = 18A,
VGS = 10V
6
nC
8
nC
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
IS
Drain-Source Diode Forward Voltage b
VSD
VGS = 0V, IS = 18A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
c.Guaranteed by design, not subject to production testing.
d.L = 1.9mH, IAS = 15A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C
2
25
A
1.3
V
CED540N/CEU540N
80
60
60
ID, Drain Current (A)
ID, Drain Current (A)
VGS=10,9V
VGS=8V
40
VGS=7V
20
VGS=6V
VGS=5V
0
0
1
2
3
4
5
10
2
-55 C
4
6
8
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)
Ciss
1200
800
400
Coss
Crss
0
5
10
15
20
25
3.0
2.5
ID=18A
VGS=10V
2.0
1.5
1.0
0.5
0.0
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
VDS=VGS
ID=250µA
1.1
1.0
0.9
0.8
0.7
0.6
-50
25 C
TJ=125 C
VGS, Gate-to-Source Voltage (V)
IS, Source-drain current (A)
C, Capacitance (pF)
VTH, Normalized
Gate-Source Threshold Voltage
20
VDS, Drain-to-Source Voltage (V)
1600
1.2
30
0
2000
1.3
40
6
2400
0
50
-25
0
25
50
75
100
125
150
VGS=0V
10
2
10
1
10
0
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
10
VDS=80V
ID=18A
10
8
ID, Drain Current (A)
VGS, Gate to Source Voltage (V)
CED540N/CEU540N
6
4
2
0
0
10
20
30
RDS(ON)Limit
100ms
10
1ms
1
10ms
DC
10
10
40
2
0
TC=25 C
TJ=175 C
Single Pulse
-1
10
-1
10
0
10
1
10
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
t on
RL
V IN
D
VGS
RGEN
toff
tr
td(on)
td(off)
tf
90%
90%
VOUT
VOUT
10%
INVERTED
10%
G
90%
S
VIN
50%
50%
10%
PULSE WIDTH
Figure 10. Switching Waveforms
r(t),Normalized Effective
Transient Thermal Impedance
Figure 9. Switching Test Circuit
10
0
D=0.5
0.2
10
PDM
0.1
-1
t1
0.05
0.02
0.01
Single Pulse
10
1. RθJC (t)=r (t) * RθJC
2. RθJC=See Datasheet
3. TJM-TC = P* RθJC (t)
4. Duty Cycle, D=t1/t2
-2
10
-2
t2
10
-1
10
0
10
1
10
2
Square Wave Pulse Duration (msec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
10
3
10
4
2
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