Rohm BU3072HFV-TR Compact 1ch clock generators for digital camera Datasheet

TECHNICAL NOTE
High-performance Clock Generator Series
Compact 1ch
Clock Generators
for Digital Cameras
BU3071HFV, BU3072HFV, BU3073HFV, BU3076HFV
BU7322HFV, BU7325HFV
●Description
These Clock Generators incorporates compact package compared to oscillators, which provides the generation of
high-frequency CCD, USB, VIDEO clocks necessary for digital still cameras and digital video cameras.
●Features
1) SEL pin allowing for the selection of frequencies
2) Selection of OE pin enabling Power-down function
3) Crystal-oscillator-level clock precision with high C/N characteristics and low jitter
4) Microminiature HVSOF6 Package incorporated
5) Single power supply of 3.3 V
●Applications
Digital Still Camera, Digital Video Camera, and others
●Lineup
Supply voltage
Operating temperature range
Reference input clock
Output clock
Power-down function
Operating current (TYP)
Package
BU3071HFV
3.0 V～3.6V
-5℃～70℃
28.6363MHz
54.0000MHz
Provided
10mA
HVSOF6
BU3072HFV
3.0 V～3.6V
-5℃～70℃
48.0000MHz
27.0000MHz
36.0000MHz
Provided
11mA
HVSOF6
BU3073HFV
3.0 V～3.6V
-5℃～70℃
48.0000MHz
24.3750MHz
24.5454MHz
Provided
11mA
HVSOF6
BU3076HFV
2.85 V～3.6V
-5℃～75℃
27.0000MHz
54.0000MHz
67.5000MHz
Provided
12mA
HVSOF6
BU7322HFV
2.85 V～3.6V
-5℃～75℃
27.0000MHz
49.5000MHz
36.0000MHz
Provided
10mA
HVSOF6
BU7325HFV
2.85 V～3.6V
-30℃～85℃
27.0000MHz
48.0000MHz
78.0000MHz
Provided
12mA
HVSOF6
●Absolute Maximum Ratings（Ta=25℃）
Supply voltage
Input voltage
Storage temperature range
Symbol
VDD
VIN
Tstg
Pd
Limit
-0.3～4.0
-0.3～VDD+0.3
-30～125
410
Unit
V
V
℃
mW
Power dissipation
*1 Operating is not guaranteed.
*2 In the case of exceeding Ta = 25℃, 4.1mW should be reduced per 1℃.
*3 The radiation-resistance design is not carried out.
*4 Power dissipation is measured when the IC is mounted to the printed circuit board.
Sep. 2008
●Recommended Operating Range
Parameter
Symbol
Limit
Unit
Supply voltage
VDD
3.0～3.6
Ｖ
Input H voltage
VINH
0.8VDD～VDD
Ｖ
Input L voltage
VINL
0.0～0.2VDD
Ｖ
Operating temperature
Topr
-5～70
℃
CL
15(MAX)
pF
Output load
●Electrical characteristics
BU3071HFV（Ta=25℃, VDD=3.3V,Crystal frequency=28.6363MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output H voltage
VOH
2.8
V
IOH=-4.0mA
Output L voltage
VOL
0.5
V
IOL=4.0mA
Consumption current 1
IDD1
10
15
mA
OE=H, at no load
Consumption current 2
IDD2
1
1.3
mA
OE=L
Output frequency
54.0000
MHz IN*264/35/4
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
50
psec ※1
Period-Jitter MIN-MAX
Rise time
PJsABS
-
300
-
psec
※2
Period of transition time required for the
tr
2.5
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
2.5
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
1
msec ※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.If the input
frequency is set to 28.6363MHz, the output frequency will be as listed above.
BU3072HFV（Ta=25℃, VDD=3.3V, Crystal frequency=48.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output H voltage
VOH
2.8
V
IOH=-4.0mA
Output L voltage
VOL
0.5
V
IOL=4.0mA
Consumption current 1
Consumption current 2
Output frequency
IDD1
11
16
IDD2
5
CLK_27
27.0000
CLK_36
36.0000
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
Period-Jitter 1σ
PJsSD
35
-
mA
μA
MHz
MHz
PD=H, at no load
PD=L
SEL=L, IN*18/8/4
SEL=H, IN*24/8/4
%
psec
Measured at a voltage of 1/2 of VDD
※1
MIN-MAX of long-term jitter (100 sec
from trigger)
Period of transition time required for the
tr
2.5
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
2.5
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
1
msec ※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.If the input
frequency is set to 48.0000MHz, the output frequency will be as listed above.
Long-Term-Jitter
MIN-MAX
Rise time
LTJsABS
-
0.9
1.5
2/20
nsec
BU3073HFV（Ta=25℃, VDD=3.3V, Crystal frequency=48.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output H voltage
VOH
2.8
V
IOH=-4.0mA
Output L voltage
VOL
0.5
V
IOL=4.0mA
Consumption current 1
IDD1
11
16
mA
PD=H, at no load
Consumption current 2
IDD2
5
mA
PD=L
Output frequency
CLK_375
24.3750
MHz
SEL=L, IN*65/16/8
CLK_545
24.5454
MHz
SEL=H, IN*45/11/8
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
45
psec
※1
Long-Term-Jitter
MIN-MAX of long-term jitter (100 sec
LTJsABS
0.9
1.5
nsec
MIN-MAX
from trigger)
Period of transition time required for the
Rise time
output to reach 80% from 20% of VDD.
tr
2.5
nsec
Provided with 15pF output load.
Period of transition time required for the
Fall time
output to reach 20% from 80% of VDD.
tf
2.5
nsec
Provided with 15pF output load.
Output Lock time
tLOCK
1
msec ※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 48.0000MHz, the output frequency will be as listed above.
BU3076HFV（Ta=25℃, VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output H voltage
VOH
2.8
V
IOH=-4.0mA
Output L voltage
VOL
0.5
V
IOL=4.0mA
Pull-down resistance
Rpd
25
50
100
KΩ
Pull-down resistance on input pin
Consumption current 1
IDD1
10
15
mA
54MHz output, at no load
Consumption current 2
IDD2
12
18
mA
67.5MHz output, at no load
IDDst
Standby current
1
μA
OE=L
Output frequency
CLK_54
54.0000
MHz
SEL=L, IN*48/6/4
CLK_67.5
67.5000
MHz
SEL=H, IN*60/6/4
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
50
psec
※1
Period-Jitter MIN-MAX
PJsABS
300
psec
※2
Period of transition time required for the
Rise time
output to reach 80% from 20% of VDD.
tr
1.5
nsec
Provided with 15pF output load.
Period of transition time required for the
Fall time
output to reach 20% from 80% of VDD.
tf
1.5
nsec
Provided with 15pF output load.
Output Lock time
tLOCK
200
usec
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
3/20
BU7322HFV（Ta=25℃, VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
VOH
2.8
V
IOH=-4.0mA
Output H voltage
VOL
0.5
V
IOL=4.0mA
Output L voltage
Rpd
25
50
100
kΩ
Pull-down resistance on input pin
Pull-down resistance
IDD
10
13.5
mA
49.5MHz output, at no load
Consumption current 1
IDD2
9.5
13.0
mA
36.0MHz output, at no load
Consumption current 2
μA
IDDst
1
OE=L
Standby current
CLK_49.5
MHz
SEL=L, IN*66/6/6
Output frequency
49.5000
CLK_36
-
36.0000
The following parameters represent design guaranteed performance.
Duty
45
50
55
Duty
PJsSD
50
Period-Jitter 1σ
PJsABS
300
Period-Jitter MIN-MAX
MHz
SEL=H, IN*64/6/8
%
psec
psec
Measured at a voltage of 1/2 of VDD
※1
※2
Period of transition time required for the
Rise time
tr
2.5
nsec
output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
2.5
nsec
output to reach 20% from 80% of VDD.
Provided with 15pF output load.
tLOCK
200
usec
Output Lock time
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
BU7325HFV（Ta=25℃, VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified.）
Parameter
Output H voltage
Output L voltage
Pull-down resistance
Consumption current 1
Consumption current 2
Standby current
Output frequency
Symbol
VOH
VOL
Rpd
IDD1
IDD2
IDDst
CLK_48
Min.
2.8
25
-
Typ.
50
11
12
48.0000
Max.
0.5
100
15
16.5
1
-
MHz
Conditions
IOH=-4.0mA
IOL=4.0mA
Pull-down resistance on input pin
OE=H, SEL=L, at no load
OE=H, SEL=H, at no load
OE=L
SEL=L, IN*96/9/6
CLK_78
-
78.0000
-
MHz
SEL=H, IN*104/9/4
%
psec
psec
Measured at a voltage of 1/2 of VDD
The following parameters represent design guaranteed performance.
Duty
45
50
55
Duty
PJsSD
50
Period-Jitter 1σ
PJsABS
300
Period-Jitter MIN-MAX
Unit
V
V
kΩ
mA
mA
μA
※1
※2
Period of transition time required for the
Rise time
tr
1.5
nsec
output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
1.5
nsec
output to reach 20% from 80% of VDD.
Provided with 15pF output load.
tLOCK
200
usec
Output Lock time
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
Common to BU3071HFV, BU3072HFV, BU3073HFV, BU3076HFV, BU7322HFV, BU7325HFV
1
Period-Jitter 1σ
This parameter represents standard deviation (1σ) on cycle distribution data at the time when the output clock cycles are
sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
2
Period-Jitter MIN-MAX
This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles are
sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
3
Output Lock Time
This parameter represents elapsed time after power supply turns ON to reach a voltage of 3.0 V, after the system is switched from
Power-Down state to normal operation state, or after the output frequency is switched, until it is stabilized at a specified frequency,
respectively.
4/20
●Reference data (BU3071HFV basic data)
RBW:1kHz
5nsec/div
10dB/div
1V/div
1V/div
VBW:100Hz
500psec/div
Fig.1 54MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
10kHz/div
Fig.3 54MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.2 54MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
●Reference data (BU3072HFV basic data)
RBW:1kHz
1V/div
1V/div
10dB/div
VBW:100Hz
10nsec/div
10kHz/div
500psec/div
Fig.5 27MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.4 27MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.6 27MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
RBW:1kHz
1V/div
1V/div
10dB/div
VBW:100Hz
5nsec/div
Fig.7 36MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
500psec/div
Fig.8 36MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
5/20
10kHz/div
Fig.9 36MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
●Reference data (BU3073HFV basic data)
RBW:1kHz
10dB/div
1V/div
1V/div
VBW:100Hz
10nsec/div
10kHz/div
500psec/div
Fig.10 24.375MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.11 24.375MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.12 24.375MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
RBW:1kHz
10dB/div
1V/div
1V/div
VBW:100Hz
10nsec/div
500psec/div
Fig.13 24.5454MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
10kHz/div
Fig.14 24.5454MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.15 24.5454MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
●Reference data (BU3076HFV basic data)
RBW:1kHz
5nsec/div
10dB/div
1V/div
1V/div
VBW:100Hz
10kHz/div
500psec/div
Fig.16 54MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.17 54MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.18 54MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
RBW:1kHz
2nsec/div
Fig.19 67.5MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
10dB/div
1V/div
1V/div
VBW:100Hz
500psec/div
Fig.20 67.5MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
6/20
10kHz/div
Fig.21 67.5MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
●Reference data (BU7322HFV basic data)
RBW:1kHz
10dB/div
1V/div
1V/div
VBW:100Hz
5nsec/div
500psec/div
Fig.22 49.5MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
10kHz/div
Fig.23 49.5MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.24 49.5MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
RBW:1kHz
10dB/div
1V/div
1V/div
VBW:100Hz
10nsec/div
500psec/div
Fig.25 36MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.26 36MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
10kHz/div
Fig.27 36MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
●Reference data (BU7325HFV basic data)
10dB/div
1V/div
1V/div
RBW:1kHz
VBW:100Hz
5nsec/div
500psec/div
Fig.28 48MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
10kHz/div
Fig.30 48MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.29 48MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
RBW:1kHz
10dB/div
1V/div
1V/div
VBW:100Hz
10nsec/div
500psec/div
10kHz/div
Fig.31 78MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.32 78MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.33 78MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
7/20
5
5
54
53
4
4
52
51
VDD=3.7V
50
49
48
VDD=3.3V
VDD=2.9V
47
46
3
2
VDD=2.9V
VDD=3.3V
VDD=3.7V
1
-25
0
25
50
75
-25
100
80
60
VDD=3.7V
VDD=3.3V
20
VDD=2.9V
0
-25
0
25
50
75
25
50
75
100
100
temperature:T [℃]
Fig.37 54MHz
Period-Jitter 1σ temperature characteristics
2
VDD=2.9V
1
VDD=3.3V
VDD=3.7V
600
500
400
300
VDD=3.7V
200
100
VDD=2.9V
VDD=3.3V
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.38 54MHz
Jitter-MinMax temperature characteristics
8/20
-25
0
25
50
75
100
temperature:T [℃]
Fig.35 54MHz
Rise-time temperature characteristics
Period-Jitter MIN-MAX:JsABS [psec]
100
40
0
temperature:T [℃]
temperature:T[℃]
Fig.34 54MHz
Duty temperature characteristics
3
0
0
45
Period-Jitter 1σ:JsSD [psec]
Fall time:tf [nsec]
55
Rise time:tr [nsec]
Duty:Duty[%]
●Reference data (BU3071HFV Temperature and Supply voltage variations data)
Fig.36 54MHz
Fall-time temperature characteristics
●Reference data (BU3072HFV Temperature and Supply voltage variations data)
55
5
5
4
4
52
51
Rise time:tr [nsec]
VDD=3.7V
50
49
VDD=2.9V
48
VDD=3.3V
47
3
VDD=2.9V
2
1
46
-25
0
25
50
75
-25
100
0
temperature:T [℃]
Period-Jitter 1σ:JsSD [psec]
25
50
75
1
VDD=3.3V
VDD=3.7V
-25
100
0
25
50
75
100
temperature:T [℃]
Fig.40 27MHz
Rise-time temperature characteristics
100
Fig.41 27MHz
Fall-time temperature characteristics
600
60
50
40
30
Period-Jitter MIN-MAX:JsABS [psec]
90
80
70
VDD=3.7V
20
10
VDD=2.9V
VDD=3.3V
0
-25
0
25
50
75
500
400
300
VDD=3.7V
200
100
VDD=2.9V
-25
0
25
75
100
Fig.43 27MHz
Jitter-MinMax temperature characteristics
55
54
53
Rise time:tr [nsec]
52
VDD=3.7V
VDD=2.9V
48
VDD=3.3V
47
46
45
50
temperature:T [℃]
Fig.42 27MHz
Period-Jitter 1σ temperature characteristics
51
50
49
VDD=3.3V
0
100
temperature:T [℃]
Duty:Duty [%]
VDD=2.9V
temperature:T [℃]
Fig.39 27MHz
Duty temperature characteristics
5
5
4
4
3
VDD=3.3V
2
VDD=2.9V
1
0
25
50
75
100
temperature:T [℃]
70
60
VDD=2.9V
50
40
30
20
VDD=3.3V
10
0
VDD=3.7V
-25
0
25
50
75
0
25
50
75
100
100
temperature:T [℃]
Fig.47 36MHz
Period-Jitter 1σtemperature characteristics
Fig.45 36MHz
Rise-time temperature characteristics
Period-Jitter MIN-MAX:JsABS [psec]
90
80
VDD=3.3V
VDD=2.9V
VDD=3.7V
temperature:T [℃]
100
2
0
-25
Fig.44 36MHz
Duty temperature characteristics
3
1
VDD=3.7V
0
-25
Period-Jitter 1σ:JsSD [psec]
2
0
0
45
3
VDD=3.3V
VDD=3.7V
Fall time:tf [nsec]
Duty:Dyty [%]
53
Fall time:tf [nsec]
54
600
500
400
VDD=2.9V
300
200
VDD=3.3V
100
VDD=3.7V
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.48 36MHz
Jitter-MinMax temperature characteristics
9/20
-25
0
25
50
75
temperature:T [℃]
100
Fig.46 36MHz
Fall-time temperature characteristics
5
5
54
53
52
4
4
51
50
VDD=3.7V
49
48
47
VDD=3.3V
VDD=2.9V
2
1
VDD=3.7V
-25
0
25
50
75
2
VDD=2.9V
1
VDD=3.7V
VDD=3.3V
0
-25
100
0
25
50
75
100
temperature:T [℃]
temperature:T [℃]
Fig.49 24.375MHz
Duty temperature characteristics
Fig.50 24.375MHz
Rise-time temperature characteristics
100
3
VDD=3.3V
0
45
-25
0
25
50
75
temperature:T [℃]
100
Fig.51 24.375MHz
Fall-time temperature characteristics
600
60
50
Period-Jitter MIN-MAX:JsABS
[psec]
90
80
70
Period-Jitter 1σ:JsSD [psec]
3
VDD=2.9V
46
Fall time:tf [nsec)]
55
Rise time:tr [nsec]
Duty:Duty [%]
●Reference data (BU3073HFV Temperature and Supply voltage variations data)
VDD=3.7V
40
30
20
10
VDD=3.3V
VDD=2.9V
0
-25
0
25
50
75
500
VDD=3.7V
400
300
200
VDD=2.9V
VDD=3.3V
100
0
-25
100
0
25
50
75
100
temperature:T [℃]
temperature:T [℃]
Fig.52 24.375MHz
Period-Jitter 1σ temperature characteristics
Fig.53 24.375MHz
Jitter-MinMax temperature characteristics
55
5
5
4
4
Rise time:tr [nsec]
Duty:Duty [%]
53
52
51
VDD=3.7V
50
49
48
VDD=2.9V
VDD=3.3V
47
3
2
1
-25
0
25
50
75
temperature:T [℃]
90
80
70
60
50
40
VDD=3.7V
30
20
VDD=2.9V
VDD=3.3V
10
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.57 24.5454MHz
Period-Jitter 1σ temperature characteristics
Period-Jitter MIN-MAX:JsABS [psec]
100
0
25
50
75
temperature:T [℃]
100
VDD=2.9V
1
VDD=3.7V
600
VDD=3.7V
500
400
300
200
VDD=3.3V
VDD=2.9V
100
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.58 24.5454MHz
Jitter-MinMax temperature characteristics
10/20
-25
0
25
VDD=3.3V
50
75
100
temperature:T [℃]
Fig.55 24.5454MHz
Rise-time temperature characteristics
Fig.54 24.5454MHz
Duty temperature characteristics
2
0
-25
100
3
VDD=3.3V
0
45
Period-Jitter 1σ:JsSD [psec]
VDD=2.9V
VDD=3.7V
46
Fall time:tf [nsec]
54
Fig.56 24.5454MHz
Fall-time temperature characteristics
5
5
53
52
51
4
4
VDD=3.7V
50
49
48
47
46
45
VDD=3.3V
3
2
1
3
VDD=2.9V
2
1
VDD=3.7V
25
50
75
70
60
50
VDD=2.9V
30
20
10
VDD=3.7V
VDD=3.3V
0
-25
0
25
50
75
100
VDD=3.7V
-25
0
25
50
VDD=2.9V
30
VDD=3.3V
0
-25
0
25
50
75
100
5
4
4
3
VDD=2.9V
VDD=3.3V
2
VDD=3.7V
1
75
100
temperature:T [℃]
Fig.67 67.5MHz
Period-Jitter 1σtemperature characteristics
3
VDD=2.9V
2
1
VDD=3.3V
VDD=3.7V
0
0
25
50
75
100
600
500
400
300
VDD=3.7V
VDD=2.9V
200
VDD=3.3V
100
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.68 67.5MHz
Jitter-MinMax temperature characteristics
11/20
-25
0
25
50
75
100
temperature:T [℃]
Fig.65 67.5MHz
Rise-time temperature characteristics
Period-Jitter MIN-MAX:JsABS [psec]
60
10
50
temperature:T [℃]
70
VDD=3.7V
Fig.61 54MHz
Fall-time temperature characteristics
5
-25
Fig.64 67.5MHz
Duty temperature characteristics
20
100
0
100
temperature:T [℃]
40
75
VDD=3.3V
0
75
50
200
Rise time:tr [nsec]
VDD=3.7V
50
25
temperature:T [℃]
Fig.63 54MHz
Jitter-MinMax temperature characteristics
VDD=2.9V
25
0
temperature:T [℃]
48
0
-25
VDD=2.9V
300
100
52
-25
100
400
55
54
53
47
46
45
75
500
Fig.62 54MHz
Period-Jitter 1σ temperature characteristics
VDD=3.3V
50
600
temperature:T [℃]
51
50
49
25
Fig.60 54MHz
Rise-time temperature characteristics
Period-Jitter MIN-MAX:JsABS [psec]
80
40
0
temperature:T [ ℃]
100
90
VDD=3.3V
0
-25
100
Fall time:tf [nsec]
0
Fig.59 54MHz
Duty temperature characteristics
Duty:Duty [%]
VDD=3.3V
VDD=3.7V
0
temperature:T [℃]
Period-Jitter 1σ:JsSD [psec]
VDD=2.9V
VDD=2.9V
-25
Period-Jitter 1σ:JsSD [psec]
Fall time:tf [nsec]
55
54
Rise time:tr [nsec]
Duty:Duty [%]
●Reference data (BU3076HFV Temperature and Supply voltage variations data)
Fig.66 67.5MHz
Fall-time temperature characteristics
●Reference data (BU7322HFV Temperature and Supply voltage variations data)
5
5
55
54
4
Rise time:tr [nsec]
Duty:Duty [%]
52
VDD=3.7V
51
50
49
48
47
VDD=2.75V
VDD=3.3V
4
VDD=2.75V
Fall time:tf [nsec]
53
3
2
VDD=3.3V
VDD=3.7V
1
VDD=2.75V
3
2
VDD=3.7V
VDD=3.3V
1
46
45
0
-25
0
25
50
75
100
0
-25
0
90
80
70
VDD=2.75V
VDD=3.3V
-25
0
25
50
75
VDD=3.7V
300
VDD=2.75V
-25
0
25
50
75
100
temperature:T [℃]
Fig.73 49.5MHz
Jitter-MinMax temperature characteristics
5
4
VDD=2.75V
Fall time:tf [nsec]
VDD=3.3V
VDD=2.75V
47
46
45
3
2
VDD=3.7V
VDD=3.3V
1
0
25
50
75
-25
100
0
25
50
75
100
Fig.75 36MHz
Rise-time temperature characteristics
70
Period-Jitter MIN-MAX:JsABS
[psec]
600
60
50
40
VDD=2.75V
30
20
VDD=3.3V
10
VDD=3.7V
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.77 36MHz
Period-Jitter 1σ temperature characteristics
2
VDD=3.7V
VDD=3.3V
1
500
400
VDD=2.75V
300
200
100
VDD=3.7V
VDD=3.3V
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.78 36MHz
Jitter-MinMax temperature characteristics
12/20
-25
0
25
50
75
100
temperature:T [℃]
temperature:T [℃]
temperature:T [℃]
Fig.74 36MHz
Duty temperature characteristics
VDD=2.75V
3
0
0
-25
100
0
100
Rise time:tr [nsec]
48
75
VDD=3.3V
100
4
VDD=3.7V
50
Fig.71 49.5MHz
Fall-time temperature characteristics
5
51
50
49
25
temperature:T [℃]
200
55
54
53
52
0
400
Fig.72 49.5MHz
Period-Jitter 1σ temperature characteristics
Duty:Duty [%]
-25
500
temperature:T [℃]
Period-Jitter 1σ:JsSD [psec]
100
600
Period-Jitter MIN-MAX:JsABS [psec]
Period-Jitter 1σ:JsSD [psec]
100
20
10
0
75
Fig.70 49.5MHz
Rise-time temperature characteristics
Fig.69 49.5MHz
Duty temperature characteristics
VDD=3.7V
50
temperature:T [℃]
temperature:T [℃]
60
50
40
30
25
Fig.76 36MHz
Fall-time temperature characteristics
●Reference data (BU7325HFV Temperature and Supply voltage variations data)
VDD=3.7V
50
49
48
47
46
VDD=3.3V
VDD=2.75V
5
5
4
4
3
VDD=3.7V
2
VDD=3.3V
1
25
50
75
-25
100
0
Period-Jitter MIN-MAX:JsABS [psec]
90
80
70
60
50
VDD=2.75V
30
20
VDD=3.7V
VDD=3.3V
0
-25
0
25
50
75
0
25
VDD=2.75V
300
VDD=3.3V
200
100
VDD=3.7V
0
-25
Rise time:tr [nsec]
50
75
0
25
100
5
4
4
3
VDD=2.75V
2
1
VDD=3.3V
VDD=3.7V
3
VDD=2.75V
2
1
VDD=3.7V
0
-25
VDD=3.7V
0
100
temperature:T [℃]
Fig.87 78MHz
Period-Jitter 1σ temperature characteristics
Period-Jitter MIN-MAX:JsABS [psec]
20
75
25
50
75
100
temperature:T [℃]
VDD=2.75V
50
0
600
500
400
300
VDD=2.75V
VDD=3.3V
200
100
VDD=3.7V
0
-25
0
25
50
75
100
temperature:T [℃]
Fig.88 78MHz
Jitter-MinMax temperature characteristics
13/20
-25
0
25
50
75
100
temperature:T [℃]
Fig.85 78MHz
Rise-time temperature characteristics
40
25
75
5
100
50
0
50
0
60
VDD=3.3V
100
Fig.81 48MHz
Fall-time temperature characteristics
VDD=3.3V
VDD=2.75V
70
-25
25
50
75
temperature:T [℃]
Fig.83 48MHz
Jitter-MinMax temperature characteristics
Fig.84 78MHz
Duty temperature characteristics
10
0
400
temperature:T [℃]
30
-25
temperature:T [℃]
VDD=3.7V
-25
0
100
500
100
Fig.82 48MHz
Period-Jitter 1σ temperature characteristics
VDD=3.3V
VDD=3.3V
600
temperature:T [℃]
55
54
53
52
51
50
49
48
47
46
45
75
Fig.80 48MHz
Rise-time temperature characteristics
100
10
50
temperature:T [℃]
temperature:T [℃]
40
25
Fall time:tf [nsec]
0
Fig.79 48MHz
Duty temperature characteristics
Period-Jitter 1σ:JsSD [psec]
VDD=2.75V
2
VDD=3.7V
-25
Duty:Duty [%]
3
1
VDD=2.75V
0
45
Period-Jitter 1σ:JsSD [psec]
Fall time:tf [nsec]
54
53
52
51
Rise time:tr [nsec]
Duty:Duty [%]
55
Fig.86 78MHz
Fall-time temperature characteristics
●Block diagram, pin assignment/functions
（BU3071HFV）
1：VDD
6：IN
2：VSS
5：TEST
3：OUT
4：OE
6pin:IN
PLL
1/4
3pin:OUT
4pin:OE
Fig.89
PIN NO.
1
2
3
4
5
6
PIN name
VDD
VSS
OUT
OE
TEST
IN
Fig.90
Function
Power supply
GND
Clock output terminal
Output enable (L: disable, H: enable), equipped with Pull-down function, output fixed to L at disable
TEST pin, equipped with Pull-down function
Clock input pin (28.6363 MHz input)
（BU3072HFV）
PLL
1：VDD
6：IN
2：VSS
5：SEL
3：OUT
4：PD
6pin:IN
1/4
DATA1
DATA2
3pin:OUT
5pin:SEL
4pin:PD
Fig.91
PIN NO.
1
2
3
4
5
6
PIN name
VDD
VSS
OUT
PD
SEL
IN
Fig.92
Function
Power supply
GND
Clock output terminal (L：27.0000MHz, H：36.0000MHz)
Power-down (L: Hi-Z, H: enable), equipped with Pull-down function, output set to Hi-Z at disable
Output selection (L: 27.0000 MHz, H: 36.0000 MHz)
Clock input pin (48.0000 MHz input)
（BU3073HFV）
PLL
1：VDD
6：IN
2：VSS
5：SEL
3：OUT
4：PD
6pin:IN
1/8
DATA1
DATA2
3pin:OUT
5pin:SEL
4pin:PD
Fig.93
PIN NO.
1
2
3
4
5
6
PIN name
VDD
VSS
OUT
PD
SEL
IN
Fig.94
Function
Power supply
GND
Clock output terminal (L：24.3750MHz, H：24.5454MHz)
Power-down (L: disable, H: enable), equipped with Pull-down function, output set to L at disable
Output selection (L：24.3750MHz, H：24.5454MHz)
Clock input pin (48.0000MHz input)
14/20
（BU3076HFV）
PLL
1:VDD
6:IN
2:VSS
5：SEL
3:OUT
4：OE
6pin:IN
DATA1
DATA2
1/4
3pin:OUT
5pin:SEL
4pin:OE
Fig.95
PIN NO.
1
2
3
4
5
6
PIN name
VDD
VSS
OUT
OE
SEL
IN
Fig.96
Function
Power supply
GND
Clock output terminal (L：54.0000MHz, H：67.5000MHz)
Power-down (L: disable, H: enable), equipped with Pull-down function, output set to L at disable
Output selection (L：54.0000MHz, H：67.5000MHz)
Clock input pin (27.0000MHz input)
（BU7322HFV）
PLL
1:VDD
6:IN
2:VSS
5：SEL
3:OUT
4：OE
6pin:IN
1/6
1/8
DATA1
DATA2
3pin:OUT
5pin:SEL
4pin:OE
Fig.97
PIN NO.
1
2
3
4
5
6
PIN name
VDD
VSS
OUT
OE
SEL
IN
Fig.98
Function
Power supply
GND
Clock output terminal (L：49.5000MHz, H：36.0000MHz)
Power-down (L：disable ,H：enable) equipped with Pull-down function, disable output set to L at disable
Output selection (L：49.5000MHz, H：36.0000MHz) equipped with Pull-down function
Clock input pin (27.0000MHz input)
（BU7325HFV）
PLL
1:VDD
6:IN
2:VSS
5：SEL
3:OUT
4：OE
6pin:IN
DATA1
DATA2
1/6
1/4
3pin:OUT
5pin:SEL
4pin:OE
Fig.99
PIN NO.
1
2
3
4
5
6
PIN name
VDD
VSS
OUT
OE
SEL
IN
Fig.100
Function
Power supply
GND
Clock output terminal (L：48.0000MHz, H：78.0000MHz)
Power-down (L：disable ,H：enable) equipped with Pull-down function, disable output set to L at disable
Output selection (L：48.0000MHz, H：78.0000MHz)
Clock input pin (27.0000MHz input)
15/20
●Application circuit example
（BU3071HFV）
（BU3072HFV）
1：VDD
6：IN
28.6363MHz
2：VSS
5：TEST
3：OUT
4：OE
1：VDD
6：IN
2：VSS
5：SEL
3：OUT
4：PD
48MHz
H:36.0000MHz
H:enable
54.0000MHz
L:27.0000MHz
H:36.0000MHz
L:27.0000MHz
H:enable
L:disable
Fig.101
Fig.102
（BU3073HFV）
（BU3076HFV）
1：VDD
6：IN
2：VSS
5：SEL
3：OUT
4：PD
48MHz
H:24.5454MHz
L:24.3750MHz
H:24.5454MHz
L:24.3750MHz
L:Hi-Z
H:67.5000MHz
L:54.00000MHz
1:VDD
6: IN
2: VSS
5: SEL
3: OUT
4: OE
27MHz
H:67.5000MHz
L:54.0000MHz
H:enable
H:enable
L:disable
L:disable
Fig.104
Fig.103
（BU7322HFV）
H:36.0000MHz
L:49.5000MHz
（BU7325HFV）
1:VDD
6: IN
2: VSS
5: SEL
3: OUT
4: OE
27MHz
H:36.0000MHz
L:49.5000MHz
H:78.0000MHz
L:48.0000MHz
1:VDD
6: IN
2: VSS
5: SEL
3: OUT
4: OE
27MHz
H:78.0000MHz
L:48.0000MHz
H:enable
H:enable
L:disable
Fig.106
Fig.105
L:disable
 For VDD and VSS, insert a bypass capacitor of approx. 0.1 F as close as possible to the pin.
 Bypass capacitors with good high-frequency characteristics are recommended.
 Even though we believe that the typical application circuit is worth of a recommendation, please be sure to thoroughly
recheck the characteristics before use.
16/20
●Equivalent circuit
3-pin (Output pin)
From the inside of IC
From the inside of IC
PD=L ； Hi-Z
； enable
Fig.107
Fig.108
BU3071HFV, BU3073HFV, BU3076HFV
BU7322HFV, BU7325HFV
BU3072HFV
4-pin (Input pin)
To the inside of IC
Fig.109
5-pin (Input pin)
To the inside of IC
To the inside of IC
Fig.110
BU3072HFV, BU3073HFV, BU3076HFV
BU7322HFV, BU7325HFV
Fig.111
BU3071HFV
6-pin (Input pin)
From the inside of IC
To the inside
of IC
To the inside of IC
To the inside of IC
To the inside
of IC
Fig.112
BU3072HFV, BU3073HFV, BU3076HFV
BU7322HFV, BU7325HFV
Fig.113
BU3071HFV
17/20
●Appearance of Marker
(Dimension including burr: Max. 1.8)
(0.45)
Marker
○ ○
(1.5)
(1.2)
(1.4)
(0.15)
(Dimension including burr: Max. 2.8)
3.0±0.1
2.6±0.1
1.6±0.1
LOT No.
0.75MAX
0.145±0.05
0.5
0.22±0.05
Fig.114
・List of markers
Model name
BU3071HFV
BU3072HFV
BU3073HFV
BU3076HFV
BU7322HFV
BU7325HFV
Marker
AB
AC
AD
AA
AE
AH
18/20
(UNIT：mm)
●Cautions on use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as applied voltage (VDD or VIN), operating temperature range (Topr),
etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit.
If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take
physical safety measures including the use of fuses, etc.
(2) Recommended operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The
electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the
breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s
power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.
In this regard, for the digital block power supply and the analog block power supply, even though these power supplies
has the same level of potential, separate the power supply pattern for the digital block from that for the analog block,
thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to
the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal.
At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the
capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus
determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting
can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or
between the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the
jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In
addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention
to the transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of
the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input
terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not
apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power
supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the
guaranteed value of electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of
the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
19/20
●Product Designation
B
U
3
Part No.
0
7
1
Type
3071
3072
3073
3076
7322
7325
H
F
V
-
T
R
Package and forming specification
TR: Embossed tape and reel
Package Type
HFV：HVSOF6
HVSOF6
<Dimension>
<Tape and Reel information>
Tape
(MAX 1.8 include BURR)
(0.45)
(1.5)
1.6±0.1
(1.4)
0.75Max.
123
(0.15)
(1.2)
(MAX 2.8 include BURR)
2.6±0.1
3.0±0.1
654
Embossed carrier tape
Quantity
3000pcs
Direction
of feed
TR
(The direction is the 1pin of product is at the upper light when you hold
reel on the left hand and you pull out the tape on the right hand)
0.145±0.05
S
X X X
X X X
0.1 S
0.22±0.05
X X X
X X X
X X X
X X X
X X X
X X X
X X X
X X X
0.5
1Pin
Direction of feed
Reel
(Unit:mm)
※When you order , please order in times the amount of package quantity.
Catalog No.08T800A '08.9 ROHM ©
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account
when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples
of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to
use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment
or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear
no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2009 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster @ rohm.co. jp
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix-Rev4.0