STMicroelectronics LDS3985M125R Ultra low drop-low noise bicmos 300ma v.reg. for use with very low esr output capacitor Datasheet

LDS3985
SERIES
ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG.
FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR
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INPUT VOLTAGE FROM 2.5V TO 6V
STABLE WITH LOW ESR CERAMIC
CAPACITORS
ULTRA LOW DROPOUT VOLTAGE (150mV
TYP. AT 300mA LOAD, 0.4mV TYP. AT 1mA
LOAD)
VERY LOW QUIESCENT CURRENT (85µA
TYP. AT NO LOAD, 200µA TYP. AT 300mA
LOAD; MAX 1.5µA IN OFF MODE)
GUARANTEED OUTPUT CURRENT UP TO
300mA
WIDE RANGE OF OUTPUT VOLTAGE:
1.25V; 1.35; 1.5V; 1.8V; 2V; 2.1V; 2.2V; 2.5V;
2.6V; 2.7V; 2.8V; 2.85V; 2.9V; 3V; 3.1V; 3.2V;
3.3V; 4.7V
FAST TURN-ON TIME: TYP. 240µs
[CO=2.2µF, CBYP= 33nF AND IO=1mA]
LOGIC-CONTROLLED ELECTRONIC
SHUTDOWN
INTERNAL CURRENT AND THERMAL LIMIT
OUTPUT LOW NOISE VOLTAGE 30µVRMS
OVER 10Hz to 100KHz
S.V.R. OF 55dB AT 1KHz, 50dB AT 10KHz
TEMPERATURE RANGE: -40°C TO 125°C
DFN6
SOT23-5L
It is stable with ceramic and high quality tantalum
capacitor. The ultra low drop-voltage, low
quiescent current and low noise makes it suitable
for low power applications and in battery powered
systems. Regulator ground current increases only
slightly in dropout, further prolonging the battery
life. Shutdown Logic Control function is available,
this means that when the device is used as local
regulator, it is possible to put a part of the board in
standby, decreasing the total power consumption.
Typical applications are in mobile phone and
similar battery powered wireless systems,
portable information appliances.
DESCRIPTION
The LDS3985 provides up to 300mA, from 2.5V to
6V input voltage.
Figure 1: Schematic Diagram
December 2004
Rev. 1
1/13
LDS3985 SERIES
Table 1: Absolute Maximum Ratings
Symbol
Parameter
VI
DC Input Voltage
VO
DC Output Voltage
VINH
INHIBIT Input Voltage
Value
Unit
-0.3 to 6 (*)
V
-0.3 to VI+0.3
V
V
IO
Output Current
-0.3 to VI+0.3
Internally limited
PD
Power Dissipation
Internally limited
TSTG
Storage Temperature Range
-65 to 150
°C
TOP
Operating Junction Temperature Range
-40 to 125
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) The input pin is able to withstand non repetitive spike of 6.5V for 200ms.
Table 2: Thermal Data
Symbol
SOT23-5L
DFN6
Unit
Rthj-case Thermal Resistance Junction-case
Parameter
81
10
°C/W
Rthj-amb Thermal Resistance Junction-ambient
255
55
°C/W
Table 3: Order Codes
SOT23-5L
DFN6
OUTPUT VOLTAGES
LDS3985M125R (*)
LDS3985M135R (*)
LDS3985M15R (*)
LDS3985M18R
LDS3985M20R (*)
LDS3985M21R (*)
LDS3985M22R (*)
LDS3985M25R
LDS3985M26R (*)
LDS3985M27R (*)
LDS3985M28R
LDS3985M285R (*)
LDS3985M29R
LDS3985M30R (*)
LDS3985M31R (*)
LDS3985M32R (*)
LDS3985M33R
LDS3985M47R (*)
LDS3985M48R (*)
LDS3985M49R (*)
LDS3985M50R (*)
LDS3985PM12R (*)
LDS3985PM13R (*)
LDS3985PM15R (*)
LDS3985PM18R
LDS3985PM20R (*)
LDS3985PM21R (*)
LDS3985PM22R (*)
LDS3985PM25R
LDS3985PM26R (*)
LDS3985PM27R (*)
LDS3985PM28R
LDS3985PM285R (*)
LDS3985PM29R (*)
LDS3985PM30R (*)
LDS3985PM31R (*)
LDS3985PM32R (*)
LDS3985PM33R
LDS3985PM47R (*)
LDS3985PM48R (*)
LDS3985PM49R (*)
LDS3985PM50R (*)
1.25 V
1.35 V
1.5 V
1.8 V
2.0 V
2.1 V
2.2 V
2.5 V
2.6 V
2.7 V
2.8 V
2.85 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
4.7 V
4.8 V
4.9 V
5.0 V
(*) Available on request.
2/13
LDS3985 SERIES
Figure 2: Connection Diagram (top view for SOT, top through view for DFN6)
SOT23-5L
DFN6
Table 4: Pin Description
Pin N°
SOT23-5L
Pin N°
DFN6
Symbol
1
1
VI
2
3
5
6
GND
VINH
4
4
BYPASS
5
3
VO
-
2
N.C.
Name and Function
Input Voltage of the LDO
Common Ground
Inhibit Input Voltage: ON MODE when VINH ≥ 1.2V, OFF MODE when VINH ≤
0.4V (Do not leave floating, not internally pulled down/up)
Bypass Pin: Connect an external capacitor (usually 10nF) to minimize noise
voltage
Output Voltage of the LDO
Not Connect.
Figure 3: Typical Application Circuit
3/13
LDS3985 SERIES
Table 5: Electrical Characteristics For LDS3985 (Tj = 25°C, VI = VO(NOM) +0.5V, CI = 1µF, C O = 2.2µF
CBYP = 33nF, IO = 1mA, VINH = 1.4V, unless otherwise specified)
Symbol
Parameter
VI
Operating Input Voltage
VO
Output Voltage < 2.5V
VO
Output Voltage ≥ 2.5V
Test Conditions
Min.
Typ.
Max.
Unit
2.5
6
V
IO = 1 mA
-50
50
mV
TJ= -40 to 125°C
-75
75
-2
2
IO = 1 mA
-3
3
% of
VO(NOM)
∆VO
Line Regulation (Note 1)
VI = VO(NOM) + 0.5 to 6 VTJ= -40 to 125°C
-0.1
0.1
%/V
VO = 4.7 to 5V
-0.19
∆VO
Load Regulation
IO = 1 mA to 300mA
TJ= -40 to 125°C
VO ≤ 2.5V
0.005
0.01
%/mA
∆VO
Load Regulation
IO = 1 mA to 300mA
TJ= -40 to 125°C
VO ≥ 2.5V
0.0008
0.004
%/mA
∆VO
Output AC Line Regulation VI = VO(NOM) + 1 V, IO = 300mA,
(Note 2)
tR= tF = 30µs
IO = 0
Quiescent Current
ON MODE: VINH = 1.24V
TJ= -40 to 125°C
IO = 0
TJ= -40 to 125°C
IQ
5
200
TJ= -40 to 125°C
300
0.003
TJ= -40 to 125°C
Dropout Voltage (Note 3)
µA
150
OFF MODE: VINH = 0.4V
VDROP
mVPP
85
IO = 0 to 300mA
IO = 0 to 300mA
0.19
1.5
IO = 1mA
IO = 1mA
0.4
TJ= -40 to 125°C
2
IO = 150mA
IO = 150mA
60
TJ= -40 to 125°C
100
IO = 300mA
IO = 300mA
mV
150
TJ= -40 to 125°C
250
Short Circuit Current
RL = 0
600
mA
SVR
Supply Voltage Rejection
f = 1KHz
VI = VO(NOM)+0.25V ±
VRIPPLE = 0.1V, IO= 50mA f = 10KHz
For VO(NOM) < 2.5V, VI=2.55V
55
50
dB
IO(PK)
Peak Output Current
VO ≥ VO(NOM) - 5%
550
mA
VINH
VI = 2.5V to 6V
IINH
Inhibit Input Logic Low
Inhibit Input Logic High
Inhibit Input Current
eN
Output Noise Voltage
BW = 10 Hz to 100 KHz
tON
Turn On Time (Note 4)
CBYP = 33 nF
Thermal Shutdown
Note 5
Output Capacitor
Capacitance (Note 6)
ESR
ISC
TSHDN
CO
300
TJ= -40 to 125°C
0.4
V
1.4
VINH = 0.4V
VI = 6V
CO = 2.2 µF
±1
nA
30
µVRMS
240
µs
160
2.2
5
°C
22
5000
µF
mΩ
Note 1: For VO(NOM) < 2V VI = 2.5V
Note 2: For VO(NOM) =1.25V VI = 2.5V
Note 3: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply for input voltages below 2.5V.
Note 4: Turn -on time is time measured between the enable input just exceeding VINH High Value and the output voltage just reaching 95%
of its nominal value
Note 5: Typical thermal protection hysteresis is 20°C
4/13
LDS3985 SERIES
TYPICAL PERFORMANCE CHARACTERISTICS (Tj = 25°C, VI = VO(NOM) +0.5V, CI = 1µF, CO = 2,2µF,
CBYP = 33nF, IO = 1mA, VINH = 1.4V, unless otherwise specified)
Figure 4: Output Voltage vs Temperature
Figure 7: Shutdown Voltage vs Temperature
Figure 5: Output Voltage vs Temperature
Figure 8: Shutdown Voltage vs Temperature
Figure 6: Output Voltage vs Temperature
Figure 9: Line Regulation vs Temperature
5/13
LDS3985 SERIES
Figure 10: Line Regulation vs Temperature
Figure 13: Quiescent Current vs Temperature
Figure 11: Line Regulation vs Temperature
Figure 14: Quiescent Current vs Temperature
Figure 12: Quiescent Current vs Temperature
Figure 15: Supply Voltage Rejection vs
Frequency
6/13
LDS3985 SERIES
Figure 16: Dropout Voltage vs Temperature
Figure 18: Inhibit Transient
VI = 5V, IO = 1mA, VINH = 0 to 1.2V, CI = CO = 1µF (cer),
CBYP = 10nF, TR = TF = 1µs
Figure 17: Dropout Voltage vs Output Current
7/13
LDS3985 SERIES
SOT23-5L MECHANICAL DATA
mm.
mils
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
0.90
1.45
35.4
57.1
A1
0.00
0.10
0.0
3.9
A2
0.90
1.30
35.4
51.2
b
0.35
0.50
13.7
19.7
C
0.09
0.20
3.5
7.8
D
2.80
3.00
110.2
118.1
E
1.50
1.75
59.0
68.8
e
0.95
37.4
H
2.60
3.00
102.3
118.1
L
0.10
0.60
3.9
23.6
.
7049676C
8/13
LDS3985 SERIES
DFN6 (3x3) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
0.80
1.00
31.5
39.4
A1
0
0.05
0.0
2.0
A2
0.65
0.75
25.6
29.5
A3
0.20
b
0.33
D
2.90
D2
1.92
E
2.90
E2
1.11
e
L
3.00
0.43
13.0
3.10
114.2
2.12
75.6
3.10
114.2
1.31
43.7
0.95
0.20
L1
0.45
118.1
122.0
83.5
118.1
122.0
51.6
7.9
17.7
9.4
0.13
0.20
16.9
37.4
0.24
L2
K
3.00
7.9
5.1
7.9
7387339A
9/13
LDS3985 SERIES
Tape & Reel SOT23-xL MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MIN.
TYP.
180
13.0
13.2
MAX.
7.086
C
12.8
D
20.2
0.795
N
60
2.362
T
10/13
MAX.
0.504
0.512
14.4
0.519
0.567
Ao
3.13
3.23
3.33
0.123
0.127
0.131
Bo
3.07
3.17
3.27
0.120
0.124
0.128
Ko
1.27
1.37
1.47
0.050
0.054
0.0.58
Po
3.9
4.0
4.1
0.153
0.157
0.161
P
3.9
4.0
4.1
0.153
0.157
0.161
LDS3985 SERIES
Tape & Reel QFNxx/DFNxx (3x3) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
330
13.2
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
MAX.
0.504
0.519
18.4
0.724
Ao
3.3
0.130
Bo
3.3
0.130
Ko
1.1
0.043
Po
4
0.157
P
8
0.315
11/13
LDS3985 SERIES
Table 6: Revision History
Date
Revision
02-Dic-2004
1
12/13
Description of Changes
First Release.
LDS3985 SERIES
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
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by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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