WEDC EDI8L32128C12AC 128kx32 cmos high speed static ram Datasheet

EDI8L32128C
White Electronic Designs
128Kx32 CMOS High Speed Static RAM
FEATURES

128Kx32 bit CMOS Static

Random Access Memory Array


DESCRIPTION

Fast Access Times: 12, 15, 17, 20, and 25ns

Individual Byte Enables

User Configurable Organization with Minimal
Additional Logic

Master Output Enable and Write Control

TTL Compatible Inputs and Outputs

Fully Static, No Clocks
The EDI8L32128C is a high speed, high performance,
four megabit density Static RAM organized as a 128Kx32
bit array.
Four Chip Enables, Write Control, and Output Enable
provide the user with a flexible memory solution. The user
may independently enable each of the four bytes, and,
with minimal additional peripheral logic, the unit may be
configured as a 256Kx16 or 512Kx8 array.
Fully asynchronous circuitry is used, requiring no clocks or
refreshing for operation and providing equal access and
cycle times for ease of use.
Surface Mount Package

68 Lead PLCC, No. 99 (JEDEC MO-47AE)

Small Footprint, 0.990 Sq. In.

Multiple Ground Pins for Maximum Noise
Immunity
The EDI8L32128C, allows 4 megabits of memory to be
placed in less than 0.990 square inches of board space; a
savings of 0.885 square inches over four standard 128Kx8
components.
NOTE: Solder Reflow temperature should not exceed 230°C
Single +5V (±5%) Supply Operation
FIG. 1 PIN CONFIGURATION
TOP VIEW
DQ16
NC
NC
E3#
E2#
E1#
E0#
NC
VCC
NC
NC
G#
W#
A16
A15
A14
DQ15
PIN DESCRIPTION
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
AØ-16
EØ-3#
W#
G#
DQØ-31
VCC
VSS
NC
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
DQ14
DQ13
DQ12
VSS
DQ11
DQ10
DQ9
DQ8
VCC
DQ7
DQ6
DQ5
DQ4
VSS
DQ3
DQ2
DQ1
BLOCK DIAGRAM
A0-A16
G#
W#
E0#
E1#
E2#
E3#
17
128Kx32
Memory
Array
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
DQ31
A6
A5
A4
A3
A2
A1
A0
VCC
A13
A12
A11
A10
A9
A8
A7
DQ0
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
DQ24
DQ25
DQ26
DQ27
VSS
DQ28
DQ29
DQ30
Address Inputs
Chip Enables (One per Byte)
Master Write Enable
Master Output Enable
Common Data Input/Output
Power (+5V±5%)
Ground
No Connection
NOTE: Pin 2 & 67 on the 64Kx32 (EDI8L3265C) and the 256Kx32 (EDI8L32256C) are word select pins.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August, 2002
Rev. 6
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8L32128C
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS*
Voltage on any pin relative to VSS
Operating Temperature TA (Ambient)
Commercial
Industrial
Storage Temperature
Power Dissipation
Output Current.
Junction Temperature, TJ
RECOMMENDED DC OPERATING CONDITIONS
-0.5V to 7.0V
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
0°C to + 70°C
-40°C to +85°C
-55°C to +125°C
4 Watts
20 mA
175°C
G#
X
H
X
L
X
Mode
Standby
Output Disable
Output Disable
Read
Write
Output
High Z
High Z
High Z
DOUT
DIN
Typ
5.0
0
---
Max
5.25
0
VCC+0.5
0.8
Units
V
V
V
V
CAPACITANCE
Parameter
Address Lines
Data Lines
Write & Output Enable Lines
Chip Enable Lines/Byte Select
TRUTH TABLE
W#
X
H
X
H
L
Min
4.75
0
2.2
-0.3
(f = 1.0MHZ, VIN = VCC or VSS)
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
E#
H
L
L
L
L
Sym
VCC
VSS
VIH
VIL
Sym
CA
CD/Q
W#, G#
E0-3#
Max
40
10
40
8
Unit
pF
pF
pF
pF
Power
ICC2,ICC3
ICC1
ICC1
ICC1
ICC1
DC ELECTRICAL CHARACTERISTICS
Parameter
Sym
Operating Power Supply Current
ICC1
Standby (TTL) Supply Current
ICC2
Full Standby CMOS Supply Current
ICC3
Input Leakage Current
Output Leakage Current
Output High Volltage
Output Low Voltage
ILI
ILO
VOH
VOL
Conditions
Max
Typ
W# = VIL, II/O = 0mA,
Min Cycle
E# ≥ VIH, VIN ≤ VIL or
VIN ≥ VIH, f = ØMHZ
E# ≥ VCC -0.2V
VIN ≥ VCC -0.2V or
VIN ≤ 0.2V
VIN = 0V to VCC
V I/O = 0V to VCC
IOH = -4.0mA
IOL = 8.0mA
620
Units
12*
15
17
20/25
720
680
640
600
mA
160
160
160
160
mA
20
20
20
20
mA
±10
±10
2.4
0.4
µA
µA
V
V
Typical: TA = 25°C, VCC = 5.0V
AC TEST CONDITIONS
Figure 2
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
Figure 3
VCC
VCC
480 Ω
Q
480 Ω
NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 3)
Q
255 Ω
30 pF
255 Ω
VSS to 3.0V
5ns
1.5V
Figure 2
5 pF
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August, 2002
Rev. 6
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8L32128C
White Electronic Designs
AC CHARACTERISTICS - READ CYCLE
Symbol
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z(1)
JEDEC
tAVAV
tAVQV
tELQV
tELQX
tEHQZ
tAVQX
tGLQV
tGLQX
tGHQZ
Alt.
tRC
tAA
tACS
tCLZ
tCHZ
tOH
tOE
tOLZ
tOHZ
12ns
Min
12
15ns
Max
Min
15
17ns
Max
12
12
Min
17
15
15
2
3
8
6
4
5
3
3
2
10
3
8
2
6
Max
25
25
10
8
2
Min
25
3
3
5
25n
Max
20
20
8
3
2
Min
20
17
17
3
7
3
20ns
Max
10
0
8
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE 1: Parameter guaranteed, but not tested.
FIG. 4 READ CYCLE 1 - W# HIGH, G#, E# LOW
tAVAV
ADDRESS 1
A
ADDRESS 2
tAVQX
tAVQV
Q
DATA 1
DATA 2
FIG. 5 READ CYCLE 2 - W# HIGH
tAVAV
A
tAVQV
E#
tELQV
tELQX
tEHQZ
G#
tGLQV
tGLQX
tGHQZ
Q
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August, 2002
Rev. 6
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8L32128C
White Electronic Designs
AC CHARACTERISTICS - WRITE CYCLE
Symbol
Parameter
12ns
15ns
Max
Min
17ns
Min
Write Cycle Time
tAVAV
tWC
12
15
17
20
25
ns
Chip Enable to End of Write
tELWH
tELEH
tCW
tCW
8
8
9
9
10
10
15
15
20
20
ns
ns
Address Setup Time
tAVWL
tAVEL
tAS
tAS
0
0
0
0
0
0
0
0
0
0
ns
ns
Address Valid to End of Write
tAVWH
tAVEH
tAW
tAW
9
9
10
10
12
12
15
15
15
15
ns
ns
Write Pulse Width
tWLWH
tWLEH
tWP
tWP
9
9
10
10
12
12
15
15
15
15
ns
ns
Write Recovery Time
tWHAX
tEHAX
tWR
tWR
0
0
0
0
0
0
0
0
0
0
ns
ns
Data Hold Time
tWHDX
tEHDX
tDH
tDH
0
0
0
0
0
0
0
0
0
0
ns
ns
Write to Output in High Z (1)
tWLQZ
tWHZ
0
Data to Write Time
tDVWH
tDVEH
tDW
tDW
5
5
6
6
8
8
8
8
12
12
ns
ns
Output Active from End of Write (1)
tWHQX
tWLZ
2
2
2
2
2
ns
6
Max
0
7
Min
0
Max
7
Min
0
Max
Units
Alt.
0
Min
25ns
JEDEC
5
Max
20ns
10
ns
NOTE: Parameter guaranteed, but not tested.
FIG. 6 WRITE CYCLE 1 - W# CONTROLLED
tAVAV
A
tGLAX
G#
tAVWH
tWHAX
tELWH
E#
tAVWL
tWLWH
W#
tDVWH
D
tWHDX
DATA VALID
tWHQX
tWLQZ
HIGH Z
Q
FIG. 7 WRITE CYCLE 2 - E# CONTROLLED
tAVAV
A
tAVEH
tEHAX
tELEH
E#
tAVEL
tWLEH
W#
tDVEH
D
Q
tEHDX
DATA VALID
HIGH Z
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August, 2002
Rev. 6
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8L32128C
White Electronic Designs
PACKAGE DESCRIPTION
Package No. 99: 68 LEAD PLCC
JEDEC MO-47AE
0.995
Max
0.956
Max
0.995 0.956
Max Max
0.180
Max
0.020
0.015
0.040
Max
0.930
0.890
0.050
BSC
0.115
Max
ALL DIMENSIONS ARE IN INCHES
ORDERING INFORMATION
Commercial (0°C to +70°C)
Part Number
EDI8L32128C12AC
EDI8L32128C15AC
EDI8L32128C17AC
EDI8L32128C20AC
EDI8L32128C25AC
Speed
(ns)
12
15
17
20
25
Industrial (-40°C to +85°C)
Package
No.
99
99
99
99
99
Part Number
EDI8L32128C15AI
EDI8L32128C17AI
EDI8L32128C20AI
Speed
(ns)
15
17
20
Package
No.
99
99
99
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August, 2002
Rev. 6
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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