1CY7C266 CY7C266 8Kx8 Power-Switched and Reprogrammable PROM Features powers down into a low-power standby mode. It is packaged in a 600-mil-wide package. The reprogrammable packages are equipped with an erasure window; when exposed to UV light, these PROMs are erased and can then be reprogrammed. The memory cells utilize proven EPROM floating-gate technology and byte-wide intelligent programming algorithms. • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns (Commercial) • Low power — 660 mW (Commercial) • Super low standby power — Less than 85 mW when deselected • EPROM technology 100% programmable • 5V ±10% VCC, commercial and military • TTL-compatible I/O • Direct replacement for 27C64 EPROMs The CY7C266 is a plug-in replacement for EPROM devices. The EPROM cell requires only 12.5V for the super voltage and low-current requirements allow for gang programming. The EPROM cells allow for each memory location to be tested 100%, as each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that after customer programming, the product will meet DC and AC specification limits. Functional Description The CY7C266 is a high-performance 8192-word by 8-bit CMOS PROM. When deselected, the CY7C266 automatically Reading is accomplished by placing an active LOW signal on OE and CE. The contents of the memory location addressed by the address lines (A0 through A12) will become available on the output lines (O0 through O7). Logic Block Diagram Pin Configurations CerDIP Top View O7 A0 VCC A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND A1 A2 A3 ROW ADDRESS PROGRAMMABLE ARRAY O6 MULTIPLEXER A4 O5 A5 A6 A7 ADDRESS DECODER O4 COLUMN ADDRESS O3 A8 A9 A10 1 2 3 4 5 6 7 8 9 7C266 10 11 12 13 28 27 26 14 15 25 24 23 22 21 20 19 18 17 16 VCC VCC NC A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 LCC Top View A12 A7 A 12 VCC NC VCC VCC NC A11 O2 A6 A5 A4 A3 A2 A1 A0 NC O0 POWER DOWN O1 O0 OE Cypress Semiconductor Corporation Document #: 38-04005 Rev. *B A8 A9 A11 NC OE A10 CE O7 O6 O1 O2 GND NC O3 O4 O5 CE 4 3 2 1 32 31 30 29 5 28 6 27 7 26 8 25 9 24 10 23 11 7C266 22 12 21 13 14151617 181920 • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised December 27, 2002 CY7C266 Selection Guide 7C266-20 7C266-25 7C266-45 Unit 20 25 45 ns Maximum Access Time Maximum Operating Current Commercial 120 120 100 mA Maximum Standby Current Commercial 15 15 15 mA Maximum Ratings[1] DC Program Voltage .................................................... 13.0V (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential (Pin 28 to Pin 14) ........................................... –0.5V to +7.0V DC Voltage Applied to Outputs in High Z State ............................................... –0.5V to +7.0V Static Discharge Voltage........................................... > 2001V (per MIL-STD-883, Method 3015) Latch-Up Current.................................................... > 200 mA UV Exposure ................................................ 7258 Wsec/cm2 Operating Range Range Ambient Temperature VCC Commercial 0°C to +70°C 5V ± 10% DC Input Voltage............................................ –3.0V to +7.0V Electrical Characteristics Over the Operating Range[2] 7C266-20 Parameter Description Test Conditions Min. 7C266-25 Max. VOH Output HIGH Voltage VCC = Min., IOH = –2.0 mA Com’l 2.4 VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA Com’l VIH Input HIGH Voltage VIL Input LOW Voltage IIX Input Current VCD Input Diode Clamp Voltage IOZ Output Leakage Current VOL < VOUT < VOH, Output Disabled –40 +40 IOS Output Short Circuit Current[3] VCC = Max., VOUT = GND –20 –90 ICC Power Supply Current VCC = Max., VIN = 2.0V, IOUT = 0 mA Com’l ISB Standby Supply Current Chip Enable Inactive, CE > VIH, IOUT = 0 mA Com’l Min. Max. 2.4 Unit V 2.4 0.4 2.0 0.4 2.0 0.8 GND < VIN < VCC –10 V V 0.8 V +10 µA –40 +40 µA –20 –90 mA 120 120 mA 15 15 mA +10 –10 Note 3 Notes: 1. The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. See the “Introduction to CMOS PROMs” section of the Cypress Data Book for general information on testing. 3. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. Document #: 38-04005 Rev. *B Page 2 of 11 CY7C266 Electrical Characteristics Over the Operating Range[2] (continued) 7C266-45 Parameter Description Test Conditions VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA VOL Output LOW Voltage VCC = Min., IOL = 16.0 mA VIH Input HIGH Voltage VIL Input LOW Voltage IIX Input Current VCD Input Diode Clamp Voltage IOZ Output Leakage Current VOL < VOUT < VOH, Output Disabled IOS Output Short Circuit Current[3] VCC = Max., VOUT = GND ICC Power Supply Current VCC = Max., VIN = 2.0V, IOUT = 0 mA ISB Standby Supply Current Chip Enable Inactive, CE > VIH, IOUT = 0 mA Min. Max. Unit 2.4 V 0.4 V 2.0 V 0.8 V +10 mA –10 +10 mA –20 –90 mA Com’l 100 mA Com’l 15 mA GND < VIN < VCC –10 Note 3 Capacitance[2] Parameter Description CIN Input Capacitance COUT Output Capacitance Document #: 38-04005 Rev. *B Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. Unit 10 pF 10 pF Page 3 of 11 CY7C266 AC Test Loads and Waveforms Test Load for -20 through -25 speeds R1 500 (658Ω MIL) R1 500Ω (658Ω MIL) 5V 5V OUTPUT 3.0V OUTPUT R2 333Ω (403Ω MIL) 30 pF INCLUDING JIG AND SCOPE GND < 5 ns < 5 ns INCLUDING JIG AND SCOPE (a) NormalLoad Equivalent to: R2 333Ω (403Ω MIL) 5 pF 90% 10% 90% 10% (b) HighZ Load THÉ VENIN EQUIVALENT OUTPUT RTH 200 250 MIL Test Load for -35 through -45 speeds R1250 Ω R1 250Ω 5V 5V OUTPUT OUTPUT R2167 Ω 30pF INCLUDING JIG AND SCOPE INCLUDING JIG AND SCOPE (c) Normal Load Equivalent to: R2167 Ω 5 pF (d) High Z Load THÉ VENIN EQUIVALENT OUTPUT RTH 100Ω 2.0V Switching Characteristics Over the Operating Range[2] 7C266-20 Parameter Description Min. Max. 7C266-25 Min. Max. 7C266-45 Min. Max. Unit tAA Address to Output Valid 20 25 45 ns tHZCE Chip Enable Inactive to High Z 25 30 45 ns tHZOE Output Enable Inactive to High Z 12 12 20 ns tAOE Output Enable Active to Output Valid 12 12 20 ns tACE Chip Enable Active to Output Valid 45 ns tOHA Data Hold from Address Change tPU Chip Enable Active to Power-up 25 30 45 ns tPD Chip Enable Inactive to Power-down 25 30 45 ns Document #: 38-04005 Rev. *B 25 3 30 3 3 ns Page 4 of 11 CY7C266 Erasure Characteristics result if the EPROM is exposed to high-intensity UV light for an extended period of time. Wavelengths of light less than 4000 angstroms begin to erase the devices in the windowed package. For this reason, an opaque label should be placed over the window if the EPROM is exposed to sunlight or fluorescent lighting for extended periods of time. 7258 Wsec/cm2 is the recommended maximum dosage. Programming Modes Programming support is available from Cypress as well as from a number of third party software vendors. For detailed programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. The recommended dose of ultraviolet light for erasure is a wavelength of 2537 angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time would be approximately 35 minutes. The CY7C266 needs to be within 1 inch of the lamp during erasure. Permanent damage may Table 1. Mode Selection Pin Function[4, 5] Normal Operation A8 A9 A10 A11 Program VFY PGM LAT A8 A9 A10 Mode Read A12 CE OE D7–D0 NA NA CE VPP D7–D0 A11 A12 VIL VIL O7–O0 Standby X X X X X VIH X Three-Stated Output Disable A8 A9 A10 A11 A12 VIL VIH Three-Stated Program VIHP VILP VILP VILP VILP VILP VPP D7–D0 Program Verify VILP VIHP VILP VILP VILP VILP VPP O7–O0 Program Inhibit VIHP VIHP VILP VILP VILP VILP VPP Three-Stated Blank Check VILP VIHP VILP VILP VILP VILP VPP O7–O0 Notes: 4. X = “don’t care” but must not exceed VCC + 5%. 5. Address A8–A12 must be latched through lines A0–A4 in Programming modes. CerDIP Top View 28 27 26 14 15 25 24 23 22 21 20 19 18 17 16 VPP NC NC VFY PGM NA VPP LAT CE D7 D6 D5 D4 D3 A7 NA VCC NC VCC VCC NC 1 2 3 4 5 6 7C266 7 8 9 10 11 12 13 A6 A5 A4/A12 A3/A11 A2/A1 A1/A90 A0/A8 NC D0 4 3 2 1 32 31 30 29 5 28 6 7C266 27 7 26 8 25 9 24 10 23 11 22 12 21 13 14151617 181920 VFY PGM NA NC VPP LAT CE D7 D6 D1 D2 VSS NC D3 D4 D5 NC NA A7 A6 A5 A4/A 12 A3/A 11 A2/A 10 A1 /A9 A0 /A8 D0 D1 D2 VSS LCC/PLCC Top View Figure 1. Programming Pinout Document #: 38-04005 Rev. *B Page 5 of 11 CY7C266 Typical DC and AC Characteristics 1.2 CC 1.4 1.2 1.0 TA = 25°C f = fMAX 0.8 4.5 5.0 5.5 1.1 1.0 0.9 0.8 −55 6.0 25 SUPPLY VOLTAGE(V) 1.6 1.4 1.2 1.0 0.8 125 25 OUTPUT SINK CURRENT (mA) TA = 25°C 0.4 4.0 35 50 30 40 30 20 10 0 5.0 1.0 2.0 3.0 6.0 20 15 10 VCC = 4.5V TA = 25°C 5 0 5.5 25 4.0 0 0 OUTPUT VOLTAGE (V) 200 400 600 800 1000 CAPACITANCE (pF) NORMALIZED SUPPLY CURRENT vs. CYCLE PERIOD 175 1.05 150 1.00 125 100 75 VCC = 5.0V TA = 25°C 50 4.5 TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 60 OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 25 VCC = 5.5V TA = 25°C 0.95 0.90 0.85 0.80 0.75 1.0 2.0 3.0 OUTPUT VOLTAGE (V) Document #: 38-04005 Rev. *B 0.6 OUTPUT SOURCE CURRENT vs. VOLTAGE AMBIENT TEMPERATURE (°C) 0 0.0 0.8 SUPPLY VOLTAGE(V) DELTA tAA (ns) OUTPUT SOURCE CURRENT (mA) NORMALIZED ACCESS TIME vs. TEMPERATURE 0.6 –55 125 1.0 AMBIENT TEMPERATURE(°C) NORMALIZED I CC 0.6 4.0 NORMALIZED ACCESS TIME 1.2 NORMALIZED I NORMALIZED I CC 1.6 NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 4.0 0.70 0 25 50 75 100 CYCLE PERIOD (ns) Page 6 of 11 CY7C266 Ordering Information] Speed (ns) 20 Ordering Code Package Name Package Type Operating Range Commercial CY7C266-20JC J64 28-Lead Plastic Leaded Chip Carrier CY7C266-20WC W16 28-Lead (600-Mil) Windowed CerDIP 25 CY7C266-25JC J64 28-Lead Plastic Leaded Chip Carrier Commercial 45 CY7C266-45PC P15 28-Lead (600-Mil) Molded DIP Commercial Package Diagrams 28-Lead (600-Mil) CerDIP D16 MIL-STD-1835 D-10 Config. A 51-80019-** Document #: 38-04005 Rev. *B Page 7 of 11 CY7C266 Package Diagrams (continued) 32-Pin Rectangular Leadless Chip Carrier L55 MIL-STD-1835 C-12 51-80068-** 28-Lead (600-Mil) Molded DIP P15 51-85017-*A Document #: 38-04005 Rev. *B Page 8 of 11 CY7C266 Package Diagrams (continued) 32-Pin Windowed Rectangular Leadless Chip Carrier Q55 MIL-STD-1835 C-12 51-80103-*A Document #: 38-04005 Rev. *B Page 9 of 11 CY7C266 Package Diagrams (continued) 28-Lead (600-Mil) Windowed CerDIP W16 MIL-STD-1835 D-10 Config. A 51-80020-** All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-04005 Rev. *B Page 10 of 11 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C266 Document History Page Document Title: CY7C266 8K x 8 Power Switched and Reprogrammable PROM Document Number: 38-04005 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 113861 03/08/02 DSG Change from Spec number: 38-00086 to 38-04005 *A 118897 10/09/02 GBI Update ordering information *B 122246 12/27/02 RBI Add power up requirements to Operating Conditions information Document #: 38-04005 Rev. *B Page 11 of 11