APL3517/A/B Compact, Small Package 100mA Power-Distribution Switches General Description Features • • • • • • • • • • • • • • High Side N-MOSFET with Internal Charge Pump 0.1A Continuous Current The APL3517/A/B is a power-distribution switch with current- limiting function and output OVP protections that can Built-in Soft-Start Wide Supply Voltage Range deliver current up to 0.1A. The device incorporates a 250mΩ N-channel MOSFET power switch. Current-Limit Protection Input Voltage Under Voltage Lockout Protection The device integrates some protection features, including current-limit protection, output over-voltage protection, Reverse Current Blocking when Switch Disabled Output OVP Protection over-temperature protection and UVLO. The current-limit protection can protect down-stream devices from cata- Reverse Current-Limit Protection Output Discharge strophic failure by limiting the output current at currentlimit threshold during over-load or short-circuit events. Over-Temperature Protection UL Approved-File No.E328191 The output over-voltage protection can prevent current flowing from VOUT to VIN when an abnormally high volt- Nemko IEC 60950-1 : 2005(2nd Edition); Am 1:2009 CB; EN60950-1:2006; A11: 2009; A1: age exists in VOUT. The over-temperature protection function shuts down the N-channel MOSFET power switch 2010 Scheme Certified, No 65711 Lead Free and Green Devices Available (RoHS when the junction temperature rises beyond 140 C and will automatically turns on the power switch when the Compliant) temperature drops by 20 C. The UVLO function keeps the power switch in off state until there is a valid input o o Applications • • • HDMI Port Protection Switches voltage present. The device is available in lead free SOT-23-3 and Bluetooth Protection Switches SOT-23-5 packages. High-side Power Protection Switches Pin Configuration Simplified Application Circuit GND 1 VIN VOUT 3 VIN VOUT 2 APL3517 APL3517 SOT-23-3 GND VIN GND 1 EN 2 VOUT 3 5 NC 4 VIN APL3517A SOT-23-5 VOUT APL3517A/B 5 NC GND 1 ENB 2 VOUT 3 EN/ENB GND 4 VIN APL3517B SOT-23-5 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 1 www.anpec.com.tw APL3517/A/B Ordering and Marking Information Package Code A : SOT-23-3 B : SOT-23-5 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Enable Function Blank : No Enable Function A : Active High B : Active Low Assembly Material G : Halogen and Lead Free Device APL3517 Assembly Material Handling Code Temperature Range Package Code Enable Function APL3517 A: L17X X - Date Code APL3517A B: L7AX X - Date Code APL3517B B: L7BX X - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings Symbol VIN VOUT VEN, VENB TJ (Note 1) Parameter Rating Unit VIN to GND Voltage -0.3 ~ 6.5 V VOUT to GND Voltage -0.3 ~ 6.5 V EN, ENB to GND Voltage -0.3 ~ 6.5 Maximum Junction Temperature TSTG Storage Temperature TSDR Maximum Lead Soldering Temperature (10 Seconds) V -40 ~ 150 o -65 ~ 150 o 260 o C C C Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics (Note 2) Symbol θJA Parameter Typical Value Junction-to-Ambient Resistance in free air (SOT-23-3, SOT-23-5) Unit o 260 C/W Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 2 www.anpec.com.tw APL3517/A/B Recommended Operating Conditions (Note 3) Symbol Parameter Range Unit 2.7~ 5.25 V VIN VIN Input Voltage IOUT OUT Output Current 0 ~ 0.1 TA Ambient Temperature -40 ~ 85 o -40 ~ 125 o TJ Junction Temperature A C C Note 3: Refer to the typical application circuit. Electrical Characteristics o VIN=5V, VEN=5V or VENB=0V and TA=25 C (unless otherwise noted). Symbol Parameter APL3517/A/B Test Conditions Unit Min. Typ. Max. 2.35 2.5 2.65 V - 0.1 - V No load, VEN = Low (or VENB = High) - - 1 µA No load, VEN =High (or VENB = High) - 100 150 µA OUT Leakage Current VOUT tied to ground, VEN =Low (or VENB = High) - - 1 µA OUT Input Current VOUT=5V, VIN = 0V, no matter VEN = Low or High - - 1 µA IOUT=0.1A, TJ=25oC - 250 350 mΩ IOUT=0.1A, TJ=-40~125oC - - 400 mΩ 0.25 0.37 0.5 A 0.20 - - A 80 190 300 mA UNDER-VOLTAGE LOCKOUT VIN UVLO Threshold Voltage VIN rising VIN UVLO Hysteresis SUPPLY CURRENT ICC VIN Supply Current POWER SWITCH RDS(ON) Power Switch On Resistance CURRENT-LIMIT PROTECTIONS ILIM Current-Limit Threshold TJ=25oC, o TJ=-40~125 C OUTPUT OVER-VOLTAGE PROTECTS IRV Reverse Current Blocking Threshold VOUT - VIN=1V, TJ=25oC tRVDEG Reverse Current Blocking Deglitch Time Guaranteed by Design VOVP Output OVP Threshold - 0.7 - ms 5.3 5.45 5.6 V TOVD Output OVP Delay Time - 20 - µs 1 2.5 4 ms - 40 - Ω 2 - - V Input Logic Low - - 0.8 V EN, ENB Input Current - - 1 µA SOFT-START CONTROL PIN tSS Soft-Start Time OUTPUT DISCHARGE AND ENABLE VOUT Discharge Resistance VIN=5V, VEN=Low(or VENB=High), VOUT=1V Input Logic High VEN, VENB Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 3 www.anpec.com.tw APL3517/A/B Electrical Characteristics (Cont.) o VIN=5V, VEN=5V or VENB=0V and TA=25 C (unless otherwise noted). Symbol Parameter APL3517/A/B Test Conditions Unit Min. Typ. Max. - 140 - °C - 20 - °C OUTPUT TEMPERATURE PROTECTION (OTP) TOTP Over-Temperature Threshold TJ rising Over-Temperature Hysteresis Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 4 www.anpec.com.tw APL3517/A/B Typical Operating Characteristics UVLO Threshold Voltage vs . Junction Temperature Supply Current vs. Junction Temperature 160 VIN = 5V 2.60 150 2.55 Supply Current, ICC (µA) UVLO Threshold Voltage, VUVLO (V) 2.65 VIN Increasing 2.50 2.45 VIN Decreasing 2.40 140 130 120 110 2.35 -50 -25 0 25 50 75 100 100 -50 125 -25 Junction Temperature, TJ (oC) 75 100 125 Switch On Resistance vs. Input Voltage 300 VIN = 5V I OUT = 100mA Switch On Resistance, RDS(ON) (mΩ) Switch On Resistance, RDS( ON) (mΩ) 50 Junction Temperature, TJ ( C) 330 290 270 250 230 210 -50 -25 0 25 50 75 100 IOUT = 100mA 290 TJ = 25 oC 280 270 260 250 240 230 220 210 200 125 2.5 o 3.0 3.5 4.0 4.5 5.0 Input Voltage, VIN (V) Junction Temperature, TJ ( C) Current Limit Threshold vs . Input Voltage Current Limit Threshold vs . Junction Temperature 500 Current Limit Threshold, ILIM (mA) 500 Current Limit Threshold, ILIM (mA) 25 o Switch On Resistance vs. Junction Temperature 310 0 V IN = 5 V 450 400 350 300 250 200 -50 -25 0 25 50 75 400 350 300 250 200 100 125 2.5 Junction Temperature, TJ (oC) Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 450 3.0 3.5 4.0 4.5 5.0 Input Voltage, VIN (V) 5 www.anpec.com.tw APL3517/A/B Typical Operating Characteristics Reverse Current Blocking Threshold vs. Junction Temperature Output OVP Threshold vs . Junction Temperature 300 5.60 Reverse Current Blocking Threshold, IRV (mA) Output OVP Threshold, VOVP (V) VIN = 5V 5.55 5.50 5.45 5.40 5.35 5.30 -50 -25 0 25 50 75 280 260 VOUT = 5V 240 220 200 180 160 140 120 100 80 -50 100 125 o -25 0 25 50 75 100 125 o Junction Temperature, TJ ( C) Junction Temperature, TJ ( C) Reverse Current Blocking Threshold vs. Output Voltage EN pin Threshold Voltage vs . Input Voltage 300 2.0 1.9 1.8 1.7 1.6 1.5 Reverse Current Blocking Threshold, IRV (mA) EN pin Threshold Voltage , VEN (V) VIN = 3V VEN Increasing 1.4 1.3 1.2 1.1 VEN Decreasing 1.0 0.9 0.8 V IN = 4V 250 200 150 100 50 0 2.5 3.0 3.5 4.0 4.5 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.0 Output Voltage, VOUT (V) Input Voltage, VIN (V) Current-Limit Response vs. Output Peak Current Current-Limit Response (µs) 25 V IN=5V, TJ=25o C C IN=330µF, C OUT =0µF 20 15 10 5 0 0 2 4 6 8 10 Output Peak Current (A) Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 6 www.anpec.com.tw APL3517/A/B Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Power Off Power On V IN VIN 1 1 VOUT V OUT 2 2 IOUT I OUT 3 3 CIN=0.1µF, COUT=0.1µF, ROUT=50Ω CH1: VIN, 2V/Div, DC CH2: VOUT , 2V/Div, DC CH3: IOUT , 50mA/Div, DC TIME: 5ms/Div CIN=0.1µF, COUT=0.1µF, ROUT=50Ω CH1: VIN, 2V/Div, DC CH2: VOUT , 2V/Div, DC CH3: IOUT , 50mA/Div, DC TIME: 2ms/Div Over-Current Protection Short Circuit Response VIN 1 VIN 1 VOUT VOUT 2 2 IOUT IOUT 3 3 CIN=330µF, COUT=0µF, ROUT=Open → 0Ω CH1: VIN, 2V/Div, DC CH2: VOUT , 2V/Div, DC CH3: IOUT , 5A/Div, DC TIME: 400ns/Div Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 CIN=0.1µF, COUT=0.1µF, IOUT = 50Ω to 10Ω CH1: VIN, 2V/Div, DC CH2: VOUT , 2V/Div, DC CH3: IOUT , 200mA/Div, DC TIME: 50µs/Div 7 www.anpec.com.tw APL3517/A/B Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Reverse Current Protection Output Over-Voltage Protection IOUT 3 3 IOUT VIN VIN 1 1 VOUT VOUT 2 2 CIN=0.1µF, COUT =0.1µF VIN=4.5V ,VOUT =open →5V CH1: VIN, 2V/Div, DC CH2: VOUT , 2V/Div, DC CH3: IOUT , 0.5A/Div, DC TIME: 0.2ms/Div CIN=0.1µF, COUT =0.1µF, VOUT =open → 6V CH1: VIN, 2V/Div, DC CH2: VOUT , 2V/Div, DC CH3: IOUT , 1A/Div, DC TIME: 20µs/Div Enable Response Shutdown Response APL3517 B APL3517B VOUT VOUT 1 1 VENB VENB 2 2 IOUT IOUT 3 3 VENB=5 to 0V, CIN=0.1µF, COUT =0.1µF, ROUT =50Ω CH1: VOUT , 2V/Div, DC CH2: VENB , 5V/Div, DC CH3: IOUT , 100mA/Div, DC TIME: 1ms/Div Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 VENB=0 to 5V, CIN=0.1µF, COUT =0.1µF, ROUT =50Ω CH1: VOUT , 2V/Div, DC CH2: VENB, 5V/Div, DC CH3: IOUT , 100mA/Div, DC TIME: 40µs/Div 8 www.anpec.com.tw APL3517/A/B Pin Description PIN FUNCTION NO. NAME SOT-23-3 SOT-23-5 1 1 GND 2 3 VOUT 3 4 VIN - 2 EN/ENB - 5 NC Ground. Output Voltage Pin. The output voltage follows the input voltage. When EN is low or VIN is UVLO, the output voltage is discharged by an internal resistor. Power Supply Input Connect this pin to external DC supply. Pulling the ENB above 2V or EN below 0.8V will disable the device, and pulling ENB pin below 0.8V or EN above 2V will enable the device. The EN and ENB pins cannot be left floating. Not Connected Internally. Block Diagram VOUT VIN UVLO Charge Pump CurrentLimit Gate Driver and Control Logic OVP EN / ENB (SOT-23-5) OTP GND Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 9 www.anpec.com.tw APL3517/A/B Typical Application Circuit SOT-23-5 SOT-23-3 VIN 0.1µF 3 VIN VOUT 2 APL3517 VIN VOUT 4 VIN 3 VOUT 0.1µF 0.1µF 0.1µF VOUT APL3517A GND On 1 Off 2 EN GND 1 SOT-23-5 VIN 4 3 VIN VOUT VOUT 0.1µF 0.1µF APL3517B Off On 2 ENB GND 1 Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 10 www.anpec.com.tw APL3517/A/B Function Description VIN Under-voltage Lockout (UVLO) Output Discharge The APL3517/A/B power switch has a built-in under-volt- When the input voltage is under VIN UVLO Threshold or age lockout circuit to keep the output shut off until internal circuitry is operating properly. The UVLO circuit has hys- VEN=Low or VENB=High, the output discharge device is turned on to discharge the output voltage. teresis and a de-glitch feature so that it will typically ignore undershoot transients on the input. When input volt- Enable/Disable (SOT-23-5) age exceeds the UVLO threshold, the output voltage starts a soft-start to reduce the inrush current. Pulling the ENB above 2V or EN below 0.8V will disable Power Switch the device, and pulling ENB pin below 0.8V or EN above 2V will enable the device. The power switch is an N-channel MOSFET with a low RDS(ON). The internal power MOSFET does not have the When the IC is disabled the supply current is reduced to less than 1µA. The enable input is compatible with both body diode. When IC is in UVLO state, the MOSFET prevents a current flowing from the VOUT back to VIN and TTL and CMOS logic levels. The EN/ENB pins cannot be left floating. VIN to VOUT. Over-temperature Protection Current-Limit Protection o When the junction temperature exceeds 140 C, the internal thermal sense circuit turns off the power FET and The APL3517/A/B power switch provides the current-limit protection function. During current-limit, the devices limit allows the device to cool down. When the device’s junco tion temperature cools by 20 C, the internal thermal sense output current at current-limit threshold. For reliable operation, the device should not be operated in currentlimit for extended period time. circuit will enable the device, resulting in a pulsed output during continuous thermal protection. Thermal protec- Soft-Start tion is designed to protect the IC in the event of overtemperature conditions. For normal operation, the junc- The APLA3517/A/B has a built-in output soft-start control tion temperature cannot exceed TJ=+125oC. to limit the current surge during start-up. The soft-start interval is 2.5ms. Output Over-Voltage Protection The output over-voltage protection is implemented by 2 either sensing mechanisms. One is by sensing when VOUT voltage is above VOVP threshold, the internal power MOSFET is turned off. The other is by sensing when reverse current, flowing from VOUT to VIN, surpasses IRV. When the reverse current reachers the reverse current Blocking threshold, the device limits the reveres current at IRV threshold level. When the reverse current fault exists for more than 0.7ms, the internal power MOSFET is turned off. The internal power MOSFET is allowed to turnon once the output voltage gose below VIN-1V. Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 11 www.anpec.com.tw APL3517/A/B Application Information Input Capacitor Recommanded Minimum Footprit 0.1µF ceramic bypass capacitor from VIN to GND, located near the APL3517/A/B, is strongly recommended to sup- 0.037 0.057 press the ringing during short circuit fault event. Without the bypass capacitor, the output short may cause sufficient ringing on the input (from supply lead inductance) to damage internal control circuitry. 0.102 0.024 Layout Consideration The PCB layout should be carefully performed to maximize thermal dissipation and to minimize voltage drop, droop and EMI. The following guidelines must be 0.074 Unit : Inch SOT-23-3 considered: 1. Please place the input capacitors near the VIN pin as close as possible. 0.076 2. Output decoupling capacitors for load must be placed near the load as close as possible for decoupling high0.1 frequency ripples. 3. Locate APL3517/A/B and output capacitors near the load to reduce parasitic resistance and inductance for 0.05 excellent load transient performance. 4. The negative pins of the input and output capacitors and the GND pin must be connected to the ground plane of the load. 0.038 5. Keep VIN and VOUT traces as wide and short as possible. Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 0.02 Unit : Inch SOT-23-5 12 www.anpec.com.tw APL3517/A/B Package Information SOT-23-3 D e E E1 SEE VIEW A c b 0.25 A L GAUGE PLANE SEATING PLANE 0 A1 A2 e1 VIEW A S Y M B O L SOT-23-3 INCHES MILLIMETERS MIN. MIN. MAX. A MAX. 1.45 0.057 A1 0.00 0.15 0.000 0.006 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 0.071 e 0.95 BSC 0.037 BSC e1 1.90 BSC 0.075 BSC L 0.30 0.60 0 0° 8° 0.012 0° 0.024 8° Note : Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 13 www.anpec.com.tw APL3517/A/B Package Information SOT-23-5 D e E E1 SEE VIEW A b c 0.25 A L 0 GAUGE PLANE SEATING PLANE A1 A2 e1 VIEW A S Y M B O L SOT-23-5 INCHES MILLIMETERS MIN. MIN. MAX. A MAX. 0.057 1.45 0.00 0.15 0.000 0.006 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 0.009 A1 c 0.08 0.22 0.003 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 1.80 0.055 0.071 E1 1.40 e 0.95 BSC e1 0.037 BSC 1.90 BSC 0.075 BSC L 0.30 0.60 0 0° 8° 0.012 0° 0.024 8° Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 14 www.anpec.com.tw APL3517/A/B Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application SOT-23-3 Application SOT-23-5 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 1.0 MIN. 0.6+0.00 -0.40 3.20±0.20 3.10±0.20 1.50±0.20 4.0±0.10 4.0±0.10 2.0±0.05 1.5+0.10 -0.00 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 3.20±0.20 3.10±0.20 1.50±0.20 4.0±0.10 4.0±0.10 (mm) Devices Per Unit Package Type Unit Quantity SOT-23-3 Tape & Reel 3000 SOT-23-5 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 15 www.anpec.com.tw APL3517/A/B Taping Direction Information SOT-23-3 USER DIRECTION OF FEED SOT-23-5 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 16 www.anpec.com.tw APL3517/A/B Classification Profile Supplier Tp≧Tc User Tp≦Tc TC TC -5oC User tp Supplier tp Tp tp Temperature Max. Ramp Up Rate = 3oC/s Max. Ramp Down Rate = 6oC/s TL Tsmax TC -5oC t Preheat Area Tsmin tS 25 Time 25oC to Peak Time Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3 °C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 17 www.anpec.com.tw APL3517/A/B Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2012 18 www.anpec.com.tw