July 2000 PRELIMINARY ML4870* High Current Boost Regulator with Load Disconnect GENERAL DESCRIPTION FEATURES The ML4870 is a continuous conduction boost regulator designed for DC to DC conversion in multiple cell battery power systems. Continuous conduction allows the regulator to maximize output current for a given inductor. The maximum switching frequency can exceed 200kHz, allowing the use of small, low cost inductors. The ML4870 is capable of start-up with input voltages as low as 1.8V, and is available in 5V and 3.3V output versions with an output voltage accuracy of ±3%. ■ Guaranteed full load start-up and operation at 1.8V input ■ Continuous conduction mode for high output current ■ Pulse Frequency Modulation and internal synchronous rectification for high efficiency ■ Isolates the load from the input during shutdown An integrated synchronous rectifier eliminates the need for an external Schottky diode and provides a lower forward voltage drop, resulting in higher conversion efficiency. In addtion, low quiescent current and variable frequency operation result in high efficiency even at light loads. The ML4870 requires only a few external components to build a very small regulator capable of achieving conversion efficiencies approaching 85%. ■ Minimum external components ■ Low ON resistance internal switching FETs ■ Low supply current ■ 5V and 3.3V output versions The SHDN input allows the user to stop the regulator from switching, and provides complete isolation of the load from the battery. *Some Packages Are Obsolete BLOCK DIAGRAM 1 6 VL1 VL2 SHUTDOWN CONTROL SHDN 4 VIN 2 SYNCHRONOUS RECTIFIER CONTROL START-UP VOUT + 5 – + – SHDN + BOOST CONTROL – PWR GND 2.4V GND 8 3 1 ML4870 PIN CONFIGURATION ML4870 8-Pin SOIC (S08) VL1 1 8 PWR GND VIN 2 7 NC GND 3 6 VL2 SHDN 4 5 VOUT TOP VIEW PIN DESCRIPTION PIN NAME FUNCTION PIN NAME FUNCTION 1 VL1 Boost inductor connection 5 VOUT Boost regulator output 2 VIN Battery input voltage 6 VL2 Boost inductor connection 3 GND Ground 7 NC No connection 4 SHDN Pulling this pin to VIN shuts down the regulator, isolating the load from the input 8 PWR GND Return for the NMOS output transistor 2 ML4870 ABSOLUTE MAXIMUM RATINGS OPERATING CONDITIONS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Temperature Range ML4870CS-X .............................................. 0°C to 70°C ML4870ES-X ........................................... -20°C to 70°C VIN Operating Range ....................... 1.8V to VOUT - 0.2V VOUT ............................................................................................... 7V Voltage on any other pin ..... GND - 0.3V to VOUT + 0.3V Peak Switch Current (IPEAK) ......................................... 2A Average Switch Current (IAVG) ..................................... 1A Junction Temperature .............................................. 150°C Storage Temperature Range ..................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) ..................... 260°C Thermal Resistance (qJA) .................................... 160°C/W ELECTRICAL CHARACTERISTICS Unless otherwise specified, VIN = Operating Voltage Range, TA = Operating Temperature Range (Note 1) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN = VOUT - 0.2V, SHDN = 0V 3 6 µA VIN = SHDN = 2.4V, VOUT = 0V 0.3 1 µA SHDN = 0V 25 35 µA VIN = SHDN = 2.4V VOUT = VOUT(NOM) 14 20 µA 1.1 1.3 1.6 A SUPPLY IIN(Q) IOUT(Q) VIN Quiescent Current VOUT Quiescent Current PFM REGULATOR IPEAK IL Peak Current VOUT Output Voltage Load Regulation IOUT = 0 -3 Suffix 3.30 3.35 3.40 V See Figure 1 -5 Suffix 4.95 5.05 5.15 V -3 Suffix, VIN = 2.4V, IOUT = 400mA 3.20 3.25 3.40 V -5 Suffix, VIN = 2.4V, IOUT = 220mA 4.85 4.95 5.15 V 0.5 V SHUTDOWN VIL Input Low Voltage V IH Input High Voltage VIN - 0.5 Input Bias Current -100 V 100 nA Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions. 3 ML4870 27µH (SUMIDA CD75) ML4870 VIN 100µF VL1 PWR GND VIN NC GND VL2 SHDN IOUT VOUT 100µF Figure 1. Application Test Circuit IL 1 6 VL1 VL2 SHUTDOWN CONTROL Q3 VIN 2 4 RSENSE Q2 SYNCHRONOUS RECTIFIER CONTROL START-UP + 5 A3 + BOOST CONTROL – A1 SHDN + Q1 – PWR GND 2.4V GND 8 3 Figure 2. PFM Regulator Block Diagram IL(MAX) IL VOUT VOUT A2 – ISET 0 VOUT VL2 0 Q1 ON Q2 OFF Q1 OFF Q2 ON Figure 3. Inductor Current and Voltage Waveforms 4 SHDN ML4870 FUNCTIONAL DESCRIPTION DESIGN CONSIDERATIONS The ML4870 combines a unique form of current mode control with a synchronous rectifier to create a boost converter that can deliver high currents while maintaining high efficiency. Current mode control allows the use of a very small high frequency inductor and output capacitor. Synchronous rectification replaces the conventional external Schottky diode with an on-chip P-channel MOSFET to reduce losses, eliminate an external component, and provide the means for load disconnect. Also included on-chip are an N-channel MOSFET main switch and current sense resistor. OUTPUT CURRENT CAPABILITY REGULATOR OPERATION The ML4870 is a variable frequency, current mode switching regulator. Its unique control scheme converts efficiently over more than three decades of load current. A block diagram of the boost converter including the key external components is shown in Figure 2. Error amp A3 converts deviations in the desired output voltage to a small current, ISET. The inductor current is measured through a current sense resistor (RSENSE) which is amplified by A1. The boost control block matches the average inductor current to a multiple of the ISET current by switching Q1 on and off. The peak inductor current is limited by the controller to about 1.3A. The maximum current available at the output of the regulator is related to the maximum inductor current by the ratio of the input to output voltage and the conversion efficiency. The maximum inductor current is limited by the boost converter to about 1A. The conversion efficiency is determined mainly by the internal switches as well as the external components, but can be estimated at about 80%. The maximum output current can be estimated by using the typical performance curves shown in Figures 4 and 5, or by calculation using the following equations: IOUT( 5V) = 0.972 IOUT( 3.3V) = 0.81 V - 0144 5V . A IN(MIN) V - 0.144A 3.3V IN( MIN) (1) (2) Since the maximum output current is based on when the inductor current goes into current limit, it is not recommended to operate the ML4870 at the maximum output current continuously. Applications that have high transient load currents should be evaluated under worst case conditions to determine suitability. INDUCTOR SELECTION At light loads, ISET will momentarily reach zero after an inductor discharge cycle , causing Q1 to stop switching. Depending on the load, this idle time can extend to tenths of seconds. When the circuit is not switching, only 25µA of supply current is drawn from the output. This allows the part to remain efficient even when the load current drops below 250µA. Amplifier A2 and the PMOS transistor Q2 work together to form a low drop diode. When transistor Q1 turns off, the current flowing in the inductor causes VL2 to go high. As the voltage on VL2 rises above VOUT, amplifier A2 allows the PMOS transistor Q2 to turn on. In discontinuous operation, (where IL always returns to zero), A2 uses the resistive drop across the PMOS switch Q2 to sense zero inductor current and turns the PMOS switch off. In continuous operation, the PMOS turn off point is independent of A2 and is determined by the boost control circuitry. Typical inductor current and voltage waveforms are shown in Figure 3. SHUTDOWN The ML4870 output can be shut down by pulling the SHDN pin high (to VIN). When SHDN is high, the regulator stops switching, the control circuitry is powered down, and the body diode of the PMOS synchronous rectifier is disconnected from the output. By switching Q1, Q2, and Q3 off, the load is isolated from the input. This allows the output voltage to be independent of the input while in shutdown. The ML4870 is able to operate over a wide range of inductor values. A value of 10µH is a good choice, but any value between 5µH and 33µH is acceptable. As the inductor value changes, the control circuitry will automatically adjust to keep the inductor current under control. Choosing an inductance value of less than 10µH will reduce the component’s footprint, but the efficiency and maximum output current may drop. It is important to use an inductor that is rated to handle 1.5A peak currents without saturating. Also look for an inductor with low winding resistance. A good rule of thumb is to allow 5 to 10mW of resistance for each 1µH of inductance. The final selection of the inductor will be based on tradeoffs between size, cost and efficiency. Inductor tolerance, core and copper loss will vary with the type of inductor selected and should be evaluated with a ML4870 under worst case conditions to determine its suitability. Several manufacturers supply standard inductance values in surface mount packages: Coilcraft (847) 639-6400 Coiltronics (561) 241-7876 Dale (605) 665-9301 Sumida (847) 956-0666 5 ML4870 DEISGN CONSIDERATIONS (Continued) OUTPUT CAPACITOR The output capacitor filters the pulses of current from the switching regulator. Since the switching frequency will vary with inductance, the minimum output capacitance required to reduce the output ripple to an acceptable level will be a function of the inductor used. Therefore, to maintain an output voltage with less than 100mV of ripple at full load current, use the following equation: 44 L VOUT C OUT = (3) The output capacitor’s Equivalent Series Resistance (ESR) and Equivalent Series Inductance (ESL), also contribute to the ripple. Just after the Q1 turns off, the current in the output capacitor ramps quickly to between 0.5A and 1.3A. This fast change in current through the capacitor’s ESL causes a high frequency (5ns) spike to appear on the output. After the ESL spike settles, the output still has a ripple component equal to the inductor discharge current times the ESR. To minimize these effects, choose an output capacitor with less than 10nH of ESL and less than 100mW of ESR. Suitable tantalum capacitors can be obtained from the following vendors: AVX (207) 282-5111 Kemet (846) 963-6300 Sprague (207) 324-4140 90 1000 VOUT = 3.3V 800 EFFICIENCY (%) IOUT (mA) VOUT = 5V 600 VOUT = 3.3V 400 VOUT = 5V 80 70 200 0 1.0 2.0 3.0 4.0 60 5.0 VIN = 2.4V 1 10 VIN (V) 1000 IOUT (mA) Figure 4. IOUT vs. VIN Using the Circuit of Figure 8 Figure 5. Efficiency vs. IOUT Using the Circuit of Figure 8 80 350 300 VOUT = 5V 60 250 200 IIN (µA) IIN (nA) 100 150 100 40 VOUT = 3.3V 20 50 0 1.0 3.0 5.0 7.0 VIN (V) Figure 6. Input Leakage vs. VIN in Shutdown 6 0 1.0 2.0 3.0 4.0 5.0 VIN (V) Figure 7. No Load Input Current vs. VIN ML4870 DEISGN CONSIDERATIONS (Continued) INPUT CAPACITOR Due to the high input current drawn at startup and possibly during operation, it is recommended to decouple the input with a capacitor with a value of 47µF to 100µF. This filtering prevents the input ripple from affecting the ML4870 control circuitry, and also improves the efficiency by reducing the I2R losses during the charge cycle of the inductor. Again, a low ESR capacitor (such as tantalum) is recommended. It is also recommended that low source impedance batteries be used. Otherwise, the voltage drop across the source impedance during high input current situations will cause the ML4870 to fail to start-up or to operate unreliably. In general, for two cell applications the source impedance should be less than 200mW, which means that small alkaline cells should be avoided. 10µH (SUMIDA CD75) ML4870 VL1 VIN 100µF PWR GND VIN NC GND VL2 SHDN VOUT VOUT 100µF Figure 8. Design Example Schematic Diagram SHUTDOWN DESIGN EXAMPLE The input levels of the SHDN pin are CMOS compatible. To guarantee proper operation, SHDN must be pulled to within 0.5V of GND or VIN to prevent excessive power dissipation and possible oscillations. A graph of input leakage current while in shudown is shown in Figure 6. In order to design a boost converter using the ML4870, it is necessary to define the values of a few parameters. For this example, we have assumed that VIN = 3.0V to 3.6V, VOUT = 5.0V, and IOUT(MAX) = 400mA LAYOUT Good layout practices will ensure the proper operation of the ML4870. Some layout guidelines follow: First, it must be determined whether the ML4870 is capable of delivering the output current. This is done using Equation 1: IOUT( MAX) = 0.972 30. V - 0.144 = 439mA 5.0V • Use adequate ground and power traces or planes Next, select an inductor: • Keep components as close as possible to the ML4870 As previously mentioned, it is the recommended inductance is 10µH. Make sure that the peak current rating of the inductor is at least 1.5A, and that the DC resistance of the inductor is in the range of 50 to 100mW. • Use short trace lengths from the inductor to the VL1 and VL2 pins and from the output capacitor to the VOUT pin • Use a single point ground for the ML4870 PWR GND pin and the input and output capacitors, and connect the GND pin to PWR GND using a separate trace • Separate the ground for the converter circuitry from the ground of the load circuitry and connect at a single point Finally, the value of the output capacitor is determined using Equation 3: C OUT = 44 10mH = 88mF 5.0V The closest standard value would be a 100µF capacitor with an ESR rating of 100mW. If such a low ESR value cannot be found, two 47µF capacitors in parallel could also be used. The complete circuit is shown in Figure 8. As mentioned previously, the use of an input supply bypass capacitor is strongly recommended. 7 ML4870 PHYSICAL DIMENSIONS inches (millimeters) Package: S08 8-Pin SOIC 0.189 - 0.199 (4.80 - 5.06) 8 PIN 1 ID 0.148 - 0.158 0.228 - 0.244 (3.76 - 4.01) (5.79 - 6.20) 1 0.017 - 0.027 (0.43 - 0.69) (4 PLACES) 0.050 BSC (1.27 BSC) 0.059 - 0.069 (1.49 - 1.75) 0º - 8º 0.055 - 0.061 (1.40 - 1.55) 0.012 - 0.020 (0.30 - 0.51) 0.004 - 0.010 (0.10 - 0.26) 0.015 - 0.035 (0.38 - 0.89) 0.006 - 0.010 (0.15 - 0.26) SEATING PLANE ORDERING INFORMATION PART NUMBER OUTPUT VOLTAGE TEMPERATURE RANGE PACKAGE ML4870CS-3 ML4870CS-5 3.3V 5V 0°C to 70°C 0°C to 70°C 8-Pin SOIC (S08) 8-Pin SOIC (S08) ML4870ES-3 (Obsolete) ML4870ES-5(Obsolete) 3.3V 5V -20°C to 70°C -20°C to 70°C 8-Pin SOIC (S08) 8-Pin SOIC (S08) DS4870-01 © Micro Linear 1997. is a registered trademark of Micro Linear Corporation. All other trademarks are the property of their respective owners. Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167. Japan: 2,598,946; 2,619,299; 2,704,176. Other patents are pending. Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application. 8 2092 Concourse Drive San Jose, CA 95131 Tel: (408) 433-5200 Fax: (408) 432-0295 www.microlinear.com 11/24/97 Printed in U.S.A.