LINER LT4356CDE-1-TR Overvoltage protection regulator and inrush limiter Datasheet

LT4356-1
Overvoltage Protection
Regulator and Inrush Limiter
FEATURES
DESCRIPTION
n
The LT®4356-1 surge stopper protects loads from high
voltage transients. It regulates the output during an
overvoltage event, such as load dump in automobiles,
by controlling the gate of an external N-Channel MOSFET.
The output is limited to a safe value thereby allowing the
loads to continue functioning. The LT4356-1 also monitors
the voltage drop between the VCC and SNS pins to protect
against overcurrent faults. An internal amplifier limits the
current sense voltage to 50mV. In either fault condition, a
timer is started inversely proportional to MOSFET stress.
If the timer expires, the FLT pin pulls low to warn of an
impending power down. If the condition persists, the
MOSFET is turned off.
n
n
n
n
n
n
n
n
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Stops High Voltage Surges
Adjustable Output Clamp Voltage
Overcurrent Protection
Wide Operation Range: 4V to 80V
Reverse Input Protection to –60V
Low 7μA Shutdown Current
Adjustable Fault Timer
Controls N-Channel MOSFET
Shutdown Pin Withstands –60V to 100V
Fault Output Indication
Spare Amplifier for Level Detection Comparator or
Linear Regulator Controller
Available in (4mm × 3mm) 12-Pin DFN or 10-Pin
MSOP Packages
APPLICATIONS
n
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Automotive/Avionic Surge Protection
Hot Swap/Live Insertion
High Side Switch for Battery Powered Systems
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
The spare amplifier may be used as a voltage detection
comparator or as a linear regulator controller driving an
external PNP pass transistor.
Back-to-back FETs can be used in lieu of a Schottky diode
for reverse input protection, reducing voltage drop and
power loss. A shutdown pin reduces the quiescent current
to less than 7μA during shutdown.
TYPICAL APPLICATION
4A, 12V Overvoltage Output Regulator
10mΩ
VIN
12V
VOUT
IRLR2908
80V INPUT SURGE
10Ω
383k
Overvoltage Protector Regulates
Output at 27V During Transient
VCC
SNS
GATE
102k
VIN
20V/DIV
OUT
FB
SHDN
IN+
4.99k
DC-DC
CONVERTER
LT4356DE-1
100k
SHDN GND
EN
UNDERVOLTAGE
AOUT
GND
TMR
VCC
FLT
FAULT
12V
27V CLAMP
VOUT
20V/DIV
12V
100ms/DIV
43561 TA01b
43561 TA01
0.1μF
43561fd
1
LT4356-1
ABSOLUTE MAXIMUM RATINGS
(Notes 1 and 2)
VCC , SHDN ................................................ –60V to 100V
SNS..............................VCC –30V or –60V to VCC + 0.3V
OUT, AOUT, FLT, EN .....................................– 0.3V to 80V
GATE (Note 3) ................................ – 0.3V to VOUT + 10V
FB, TMR, IN+ ................................................– 0.3V to 6V
AOUT, EN, FLT .........................................................–3mA
Operating Temperature Range
LT4356C-1 ............................................... 0°C to 70°C
LT4356I-1 ............................................–40°C to 85°C
LT4356H-1 .........................................–40°C to 125°C
Storage Temperature Range
DE12 ..................................................–65°C to 125°C
MS .....................................................–65°C to 150°C
Lead Temperature (Soldering, 10 sec, MS10) ....... 300°C
PIN CONFIGURATION
TOP VIEW
TMR
1
12 IN+
FB
2
11 AOUT
10 GND
OUT
3
GATE
4
9
EN
SNS
5
8
FLT
VCC
6
7
SHDN
13
TOP VIEW
FB
OUT
GATE
SNS
VCC
DE PACKAGE
12-LEAD (4mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 13) PCB GND CONNECTION OPTIONAL
1
2
3
4
5
10
9
8
7
6
TMR
GND
EN
FLT
SHDN
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 120°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT4356CDE-1#PBF
LT4356CDE-1#TRPBF
43561
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LT4356IDE-1#PBF
LT4356IDE-1#TRPBF
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LT4356HDE-1#PBF
LT4356HDE-1#TRPBF
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LT4356CMS-1#PBF
LT4356CMS-1#TRPBF
LTCNS
10-Lead Plastic MSOP
0°C to 70°C
LT4356IMS-1#PBF
LT4356IMS-1#TRPBF
LTCNS
10-Lead Plastic MSOP
–40°C to 85°C
LT4356HMS-1#PBF
LT4356HMS-1#TRPBF
LTCNS
10-Lead Plastic MSOP
–40°C to 125°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT4356CDE-1
LT4356CDE-1#TR
43561
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LT4356IDE-1
LT4356IDE-1#TR
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LT4356HDE-1
LT4356HDE-1#TR
43561
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LT4356CMS-1
LT4356CMS-1#TR
LTCNS
10-Lead Plastic MSOP
0°C to 70°C
LT4356IMS-1
LT4356IMS-1#TR
LTCNS
10-Lead Plastic MSOP
–40°C to 85°C
LT4356HMS-1
LT4356HMS-1#TR
LTCNS
10-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
43561fd
2
LT4356-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL
VCC
PARAMETER
Operating Voltage Range
ICC
VCC Supply Current
CONDITIONS
l
MIN
4
l
VSHDN = FLOAT
VSHDN = 0V
LT4356I-1, LT4356C-1
LT4356H-1
VSNS = VCC = –30V, SHDN Open
VSNS = VCC = VSHDN = –30V
l
l
l
l
TYP
MAX
80
1
1.5
mA
7
7
7
0.3
0.8
25
30
40
1
2
μA
μA
μA
mA
mA
8
18
V
V
–36
–50
μA
μA
IR
Reverse Input Current
ΔVGATE
GATE Pin Output High Voltage
VCC = 4V; (VGATE – VOUT)
48V ≥ VCC ≥ 8V; (VGATE – VOUT)
l
l
4.5
10
IGATE,UP
GATE Pin Pull-Up Current
VGATE = 12V; VCC = 12V
VGATE = 48V; VCC = 48V
l
l
–4
–4.5
–23
–30
IGATE,DN
GATE Pin Pull-Down Current
Overvoltage, VFB = 1.4V, VGATE = 12V
Overcurrent, VCC – VSNS = 120mV, VGATE = 12V
Shutdown Mode, VSHDN = 0V, VGATE = 12V
l
l
l
75
5
1.5
150
10
5
VFB
FB Pin Servo Voltage
VGATE = 12V; VOUT = 12V, LT4356I-1, LT4356C-1
VGATE = 12V; VOUT = 12V, LT4356H-1
l
l
1.225
1.215
1.25
1.25
UNITS
V
mA
mA
mA
1.275
1.275
V
V
IFB
FB Pin Input Current
VFB = 1.25V
l
0.3
1
μA
ΔVSNS
Overcurrent Fault Threshold
ΔVSNS = (VCC – VSNS), VCC = 12V, LT4356I-1, LT4356C-1
ΔVSNS = (VCC – VSNS), VCC = 12V, LT4356H-1
ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356I-1, LT4356C-1
ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356H-1
l
l
l
l
45
42.5
46
43
50
50
51
51
55
55
56
56
mV
mV
mV
mV
ISNS
SNS Pin Input Current
VSNS = VCC = 12V to 48V
l
5
10
22
μA
ILEAK
FLT, EN = 80V
AOUT = 80V
VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 0.5V
VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 75V
VTMR = 1.3V, VFB = 1.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 0.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 80V
l
ITMR
FLT, EN Pins Leakage Current
AOUT Pin Leakage Current
TMR Pin Pull-up Current
–2.5
–50
–5.5
–4.5
–260
2.5
4.5
–4
–55
–8
–6.5
–315
μA
μA
μA
μA
μA
μA
μA
TMR Pin Pull-down Current
VTMR = 1V, VFB = 1V, ΔVSNS = 0V
l
1.7
2.2
2.7
μA
VTMR
TMR Pin Thresholds
FLT From High to Low, VCC = 5V to 80V
VGATE From Low to High, VCC = 5V to 80V
l
l
1.22
0.48
1.25
0.5
1.28
0.52
V
V
ΔVTMR
Early Warning Period
From FLT going Low to GATE going Low, VCC = 5V to 80V
l
80
100
120
mV
VIN+
IN+ Pin Threshold
l
1.22
1.25
1.28
V
l
l
l
l
l
–1.5
–44
–3.5
–2.5
–195
IIN
IN+ Pin Input Current
VIN
l
0.3
1
μA
VOL
FLT, EN, AOUT Pins Output Low
ISINK = 2mA
ISINK = 0.1mA
l
l
2
300
8
800
V
mV
IOUT
OUT Pin Input Current
VOUT = VCC = 12V
VOUT = VCC = 12V, VSHDN = 0V
l
l
200
6
300
12
μA
mA
ΔVOUT
OUT Pin High Threshold
ΔVOUT = VCC – VOUT; EN From Low to High
l
0.25
0.5
0.7
V
VSHDN
SHDN Pin Threshold
VCC = 12V to 48V
l
0.6
0.4
1.4
1.7
2.1
V
V
1.7
2.2
V
–4
–8
μA
+
VSHDN(FLT) SHDN Pin Float Voltage
+ = 1.25V
VCC = 12V to 48V
l
VSHDN = 0V
l
Overcurrent Turn Off Delay Time
GATE From High to Low, ΔVSNS = 0 → 120mV
l
2
4
μs
Overvoltage Turn Off Delay Time
GATE From High to Low, VFB = 0 → 1.5V
l
0.25
1
μs
ISHDN
SHDN Pin Current
tOFF(OC)
tOFF(OV)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
–1
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3: An internal clamp limits the GATE pin to a minimum of 10V above
the OUT pin. Driving this pin to voltages beyond the clamp may damage
the device.
43561fd
3
LT4356-1
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C
unless otherwise noted.
ICC (Shutdown) vs VCC
ICC vs VCC
60
ICC (Shutdown) vs Temperature
35
1000
30
50
800
25
30
600
ICC (μA)
ICC (μA)
ICC (μA)
40
400
20
15
20
10
200
10
5
0
0
10
20
30
40 50
VCC (V)
60
70
0
10
20
43561 G01
Reverse Current vs Reverse
Voltage
–20
0
–50
0
80
30
40 50
VCC (V)
60
70
80
VCC = SNS
125
GATE Pull-Up Current vs VCC
40
VSHDN = 0V
35
–15
30
–10
IGATE (μA)
ISHDN (μA)
4
ICC (mA)
100
43561 G19
5
3
25
20
15
2
–5
10
1
0
25
75
0
50
TEMPERATURE (°C)
43561 G02
SHDN Current vs Temperature
6
–25
0
–20
–40
–60
5
0
–50
–80
–25
VCC (V)
25
75
0
50
TEMPERATURE (°C)
100
0
125
0
10
43561 G04
20
30
40 50
VCC (V)
60
70
80
43561 G05
43561 G03
GATE Pull-Up Current
vs Temperature
35
GATE Pull-Down Current
vs Temperature
220
VGATE = VOUT = 12V
30
20
15
10
180
160
140
120
5
–25
0
50
25
75
TEMPERATURE (°C)
100
125
43561 G06
100
–50
OVERCURRENT CONDITION
ΔVSNS = 120mV
10
IGATE(DOWN) (mA)
IGATE(DOWN) (mA)
IGATE (μA)
12
OVERVOLTAGE CONDITION
VFB = 1.5V
200
25
0
–50
GATE Pull-Down Current
vs Temperature
8
6
4
2
–25
25
75
0
50
TEMPERATURE (°C)
100
125
43561 G07
0
–50
–25
25
75
0
50
TEMPERATURE (°C)
100
125
43561 G08
43561fd
4
LT4356-1
TYPICAL PERFORMANCE CHARACTERISTICS
unless otherwise noted.
ΔVGATE vs IGATE
ΔVGATE vs Temperature
14
12
12
10
10
8
6
2
2
6
4
10
IGATE (μA)
8
12
14
VCC = 4V
4
2
0
50
25
75
TEMPERATURE (°C)
100
125
0
8
160
120
80
40
2
10
20
30 40 50
VCC – VOUT (V)
60
70
80
70
80
43561 G11
0
0
10
20
30
43561 G13
43561 G12
TMR Pull-Down Current
vs Temperature
3.0
60
6
4
0
40 50
VCC (V)
8
80
0
0
70
30
OVERVOLTAGE, EARLY
WARNING PERIOD
12 VFB = 1.5V
VTMR = 1.3V
10
ITMR (μA)
ITMR (μA)
16
60
20
14
200
30 40 50
VCC – VOUT (V)
10
Warning Period TMR Current
vs VCC
OVERCURRENT CONDITION
VOUT = 0V
240 VTMR = 1V
32
40 50
VCC (V)
60
70
80
43561 G14
Output Low Voltage vs Current
4.0
VTMR = 1V
3.5
2.5
AOUT
3.0
2.0
2.5
VOL (V)
ITMR (μA)
20
IGATE = –1μA
VOUT = VCC
0
–25
280
OVERVOLTAGE CONDITION
VOUT = 5V
40 VTMR = 1V
10
6
4356 G10
48
0
TA = –40°C
8
Overcurrent TMR Current
vs (VCC – VOUT)
24
TA = 0°C
10
43561 G09
Overvoltage TMR Current
vs (VCC – VOUT)
ITMR (μA)
VCC = 8V
0
–50
16
TA = 25°C
12
6
4
2
IGATE = –1μA
8
4
0
ΔVGATE vs VCC
14
ΔVGATE (V)
VOUT = 12V
ΔVGATE (V)
ΔVGATE (V)
14
0
Specifications are at VCC = 12V, TA = 25°C
1.5
FLT
2.0
EN
1.5
1.0
1.0
0.5
0
–50
0.5
–25
0
25
50
75
TEMPERATURE (°C)
100
125
43561 G15
0
0
0.5
2.0
1.0
1.5
CURRENT (mA)
2.5
3.0
43561 G16
43561fd
5
LT4356-1
TYPICAL PERFORMANCE CHARACTERISTICS
unless otherwise noted.
Overvoltage Turn-Off Time
vs Temperature
500
Specifications are at VCC = 12V, TA = 25°C
Overcurrent Turn-Off Time
vs Temperature
4.0
OVERVOLTAGE CONDITION
VFB = 1.5V
OVERCURRENT CONDITION
ΔVSNS = 120mV
3.5
400
tOFF (μs)
tOFF (ns)
3.0
300
200
2.5
2.0
100
0
–50
1.5
–25
0
25
50
75
TEMPERATURE (°C)
100
125
43561 G17
PIN FUNCTIONS
1.0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
43561 G18
(DE/MS)
AOUT (Pin 11 DE Only): Amplifier Output. Open collector
output of the auxiliary amplifier. It is capable of sinking
up to 2mA from 80V. The negative input of the amplifier
is internally connected to a 1.25V reference.
EN (Pin 9/Pin 8): Open-Collector Enable Output. The EN
pin goes high impedance when the voltage at the OUT pin
is above (VCC – 0.7V), indicating the external MOSFET is
fully on. The state of the pin is latched until the OUT pin
voltage resets at below 0.5V and goes back up above 2V.
The internal NPN is capable of sinking up to 3mA of current from 80V to drive an LED or opto-coupler.
Exposed Pad (Pin 13 DE Only): Exposed pad may be left
open or connected to device ground (GND).
FB (Pin 2/Pin 1): Voltage Regulator Feedback Input. Connect this pin to the center tap of the output resistive divider
connected between the OUT pin and ground. During an
overvoltage condition, the GATE pin is servoed to maintain a 1.25V threshold at the FB pin. This pin is clamped
internally to 7V. Tie to GND to disable the OV clamp.
FLT (Pin 8/Pin 7): Open-Collector Fault Output. This pin
pulls low after the voltage at the TMR pin has reached
the fault threshold of 1.25V. It indicates the pass transistor is about to turn off because either the supply voltage
has stayed at an elevated level for an extended period
of time (voltage fault) or the device is in an overcurrent
condition (current fault). The internal NPN is capable of
sinking up to 3mA of current from 80V to drive an LED or
opto-coupler.
GATE (Pin 4/Pin 3): N-Channel MOSFET Gate Drive Output.
The GATE pin is pulled up by an internal charge pump
current source and clamped to 14V above the OUT pin.
Both voltage and current amplifiers control the GATE pin
to regulate the output voltage and limit the current through
the MOSFET.
GND (Pin 10/Pin 9): Device Ground.
IN+ (Pin 12 DE Only): Positive Input of the Auxiliary
Amplifier. This amplifier can be used as a level detection
comparator with external hysteresis or linear regulator
controlling an external PNP transistor. This pin is clamped
internally to 7V. Connect to ground if unused.
OUT (Pin 3/Pin 2): Output Voltage Sense Input. This pin
senses the voltage at the source of the N-channel MOSFET
and sets the fault timer current. When the OUT pin voltage reaches 0.7V away from VCC , the EN pin goes high
impedance.
SHDN (Pin 7/Pin 6): Shutdown Control Input. The LT4356-1
can be shutdown to a low current mode by pulling the
SHDN pin below the shutdown threshold of 0.6V. Pull
this pin above 1.7V or disconnect it and allow the inter43561fd
6
LT4356-1
nal current source to turn the part back on. The leakage
current to ground at the pin should be limited to no more
than 1μA if no pull up device is used to turn the part on.
The SHDN pin can be pulled up to 100V or below GND by
60V without damage.
charging up this pin during fault conditions depends on
the voltage difference between the VCC and OUT pins.
When VTMR reaches 1.25V, the FLT pin pulls low to indicate the detection of a fault condition. If the condition
persists, the pass transistor turns off when VTMR reaches
the threshold of 1.35V. The pull up current stops and
a 2μA current source starts to pull the TMR pin down
as soon as the fault condition disappears. When VTMR
reaches the retry threshold of 0.5V, the GATE pin pulls
high turning back on the pass transistor.
SNS (Pin 5/Pin 4): Current Sense Input. Connect this pin
to the output of the current sense resistor. The current
limit circuit controls the GATE pin to limit the sense voltage
between VCC and SNS pins to 50mV. At the same time the
sense amplifier also starts a current source to charge up
the TMR pin. This pin can be pulled below GND by up to
60V, though the voltage difference with the VCC pin must
be limited to less than 30V. Connect to VCC if unused.
VCC (Pin 6/Pin 5): Positive Supply Voltage Input. The
positive supply input ranges from 4V to 80V for normal
operation. It can also be pulled below ground potential
by up to 60V during a reverse battery condition, without
damaging the part. The supply current is reduced to 7μA
with all the functional blocks off.
TMR (Pin 1/Pin 10): Fault Timer Input. Connect a capacitor between this pin and ground to set the times for
early warning, fault and cool down periods. The current
BLOCK DIAGRAM
VCC
GATE
+
–
14V
CHARGE
PUMP
+
OUT
FB
+
50mV
SNS
–
VA
IA
1.25V
–
SHDN
FLT
AOUT
OC
1.25V
AUXILLARY
AMPLIFIER
SHDN
RESTART
OUT
OV
EN
CONTROL
LOGIC
GATEOFF
FLT
–
+
IN+
1.35V
–
VCC
+
0.5V
+
ITMR
–
+
2μA
1.25V
TMR
–
GND
43561 BD
43561fd
7
LT4356-1
OPERATION
Some power systems must cope with high voltage surges
of short duration such as those in automobiles. Load
circuitry must be protected from these transients, yet
high availability systems must continue operating during
these events.
The potential at the TMR pin starts decreasing as soon as
the overvoltage condition disappears. When the voltage
at the TMR pin reaches 0.5V the GATE pin begins rising,
turning on the MOSFET. The FLT pin will then go to a high
impedance state.
The LT4356-1 is an overvoltage protection regulator that
drives an external N-channel MOSFET as the pass transistor. It operates from a wide supply voltage range of 4V to
80V. It can also be pulled below ground potential by up
to 60V without damage. The low power supply requirement of 4V allows it to operate even during cold cranking
conditions in automotive applications. The internal charge
pump turns on the N-channel MOSFET to supply current
to the loads with very little power loss. Two MOSFETs can
be connected back to back to replace an inline Schottky
diode for reverse input protection. This improves the efficiency and increases the available supply voltage level
to the load circuitry during cold crank.
The fault timer allows the loads to continue functioning
during short transient events while protecting the MOSFET
from being damaged by a long period of supply overvoltage,
such as a load dump in automobiles. The timer period varies with the voltage across the MOSFET. A higher voltage
corresponds to a shorter fault timer period, ensuring the
MOSFET operates within its safe operating area (SOA).
Normally, the pass transistor is fully on, powering the
loads with very little voltage drop. When the supply voltage surges too high, the voltage amplifier (VA) controls
the gate of the MOSFET and regulates the voltage at the
source pin to a level that is set by the external resistor
divider from the OUT pin to ground and the internal 1.25V
reference. A current source starts charging up the capacitor connected at the TMR pin to ground. If the voltage at
the TMR pin, VTMR, reaches 1.25V, the FLT pin pulls low
to indicate impending turn-off due to the overvoltage
condition. The pass transistor stays on until the TMR
pin reaches 1.35V, at which point the GATE pin pulls low
turning off the MOSFET.
The LT4356-1 senses an overcurrent condition by monitoring the voltage across an optional sense resistor placed
between the VCC and SNS pins. An active current limit
circuit (IA) controls the GATE pin to limit the sense voltage to 50mV. A current is also generated to start charging
up the TMR pin. This current is about 5 times the current
generated during an overvoltage event. The FLT pin pulls
low when the voltage at the TMR pin reaches 1.25V and
the MOSFET is turned off when it reaches 1.35V.
A spare amplifier (SA) is provided with the negative input
connected to an internal 1.25V reference. The output pull
down device is capable of sinking up to 2mA of current
allowing it to drive an LED or opto coupler. This amplifier
can be configured as a linear regulator controller driving
an external PNP transistor or a comparator function to
monitor voltages.
A shutdown pin turns off the pass transistor and reduces
the supply current to less than 7μA.
43561fd
8
LT4356-1
APPLICATIONS INFORMATION
The LT4356-1 can limit the voltage and current to the load
circuitry during supply transients or overcurrent events.
The total fault timer period should be set to ride through
short overvoltage transients while not causing damage
to the pass transistor. The selection of this N-channel
MOSFET pass transistor is critical for this application.
It must stay on and provide a low impedance path from
the input supply to the load during normal operation and
then dissipate power during overvoltage or overcurrent
conditions.
The following sections describe the overcurrent and the
overvoltage faults, and the selection of the timer capacitor
value based on the required warning time. The selection
of the N-channel MOSFET pass transistor is discussed
next. Auxiliary amplifier, reverse input, and the shutdown
functions are covered after the MOSFET selection. External
component selection is discussed in detail in the Design
Example section.
Overvoltage Fault
The LTC4356-1 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifier regulates the GATE pin voltage to maintain a 1.25V threshold at
the FB pin. During this period of time, the power MOSFET
is still on and continues to supply current to the load. This
allows uninterrupted operation during short overvoltage
transient events.
When the voltage regulation loop is engaged for longer
than the time-out period, set by the timer capacitor connected from the TMR pin to ground, an overvoltage fault is
detected. The GATE pin is pulled down to the OUT pin by a
150mA current. After the fault condition has disappeared
and a cool down period has transpired, the GATE pin starts
to pull high again. This prevents the power MOSFET from
being damaged during a long period of overvoltage, such
as during load dump in automobiles.
Overcurrent Fault
The LT4356-1 features an adjustable current limit that
protects against short circuits or excessive load current.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the VCC and SNS
pins to 50mV.
An overcurrent fault occurs when the current limit circuitry
has been engaged for longer than the time-out delay set
by the timer capacitor. The GATE pin is then immediately
pulled low by a 10mA current to GND turning off the
MOSFET. After the fault condition has disappeared and a
cool down period has transpired, the GATE pin is allowed
to pull back up and turn on the pass transistor.
Fault Timer
The LT4356-1 includes an adjustable fault timer pin. Connecting a capacitor from the TMR pin to ground sets the
delay timer period before the MOSFET is turned off. The
same capacitor also sets the cool down period before the
MOSFET is allowed to turn back on after the fault condition
has disappeared.
Once a fault condition, either overvoltage or overcurrent,
is detected, a current source charges up the TMR pin.
The current level varies depending on the voltage drop
across the drain and source terminals of the power
MOSFET(VDS), which is typically from the VCC pin to the
OUT pin. This scheme takes better advantage of the available Safe Operating Area (SOA) of the MOSFET than would
a fixed timer current. The timer function operates down to
VCC = 5V across the whole temperature range.
Fault Timer Current
The timer current starts at around 2μA with 0.5V or less
of VDS , increasing linearly to 50μA with 75V of VDS during an overvoltage fault (Figure 1). During an overcurrent
fault, it starts at 4μA with 0.5V or less of VDS but increases
to 260μA with 80V across the MOSFET (Figure 2). This
arrangement allows the pass transistor to turn off faster
during an overcurrent event, since more power is dissipated
during this condition. Refer to the Typical Performance
Characteristics section for the timer current at different
VDS in both overvoltage and overcurrent events.
When the voltage at the TMR pin, VTMR , reaches the 1.25V
threshold, the FLT pin pulls low to indicate the detection
of a fault condition and provide warning to the load of
the impending power loss. In the case of an overvoltage
fault, the timer current then switches to a fixed 5μA.
43561fd
9
LT4356-1
APPLICATIONS INFORMATION
MOSFET. The TMR pin is then actively regulated to 0.5V
until the next fault condition appears. The total cool down
timer period is given by:
VTMR(V)
ITMR = 5μA
ITMR = 5μA
1.35
1.25
VDS = 75V
(ITMR = 50μA)
tCOOL =
VDS = 10V
(ITMR = 8μA)
CTMR • 0.85V
2µA
MOSFET Selection
0.50
TIME
tFLT
= 15ms/μF
tWARNING
= 20ms/μF
tFLT = 93.75ms/μF
tWARNING
= 20ms/μF
TOTAL FAULT TIMER = tFLT + tWARNING
43561 F01
Figure 1. Overvoltage Fault Timer Current
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
VTMR(V)
1.35
1.25
VDS = 80V
(ITMR = 260μA)
0.50
tFLT
= 2.88ms/μF
VDS = 10V
(ITMR = 35μA)
TIME
tWARNING
= 0.38ms/μF
tFLT = 21.43ms/μF
TOTAL FAULT TIMER = tFLT + tWARNING
tWARNING
= 2.86ms/μF
43561 F02
Figure 2. Overcurrent Fault Timer Current
The interval between FLT asserting low and the MOSFET
turning off is given by:
t WARNING =
The LT4356-1 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
on-resistance RDS(ON) , the maximum drain-source voltage
V(BR)DSS , the threshold voltage, and the SOA.
CTMR • 100mV
5µA
This fixed early warning period allows the systems to perform necessary backup or house keeping functions before
the power supply is cut off. After VTMR crosses the 1.35V
threshold, the pass transistor turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5μA after VTMR has reached 1.25V threshold,
since it would lengthen the overall fault timer period and
cause more stress on the power MOSFET.
As soon as the fault condition has disappeared, a 2μA
current starts to discharge the timer capacitor to ground.
When VTMR reaches the 0.5V threshold, the internal charge
pump starts to pull the GATE pin high, turning on the
The gate drive for the MOSFET is guaranteed to be more
than 10V and less than 18V for those applications with VCC
higher than 8V. This allows the use of standard threshold
voltage N-channel MOSFETs. For systems with VCC less
than 8V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
The SOA of the MOSFET must encompass all fault conditions. In normal operation the pass transistor is fully on,
dissipating very little power. But during either overvoltage
or overcurrent faults, the GATE pin is servoed to regulate either the output voltage or the current through the
MOSFET. Large current and high voltage drop across the
MOSFET can coexist in these cases. The SOA curves of
the MOSFET must be considered carefully along with the
selection of the fault timer capacitor.
Transient Stress in the MOSFET
During an overvoltage event, the LT4356-1 drives a series
pass MOSFET to regulate the output voltage at an acceptable
level. The load circuitry may continue operating throughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
Most transient event specifications use the model shown
in Figure 3. The idealized waveform comprises a linear
43561fd
10
LT4356-1
APPLICATIONS INFORMATION
VPK
VPK
T
T
VREG
VIN
VIN
tr
tr
43561 F04
43561 F03
Figure 3. Prototypical Transient Waveform
ramp of rise time tr, reaching a peak voltage of VPK and
exponentially decaying back to VIN with a time constant
of t. A common automotive transient specification has
constants of tr = 10μs, VPK = 80V and τ = 1ms. A surge
condition known as “load dump” has constants of
tr = 5ms, VPK = 60V and τ = 200ms.
MOSFET stress is the result of power dissipated within the
device. For long duration surges of 100ms or more, stress
is increasingly dominated by heat transfer; this is a matter
of device packaging and mounting, and heatsink thermal
mass. For short duration transients of less than 100ms,
MOSFET survival is increasingly a matter of safe operating
area (SOA), an intrinsic property of the MOSFET.
SOA quantifies the time required at any given condition
of VDS and ID to raise the junction temperature of the
MOSFET to its rated maximum. MOSFET SOA is expressed
in units of watt-squared-seconds (P2t). This figure is essentially constant for intervals of less than 100ms for any
given device type, and rises to infinity under DC operating
conditions. Destruction mechanisms other than bulk die
temperature distort the lines of an accurately drawn SOA
graph so that P2t is not the same for all combinations of
ID and VDS. In particular P2t tends to degrade as VDS approaches the maximum rating, rendering some devices
useless for absorbing energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
which shall not interrupt operation. It is then a simple matter to chose a device which has adequate SOA to survive
the maximum calculated stress. P2t for a prototypical
transient waveform is calculated as follows (Figure 4).
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
Let
a = VREG – VIN
b = VPK – VIN
(VIN = Nominal Input Voltage)
Then
1 ( b – a )3
tr
+
b
P 2 t = ILOAD2 3
1 2 b
2
2
2a ln + 3a + b 4ab
2
a
Typically VREG ≈ VIN and τ >> tr simplyfying the above to
P2 t =
1
2
ILOAD 2 ( VPK – VREG ) τ
2
(W 2s)
For the transient conditions of VPK = 80V, VIN = 12V,
VREG = 16V, tr = 10μs and τ = 1ms, and a load current
of 3A, P2t is 16.7W2s—easily handled by a MOSFET in
a D-pak package. The P2t of other transient waveshapes
is evaluated by integrating the square of MOSFET power
versus time.
Calculating Short Circuit Stress
SOA stress must also be calculated for short circuit conditions. Short circuit P2t is given by:
P 2 t = (VIN • Δ VSNS / RSNS )2 • t TMR (W 2s)
where, ΔVSNS is the SENSE pin threshold, and tTMR is the
overcurrent timer interval.
For VIN = 14.7V, VSNS = 50mV, RSNS = 12mΩ and CTMR
= 100nF, P2t is 6.6W2s—less than the transient SOA
calculated in the previous example. Nevertheless, to ac43561fd
11
LT4356-1
APPLICATIONS INFORMATION
count for circuit tolerances this figure should be doubled
to 13.2W2s.
Limiting Inrush Current and GATE Pin Compensation
The LT4356-1 limits the inrush current to any load capacitance by controlling the GATE pin voltage slew rate. An
external capacitor can be connected from GATE to ground
to slow down the inrush current further at the expense of
slower turn-off time.
The amplifier can also be configured as a low dropout
linear regulator controller. With an external PNP transistor,
such as 2N2905A, it can supply up to 100mA of current
with only a few hundred mV of dropout voltage. Current
limit can be easily included by adding two diodes and one
resistor (Figure 6).
*4.7Ω
INPUT
The LTC4356-1 does not need extra compensation components at the GATE pin for stability during an overvoltage or
overcurrent event. However, with fast, high voltage transient
steps at the input, a gate capacitor, C1, to ground is needed
to prevent turn-on of the N-Channel MOSFET.
R6
100k
2N2905A OR
BCP53
OUTPUT
* OPTIONAL FOR
CURRENT LIMIT
D1*
BAV99
11
AOUT
LT4356DE-1
43561 F06
The extra gate capacitance slows down the turn off time
during fault conditions and may allow excessive current
during an output short event. An extra resistor, R1, in series
with the gate capacitor can improve the turn off time. A
diode, D1, should be placed across R1 with the cathode
connected to C1 as shown in Figure 5.
Auxiliary Amplifier
An uncommitted amplifier is included in the LT4356-1 to
provide flexibility in the system design. With the negative
input connected internally to the 1.25V reference, the amplifier can be connected as a level detect comparator with
external hysteresis. The open collector output pin, AOUT,
is capable of driving an opto or LED. It can also interface
with the system via a pull-up resistor to a supply voltage
up to 80V.
Figure 6. Auxiliary LDO Output with Optional Current Limit
Reverse Input Protection
A blocking diode is commonly employed when reverse
input potential is possible, such as in automotive applications. This diode causes extra power loss, generates heat,
and reduces the available supply voltage range. During
cold crank, the extra voltage drop across the diode is
particularly undesirable.
The LT4356-1 is designed to withstand reverse voltage
without damage to itself or the load. The VCC , SNS, and
SHDN pins can withstand up to 60V of DC voltage below
the GND potential. Back-to-back MOSFETs must be used
to eliminate the current path through their body diodes
(Figure 7). Figure 8 shows the approach with a P-Channel
MOSFET in place of Q2.
Shutdown
Q1
The LT4356-1 can be shut down to a low current mode
when the voltage at the SHDN pin goes below the shutdown
threshold of 0.6V. The quiescent current drops to 7μA.
D1
IN4148W
R3
R1
C1
GATE
LT4356-1
43561 F05
Figure 5
The SHDN pin can be pulled up to VCC or below GND by
up to 60V without damaging the pin. Leaving the pin open
allows an internal current source to pull it up and turn on
the part while clamping the pin to 2.5V. The leakage current at the pin should be limited to no more than 1μA if
no pull up device is used to help turn it on.
43561fd
12
LT4356-1
APPLICATIONS INFORMATION
RSNS
10mΩ
VIN
12V
Q2
IRLR2908
D2*
SMAJ58CA
R4 R5
10Ω 1M
Q3
2N3904
C2
0.1μF
R6
10Ω
VOUT
12V, 3A
CLAMPED
AT 16V
R3
10Ω
R1
59k
D1
1N4148
6
Q1
IRLR2908
R7
10k
5
SNS
4
GATE
3
OUT
VCC
FB
A 1μF ceramic capacitor, CL, is needed at the OUT pin to
clamp the voltage spike if the input voltage rise time is
2
R2
4.99k
RSNS
10mΩ
LT4356DE-1
7
11
12
VIN
SHDN
FLT
AOUT
IN+
GND
EN
TMR
10
1
*DIODES INC.
RSNS
10mΩ
Q2
Si4435
9
6
VOUT
12V, 3A
CLAMPED AT 16V
R3
10Ω
11
12
4
GATE
3
OUT
FB
VCC
FLT
AOUT
IN+
EN
TMR
*DIODES INC.
IN+
R2
4.99k
LT4356DE-1
UNDERVOLTAGE
EN
11
1
2
SHDN
AOUT
GND
TMR
1
FLT
9
8
VCC
DC-DC
CONVERTER
SHDN GND
FAULT
43561 F09
CTMR
47nF
2
LT4356DE-1
10
FB
CL
1μF
CERAMIC
Figure 9. Overvoltage Regulator with Low Battery Detection
SHDN
GND
12
VCC
R1
59k
R2
4.99k
7
7
R1
59k
R3
10Ω
5
4
3
SNS GATE OUT
10
5
SNS
6
R4
383k
Q1
IRLR2908
R5
100k
Q1
IRLR2908
R6
10k
C2
0.1μF
R6
10Ω
43561 F07
CTMR
0.1μF
D1
1N5245
15V
D2*
SMAJ58CA
C2
0.1μF
100V
D2
SMAJ58A
8
Figure 7. Overvoltage Regulator with N-Channel MOSFET
Reverse Input Protection
VIN
12V
power trace parasitic inductance should be minimized by
using wide traces. A snubber circuit dampens the ringing
associated with voltage spikes. A 10Ω resistor in series with
a 0.1μF capacitor between VCC and GND is effective with
up to 1μH feed point inductance. A surge suppressor, D2,
in Figure 9, at the input will clamp the voltage spikes.
8
9
43561 F08
CTMR
0.1μF
Figure 8. Overvoltage Regulator with P-Channel MOSFET
Reverse Input Protection
Supply Transient Protection
The LT4356-1 is 100% tested and guaranteed to be safe
from damage with supply voltages up to 80V. Nevertheless, voltage transients above 100V may cause permanent
damage. During a short-circuit condition, the large change
in current flowing through power supply traces and associated wiring can cause inductive voltage transients which
could exceed 100V. To minimize the voltage transients, the
faster than 10μs. A total bulk capacitance in the range of
22μF is also required close to the VCC pin of the DC/DC
converter, if not already provided by the converter.
Layout Considerations
To achieve accurate current sensing, Kelvin connection
to the current sense resistor (RSNS in Figure 9) is recommended. The minimum trace width for 1oz copper foil is
0.02" per amp to ensure the trace stays at a reasonable
temperature. 0.03" per amp or wider is recommended.
Note that 1oz copper exhibits a sheet resistance of about
530μΩ/square. Small resistances can cause large errors in
high current applications. Noise immunity will be improved
significantly by locating resistive dividers close to the pins
with short VCC and GND traces.
43561fd
13
LT4356-1
APPLICATIONS INFORMATION
Design Example
CTMR is then chosen for 1ms of early warning time:
As a design example, take an application with the following specifications: VCC = 8V to 14V DC with transient up
to 80V, VOUT ≤ 16V, current limit (ILIM) at 5A, low battery
detection at 6V, and 1ms of overvoltage early warning
(Figure 9).
First, calculate the resistive divider value to limit VOUT to
16V during an overvoltage event:
1.25V • (R1 + R2)
VREG =
= 16V
R2
Set the current through R1 and R2 during the overvoltage
condition to 250μA.
R2 =
1.25V
= 5k
250µA
(16V – 1.25V ) • R2
1.25V
The closest standard value for CTMR is 47nF.
Finally, calculate R4 and R5 for the 6V low battery threshold
detection:
6V =
1.25V • (R4 + R5)
R5
Choose 100kΩ for R5.
R4 =
(6V – 1.25V ) • R5
1.25V
= 380k
The pass transistor, Q1, should be chosen to withstand
the output short condition with VCC = 14V.
= 58.88k
The closest standard value for R1 is 59kΩ.
Next calculate the sense resistor, RSNS, value:
RSNS
1ms • 5µA
= 50nF
100mV
Select 383kΩ for R4.
Choose 4.99kΩ for R2.
R1 =
CTMR =
50mV 50mV
=
=
= 10m
ILIM
5A
The total overcurrent fault time is:
tOC =
47nF • 0.85V
= 0.878ms
45.5μA
The power dissipation on Q1 equals to:
P=
14V • 50mV
= 70W
10m
These conditions are well within the Safe Operating Area
of IRLR2908.
43561fd
14
LT4356-1
TYPICAL APPLICATIONS
24V Overvoltage Regulator Withstands 150V at VIN
VIN
24V
Q1
IRF640
R9
1k
1W
VOUT
CLAMPED AT 32V
R3
10Ω
5
SNS
6
4
GATE
VCC
FB
D2*
SMAT70A
2
R2
4.99k
7
SHDN
8
FLT
9
LT4356DE-1
EN
GND
10
*DIODES INC.
R1
118k
3
OUT
TMR
1
43561 TA05
CTMR
0.1μF
43561fd
15
LT4356-1
TYPICAL APPLICATIONS
Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown
1k
0.5W
RSNS
10mΩ
VIN
12V
D2*
SMAJ58A
Q1
IRLR2908
R3
10Ω
R4
402k
6
C2
0.1μF
R6
10Ω
12
R5
105k
7
5
SNS
4
GATE
Q2
VN2222
3
OUT
VCC
FB
AOUT
SHDN
FLT
10
EN
TMR
1
R1
294k
D1
1N4746A
18V
1W
2
R2
VDD
24.9k
R6
47k
LT4356DE-1
IN+
GND
*DIODES INC.
VOUT
12V, 4A
C2
CLAMPED AT 16V
10μF
11
LBO
8
9
43561 TA03
CTMR
0.1μF
43561fd
16
LT4356-1
TYPICAL APPLICATIONS
2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35V
RSNS
15mΩ
VIN
48V
Q1
FDB3632
RS
100Ω
CS
0.01μF
D2*
SMAT70A
R4
140k
R3
10Ω
VOUT
48V
2.5A
R6
27k
CL
300μF
C1
6.8nF
D1
1N4714
BV = 33V
7
6
VCC
5
4
SNS GATE
3
OUT
12
IN+
SHDN
R5
4.02k
R8
47k
LT4356DE-1
8
9
R7
1M
FB
R1
226k
2
R2
4.02k
FLT
EN
GND
AOUT
TMR
10
1
*DIODES INC.
11
PWRGD
43561 TA06
CTMR
0.1μF
2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15V
RSNS
15mΩ
VIN
28V
Q1
FDB3632
RS
100Ω
CS
0.01μF
D2*
SMAT70A
R4
113k
R3
10Ω
VOUT
28V
2.5A
R6
27k
CL
300μF
C1
6.8nF
D1
1N4700
BV = 13V
7
6
VCC
5
4
SNS GATE
3
OUT
12
IN+
SHDN
R5
4.02k
R8
47k
LT4356DE-1
8
9
2
R1
110k
R2
4.02k
GND
10
*DIODES INC.
FB
FLT
EN
R7
1M
TMR
1
AOUT
11
PWRGD
43561 TA07
CTMR
0.1μF
43561fd
17
LT4356-1
PACKAGE DESCRIPTION
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev C)
0.70 ±0.05
3.60 ±0.05
1.70 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE OUTLINE
0.25 ± 0.05
3.30 ±0.05
(2 SIDES)
0.50
BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
4.00 ±0.10
(2 SIDES)
7
R = 0.115
TYP
0.40 ± 0.10
12
R = 0.05
TYP
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.00 ±0.10
(2 SIDES)
1.70 ± 0.05
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
0.75 ±0.05
0.00 – 0.05
6
0.25 ± 0.05
3.30 ±0.05
(2 SIDES)
1
(UE12/DE12) DFN 0905 REV C
0.50
BSC
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
43561fd
18
LT4356-1
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.497 ± 0.076
(.0196 ± .003)
REF
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS) 0307 REV E
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
43561fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT4356-1
TYPICAL APPLICATION
Overvoltage Regulator with Linear Regulator Up to 100mA
Q2
2N2905A
2.5V, 100mA
RSNS
10mΩ
VIN
12V
Q1
IRLR2908
D2*
SMAJ58A
R6
100k
6
C2
0.1μF
R6
10Ω
C5
10μF
VOUT
12V, 3A
CLAMPED AT 16V
R3
10Ω
4
GATE
5
SNS
VCC
R1
59k
3
OUT
FB
2
R2
4.99k
11
7
LT4356DE-1
AOUT
IN+
12
SHDN
FLT
8
GND
10
*DIODES INC.
EN
TMR
1
R4
249k
C3
47nF
R5
249k
9
43561 TA04
CTMR
0.1μF
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1641-1/LT1641-2
Positive High Voltage Hot Swap™ Controllers
Active Current Limiting, Supplies From 9V to 80V
LTC1696
Overvoltage Protection Controller
ThinSOT™ Package, 2.7V to 28V
LTC1735
High Efficiency Synchronous Step-Down
Switching Regulator
Output Fault Protection, 16-Pin SSOP
LTC1778
No RSENSE™ Wide Input Range Synchronous
Step-Down Controller
Up to 97% Efficiency, 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ (0.9)(VIN),
IOUT Up to 20A
LTC2909
Triple/Dual Inputs UV/OV Negative Monitor
Pin Selectable Input Polarity Allows Negative and OV Monitoring
LTC2912/LTC2913
Single/Dual UV/OV Voltage Monitor
Ads UV and OV Trip Values, ±1.5% Threshold Accuracy
LTC2914
Quad UV/OV Monitor
For Positive and Negative Supplies
LTC3727/LTC3727-1 2-Phase, Dual, Synchronous Controller
4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 14V
LTC3827/LTC3827-1 Low IQ, Dual, Synchronous Controller
4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 80μA Quiescent Current
LTC3835/LTC3835-1 Low IQ, Synchronous Step-Down Controller
LT3845
Low IQ, Synchronous Step-Down Controller
Single Channel LTC3827/LTC3827-1
LT3850
Dual, 550kHz, 2-Phase Sychronous Step-Down
Controller
Dual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle, 4mm × 4mm
QFN-28, SSOP-28 Packages
LT4256
Positive 48V Hot Swap Controller with
Open-Circuit Detect
Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to
80V Supply
LTC4260
Positive High Voltage Hot Swap Controller with
ADC and I2C
Wide Operating Range 8.5V to 80V
LT4351
Ideal MOSFET ORing Diode
External N-channel MOSFETs Replace ORing Diodes, 1.2V to 20V
LTC4354
Negative Voltage Diode-OR Controller
Controls Two N-Channel MOSFETs, 1μs Turn-Off, 80V Operation
LTC4355
Positive Voltage Diode-OR Controller
Controls Two N-Channel MOSFETs, 0.5μs Turn-Off, 80V Operation
4V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, 120μA Quiescent Current
Hot Swap, No RSENSE and ThinSOT are trademarks of Linear Technology Corporation.
43561fd
20
Linear Technology Corporation
LT 0808 REV D • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007