LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 LM1876 Overture™ Audio Power Amplifier Series Dual 20W Audio Power Amplifier with Mute and Standby Modes Check for Samples: LM1876 FEATURES DESCRIPTION • • The LM1876 is a stereo audio amplifier capable of delivering typically 20W per channel of continuous average output power into a 4Ω or 8Ω load with less than 0.1% THD+N. 1 23 • • • • • SPiKe Protection Minimal Amount of External Components Necessary Quiet Fade-In/Out Mute Mode Standby-Mode Isolated 15-Lead TO-220 Package (PFM) Non-Isolated 15-lead TO-220 Package Wide Supply Range 20V - 64V APPLICATIONS • • • High-End Stereo TVs Component Stereo Compact Stereo Each amplifier has an independent smooth transition fade-in/out mute and a power conserving standby mode which can be controlled by external logic. The performance of the LM1876, utilizing its Self Peak Instantaneous Temperature (°Ke) ( SPiKe™) protection circuitry, places it in a class above discrete and hybrid amplifiers by providing an inherently, dynamically protected Safe Operating Area (SOA). SPiKe protection means that these parts are safeguarded at the output against overvoltage, undervoltage, overloads, including thermal runaway and instantaneous temperature peaks. KEY SPECIFICATIONS • • • THD+N at 1kHz at 2 x 15W continuous averageoutput power into 4Ω or 8Ω: 0.1% (max) THD+N at 1kHz at continuous average output power of 2 x 20W into 8Ω: 0.009% (typ) Standby current: 4.2mA (typ) Connection Diagram Figure 1. Plastic Package- Top View Isolated Package (PFM) See Package Number NDB0015B Non-Isolated Package See Package Number NDL0015A 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Overture, SPiKe are trademarks of dcl_owner. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Typical Application Numbers in parentheses represent pinout for amplifier B. *Optional component dependent upon specific design requirements. Figure 2. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage |VCC| + |VEE| (No Input) 64V Supply Voltage |VCC| + |VEE| (with Input) 64V Common Mode Input Voltage (VCC or VEE) and |VCC| + |VEE| ≤ 54V Differential Input Voltage 54V Output Current Power Dissipation Internally Limited (4) ESD Susceptability 62.5W (5) Junction Temperature 2000V (6) 150°C Thermal Resistance Soldering Information Isolated NDB-Package θJC 2°C/W Non-Isolated NDL-Package θJC 1°C/W NDB Package (10 sec.) 260°C −40°C to +150°C Storage Temperature (1) (2) (3) (4) (5) (6) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication of device performance. All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. For operating at case temperatures above 25°C, the device must be derated based on a 150°C maximum junction temperature and a thermal resistance of θJC = 2°C/W (junction to case) for the NDB package and θJC = 1°C/W for the NDL package. Refer to DETERMINING THE CORRECT HEAT SINK in Application Information. Human body model, 100 pF discharged through a 1.5 kΩ resistor. The operating junction temperature maximum is 150°C, however, the instantaneous Safe Operating Area temperature is 250°C. Operating Ratings (1) (2) TMIN ≤ TA ≤ TMAX Temperature Range Supply Voltage |VCC| + |VEE| (1) (2) (3) (3) −20°C ≤ TA ≤ +85°C 20V to 64V All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication of device performance. Operation is specified up to 64V, however, distortion may be introduced from SPiKe Protection Circuitry if proper thermal considerations are not taken into account. Refer to Application Information for a complete explanation. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 3 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 Electrical Characteristics www.ti.com (1) (2) The following specifications apply for VCC = +22V, VEE = −22V with RL = 8Ω unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM1876 Typical (3 ) |VCC| + Power Supply Voltage (5) GND − VEE ≥ 9V (6) Output Power THD + N = 0.1% (max), (Continuous Average) f = 1 kHz |VCC| = |VEE| = 22V, RL = 8Ω |VCC| = |VEE| = 20V, RL = 4Ω THD + N (7) Units (Limits) 20 V (min) 64 V (max) 20 15 W/ch (min) 22 15 W/ch (min) |VEE| PO Limit (4) Total Harmonic Distortion 15 W/ch, RL = 8Ω 0.08 % Plus Noise 15 W/ch, RL = 4Ω, |VCC| = |VEE| = 20V 0.1 % 20 Hz ≤ f ≤ 20 kHz, AV = 26 dB Xtalk Channel Separation f = 1 kHz, VO = 10.9 Vrms 80 Slew Rate VIN = 1.414 Vrms, trise = 2 ns 18 12 V/μs (min) Total Quiescent Power Both Amplifiers VCM = 0V, Supply Current VO = 0V, IO = 0 mA Standby: Off 50 80 mA (max) Standby: On 4.2 6 mA (max) Input Offset Voltage VCM = 0V, IO = 0 mA 2.0 15 mV (max) IB Input Bias Current VCM = 0V, IO = 0 mA 0.2 0.5 μA (max) IOS Input Offset Current VCM = 0V, IO = 0 mA 0.002 0.2 μA (max) IO Output Current Limit |VCC| = |VEE| = 10V, tON = 10 ms, 3.5 2.9 Apk (min) |VCC–VO|, VCC = 20V, IO = +100 mA 1.8 2.3 V (max) |VO–VEE|, VEE = −20V, IO = −100 mA 2.5 3.2 V (max) VCC = 25V to 10V, VEE = −25V, 115 85 dB (min) 110 85 dB (min) 110 80 dB (min) SR (6) (8) Itotal VOS (8) dB VO = 0V (8) VOD PSRR Output Dropout Voltage (8) (9) Power Supply Rejection Ratio VCM = 0V, IO = 0 mA VCC = 25V, VEE = −25V to −10V VCM = 0V, IO = 0 mA (8) CMRR Common Mode Rejection Ratio VCC = 35V to 10V, VEE = −10V to −35V, VCM = 10V to −10V, IO = 0 mA AVOL (8) GBWP (1) (2) (3) (4) (5) (6) (7) (8) (9) 4 Open Loop Voltage Gain RL = 2 kΩ, Δ VO = 20 V 110 90 dB (min) Gain Bandwidth Product fO = 100 kHz, VIN = 50 mVrms 7.5 5 MHz (min) All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which specify performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are ensure that all parts are tested in production to meet the stated values. VEE must have at least −9V at its pin with reference to ground in order for the under-voltage protection circuitry to be disabled. In addition, the voltage differential between VCC and VEE must be greater than 14V. AC Electrical Test; Refer to Test Circuit #2 (AC Electrical Test Circuit). For a 4Ω load, and with ±20V supplies, the LM1876 can deliver typically 22W of continuous average output power with less than 0.1% (THD + N). With supplies above ±20V, the LM1876 cannot deliver more than 22W into a 4Ω due to current limiting of the output transistors. Thus, increasing the power supply above ±20V will only increase the internal power dissipation, not the possible output power. Increased power dissipation will require a larger heat sink as explained in Application Information. DC Electrical Test; Refer to Test Circuit #1 (DC Electrical Test Circuit). The output dropout voltage, VOD, is the supply voltage minus the clipping voltage. Refer to Figure 16, Figure 17, and Figure 18 in Typical Performance Characteristics. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 Electrical Characteristics (1)(2) (continued) The following specifications apply for VCC = +22V, VEE = −22V with RL = 8Ω unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM1876 Typical (3 Limit (4) 2.0 8 ) eIN (6) Input Noise IHF—A Weighting Filter Units (Limits) μV (max) RIN = 600Ω (Input Referred) SNR Signal-to-Noise Ratio PO = 1W, A—Weighted, 98 dB 108 dB Measured at 1 kHz, RS = 25Ω PO = 15W, A—Weighted Measured at 1 kHz, RS = 25Ω AM Mute Attenuation Pin 6,11 at 2.5V VIL Standby Low Input Voltage Not in Standby Mode VIH Standby High Input Voltage In Standby Mode VIL Mute Low Input Voltage Outputs Not Muted VIH Mute High Input Voltage Outputs Muted 115 80 dB (min) 0.8 V (max) 2.5 V (min) 0.8 V (max) 2.5 V (min) Standby Pin 2.0 Mute pin 2.0 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 5 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Test Circuit #1 (DC Electrical Test Circuit) Test Circuit #2 (AC Electrical Test Circuit) 6 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 Bridged Amplifier Application Circuit Figure 3. Bridged Amplifier Application Circuit Single Supply Application Circuit *Optional components dependent upon specific design requirements. Figure 4. Single Supply Amplifier Application Circuit Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 7 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Auxiliary Amplifier Application Circuit Figure 5. Special Audio Amplifier Application Circuit Equivalent Schematic (excluding active protection circuitry) Figure 6. LM1876 (per Amp) 8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 (excluding active protection circuitry) External Components Description Components Functional Description 1 RB Prevents currents from entering the amplifier's non-inverting input which may be passed through to the load upon power down of the system due to the low input impedance of the circuitry when the undervoltage circuitry is off. This phenomenon occurs when the supply voltages are below 1.5V. 2 Ri Inverting input resistance to provide AC gain in conjunction with Rf. 3 Rf 4 Ci 5 CS 6 RV 7 RIN (1) Sets the amplifier's input terminals DC bias point when CIN is present in the circuit. Also works with CIN to create a highpass filter at fC = 1/(2πRINCIN). Refer to Figure 5. 8 CIN (1) Input capacitor which blocks the input signal's DC offsets from being passed onto the amplifier's inputs. 9 RSN (1) Works with CSN to stabilize the output stage by creating a pole that reduces high frequency instabilities. 10 CSN (1) Works with RSN to stabilize the output stage by creating a pole that reduces high frequency instabilities. The pole is set at fC = 1/(2πRSNCSN). Refer to Figure 5. 11 L (1) 12 R (1) 13 RA 14 CA 15 RINP 16 RBI Provides input bias current for single supply operation. Refer to CLICKS AND POPS for a more detailed explanation of the function of RBI. 17 RE Establishes a fixed DC current for the transistor Q1 in single supply operation. This resistor stabilizes the halfsupply point along with CA. (1) Feedback resistance to provide AC gain in conjunction with Ri. (1) Feedback capacitor which ensures unity gain at DC. Also creates a highpass filter with Ri at fC = 1/(2πRiCi). Provides power supply filtering and bypassing. Refer to SUPPLY BYPASSING for proper placement and selection of bypass capacitors. (1) Acts as a volume control by setting the input voltage level. Provides high impedance at high frequencies so that R may decouple a highly capacitive load and reduce the Q of the series resonant circuit. Also provides a low impedance at low frequencies to short out R and pass audio signals to the load. Refer to Figure 5. Provides DC voltage biasing for the transistor Q1 in single supply operation. Provides bias filtering for single supply operation. (1) Limits the voltage difference between the amplifier's inputs for single supply operation. Refer to CLICKS AND POPS for a more detailed explanation of the function of RINP. Optional components dependent upon specific design requirements. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 9 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics 10 THD + N vs Frequency THD + N vs Frequency Figure 7. Figure 8. THD + N vs Frequency THD + N vs Output Power Figure 9. Figure 10. THD + N vs Output Power THD + N vs Output Power Figure 11. Figure 12. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 Typical Performance Characteristics (continued) THD + N vs Output Power THD + N vs Output Power Figure 13. Figure 14. THD + N vs Output Power Clipping Voltage vs Supply Voltage Figure 15. Figure 16. Clipping Voltage vs Supply Voltage Clipping Voltage vs Supply Voltage Figure 17. Figure 18. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 11 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 12 Output Power vs Load Resistance Power Dissipation vs Output Power Figure 19. Figure 20. Power Dissipation vs Output Power Output Power vs Supply Voltage Figure 21. Figure . Output Mute vs Mute Pin Voltage Output Mute vs Mute Pin Voltage Figure 22. Figure 23. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Channel Separation vs Frequency Pulse Response Figure 24. Figure 25. Large Signal Response Power Supply Rejection Ratio Figure 26. Figure 27. Common-Mode Rejection Ratio Open Loop Frequency Response Figure 28. Figure 29. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 13 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 14 Safe Area SPiKe Protection Response Figure 30. Figure 31. Supply Current vs Supply Voltage Pulse Thermal Resistance Figure 32. Figure 33. Pulse Thermal Resistance Supply Current vs Output Voltage Figure 34. Figure 35. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Pulse Power Limit Pulse Power Limit Figure 36. Figure 37. Supply Current vs Case Temperature Supply Current (ICC) vs Standby Pin Voltage Figure 38. Figure 39. Supply Current (IEE) vs Standby Pin Voltage Input Bias Current vs Case Temperature Figure 40. Figure 41. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 15 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Output Power/Channel vs Supply Voltage f = 1kHz, RL = 4Ω, 80kHz BW Output Power/Channel vs Supply Voltage f = 1kHz, RL = 6Ω, 80kHz BW Figure 42. Figure 43. Output Power/Channel vs Supply Voltage f = 1kHz, RL = 8Ω, 80kHz BW Figure 44. 16 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 APPLICATION INFORMATION MUTE MODE By placing a logic-high voltage on the mute pins, the signal going into the amplifiers will be muted. If the mute pins are left floating or connected to a logic-low voltage, the amplifiers will be in a non-muted state. There are two mute pins, one for each amplifier, so that one channel can be muted without muting the other if the application requires such a configuration. Refer to Typical Performance Characteristics for Figure 22 and Figure 23. STANDBY MODE The standby mode of the LM1876 allows the user to drastically reduce power consumption when the amplifiers are idle. By placing a logic-high voltage on the standby pins, the amplifiers will go into Standby Mode. In this mode, the current drawn from the VCC supply is typically less than 10 μA total for both amplifiers. The current drawn from the VEE supply is typically 4.2 mA. Clearly, there is a significant reduction in idle power consumption when using the standby mode. There are two Standby pins, so that one channel can be put in standby mode without putting the other amplifier in standby if the application requires such flexibility. Refer to Typical Performance Characteristics for Figure 39 and Figure 40. UNDER-VOLTAGE PROTECTION Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding capacitors to come up close to their full values before turning on the LM1876 such that no DC output spikes occur. Upon turn-off, the output of the LM1876 is brought to ground before the power supplies such that no transients occur at power-down. OVER-VOLTAGE PROTECTION The LM1876 contains over-voltage protection circuitry that limits the output current to approximately 3.5 Apk while also providing voltage clamping, though not through internal clamping diodes. The clamping effect is quite the same, however, the output transistors are designed to work alternately by sinking large current spikes. SPiKe PROTECTION The LM1876 is protected from instantaneous peak-temperature stressing of the power transistor array. The Figure 30 in Typical Performance Characteristics shows the area of device operation where SPiKe Protection Circuitry is not enabled. The waveform to the right of the SOA graph exemplifies how the dynamic protection will cause waveform distortion when enabled. THERMAL PROTECTION The LM1876 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device. When the temperature on the die reaches 165°C, the LM1876 shuts down. It starts operating again when the die temperature drops to about 155°C, but if the temperature again begins to rise, shutdown will occur again at 165°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal shutdown temperature limits of 165°C and 155°C. This greatly reduces the stress imposed on the IC by thermal cycling, which in turn improves its reliability under sustained fault conditions. Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen such that thermal shutdown will not be reached during normal operation. Using the best heat sink possible within the cost and space constraints of the system will improve the long-term reliability of any power semiconductor device, as discussed in DETERMINING THE CORRECT HEAT SINK. DETERMlNlNG MAXIMUM POWER DISSIPATION Power dissipation within the integrated circuit package is a very important parameter requiring a thorough understanding if optimum power output is to be obtained. An incorrect maximum power dissipation calculation may result in inadequate heat sinking causing thermal shutdown and thus limiting the output power. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 17 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com Equation 1 exemplifies the theoretical maximum power dissipation point of each amplifier where VCC is the total supply voltage. PDMAX = VCC2/2π2RL (1) Thus by knowing the total supply voltage and rated output load, the maximum power dissipation point can be calculated. The package dissipation is twice the number which results from Equation 1 since there are two amplifiers in each LM1876. Refer to Figure 21 and Figure 20 in Typical Performance Characteristics which show the actual full range of power dissipation not just the maximum theoretical point that results from Equation 1. DETERMINING THE CORRECT HEAT SINK The choice of a heat sink for a high-power audio amplifier is made entirely to keep the die temperature at a level such that the thermal protection circuitry does not operate under normal circumstances. The thermal resistance from the die (junction) to the outside air (ambient) is a combination of three thermal resistances, θJC, θCS, and θSA. In addition, the thermal resistance, θJC (junction to case), of the LM1876TF is 2°C/W and the LM1876T is 1°C/W. Using Thermalloy Thermacote thermal compound, the thermal resistance, θCS (case to sink), is about 0.2°C/W. Since convection heat flow (power dissipation) is analogous to current flow, thermal resistance is analogous to electrical resistance, and temperature drops are analogous to voltage drops, the power dissipation out of the LM1876 is equal to the following: PDMAX = (TJMAX−TAMB)/θJA where • • • TJMAX = 150°C TAMB is the system ambient temperature θJA = θJC + θCS + θSA (2) Once the maximum package power dissipation has been calculated using Equation 1, the maximum thermal resistance, θSA, (heat sink to ambient) in °C/W for a heat sink can be calculated. This calculation is made using Equation 3 which is derived by solving for θSA in Equation 2. θSA = [(TJMAX−TAMB)−PDMAX(θJC +θCS)]/PDMAX (3) Again it must be noted that the value of θSA is dependent upon the system designer's amplifier requirements. If the ambient temperature that the audio amplifier is to be working under is higher than 25°C, then the thermal resistance for the heat sink, given all other things are equal, will need to be smaller. SUPPLY BYPASSING The LM1876 has excellent power supply rejection and does not require a regulated supply. However, to improve system performance as well as eliminate possible oscillations, the LM1876 should have its supply leads bypassed with low-inductance capacitors having short leads that are located close to the package terminals. Inadequate power supply bypassing will manifest itself by a low frequency oscillation known as “motorboating” or by high frequency instabilities. These instabilities can be eliminated through multiple bypassing utilizing a large tantalum or electrolytic capacitor (10 μF or larger) which is used to absorb low frequency variations and a small ceramic capacitor (0.1 μF) to prevent any high frequency feedback through the power supply lines. If adequate bypassing is not provided, the current in the supply leads which is a rectified component of the load current may be fed back into internal circuitry. This signal causes distortion at high frequencies requiring that the supplies be bypassed at the package terminals with an electrolytic capacitor of 470 μF or more. BRIDGED AMPLIFIER APPLICATION The LM1876 has two operational amplifiers internally, allowing for a few different amplifier configurations. One of these configurations is referred to as “bridged mode” and involves driving the load differentially through the LM1876's outputs. This configuration is shown in Figure 3. Bridged mode operation is different from the classical single-ended amplifier configuration where one side of its load is connected to ground. A bridge amplifier design has a distinct advantage over the single-ended configuration, as it provides differential drive to the load, thus doubling output swing for a specified supply voltage. Consequently, theoretically four times the output power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped. 18 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. For each operational amplifier in a bridge configuration, the internal power dissipation will increase by a factor of two over the single ended dissipation. Thus, for an audio power amplifier such as the LM1876, which has two operational amplifiers in one package, the package dissipation will increase by a factor of four. To calculate the LM1876's maximum power dissipation point for a bridged load, multiply Equation 1 by a factor of four. This value of PDMAX can be used to calculate the correct size heat sink for a bridged amplifier application. Since the internal dissipation for a given power supply and load is increased by using bridged-mode, the heatsink's θSA will have to decrease accordingly as shown by Equation 3. Refer to DETERMINING THE CORRECT HEAT SINK for a more detailed discussion of proper heat sinking for a given application. SINGLE-SUPPLY AMPLIFIER APPLICATION The typical application of the LM1876 is a split supply amplifier. But as shown in Figure 4, the LM1876 can also be used in a single power supply configuration. This involves using some external components to create a halfsupply bias which is used as the reference for the inputs and outputs. Thus, the signal will swing around halfsupply much like it swings around ground in a split-supply application. Along with proper circuit biasing, a few other considerations must be accounted for to take advantage of all of the LM1876 functions. The LM1876 possesses a mute and standby function with internal logic gates that are half-supply referenced. Thus, to enable either the Mute or Standby function, the voltage at these pins must be a minimum of 2.5V above half-supply. In single-supply systems, devices such as microprocessors and simple logic circuits used to control the mute and standby functions, are usually referenced to ground, not half-supply. Thus, to use these devices to control the logic circuitry of the LM1876, a “level shifter,” like the one shown in Figure 45, must be employed. A level shifter is not needed in a split-supply configuration since ground is also half-supply. Figure 45. Level Shift Circuit When the voltage at the Logic Input node is 0V, the 2N3904 is “off” and thus resistor Rc pulls up mute or standby input to the supply. This enables the mute or standby function. When the Logic Input is 5V, the 2N3904 is “on” and consequently, the voltage at the collector is essentially 0V. This will disable the mute or standby function, and thus the amplifier will be in its normal mode of operation. Rshift, along with Cshift, creates an RC time constant that reduces transients when the mute or standby functions are enabled or disabled. Additionally, Rshift limits the current supplied by the internal logic gates of the LM1876 which insures device reliability. Refer to MUTE MODE and STANDBY MODE in Application Information for a more detailed description of these functions. CLICKS AND POPS In the typical application of the LM1876 as a split-supply audio power amplifier, the IC exhibits excellent “click” and “pop” performance when utilizing the mute and standby modes. In addition, the device employs UnderVoltage Protection, which eliminates unwanted power-up and power-down transients. The basis for these functions are a stable and constant half-supply potential. In a split-supply application, ground is the stable halfsupply potential. But in a single-supply application, the half-supply needs to charge up just like the supply rail, VCC. This makes the task of attaining a clickless and popless turn-on more challenging. Any uneven charging of the amplifier inputs will result in output clicks and pops due to the differential input topology of the LM1876. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 19 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com To achieve a transient free power-up and power-down, the voltage seen at the input terminals should be ideally the same. Such a signal will be common-mode in nature, and will be rejected by the LM1876. In Figure 4, the resistor RINP serves to keep the inputs at the same potential by limiting the voltage difference possible between the two nodes. This should significantly reduce any type of turn-on pop, due to an uneven charging of the amplifier inputs. This charging is based on a specific application loading and thus, the system designer may need to adjust these values for optimal performance. As shown in Figure 4, the resistors labeled RBI help bias up the LM1876 off the half-supply node at the emitter of the 2N3904. But due to the input and output coupling capacitors in the circuit, along with the negative feedback, there are two different values of RBI, namely 10 kΩ and 200 kΩ. These resistors bring up the inputs at the same rate resulting in a popless turn-on. Adjusting these resistors values slightly may reduce pops resulting from power supplies that ramp extremely quick or exhibit overshoot during system turn-on. AUDIO POWER AMPLlFIER DESIGN Design a 15W/8Ω Audio Amplifier Given: Power Output 15 Wrms Load Impedance 8Ω Input Level 1 Vrms(max) Input Impedance 47 kΩ Bandwidth 20 Hz−20 kHz ±0.25 dB A designer must first determine the power supply requirements in terms of both voltage and current needed to obtain the specified output power. VOPEAK can be determined from Equation 4 and IOPEAK from Equation 5. (4) (5) To determine the maximum supply voltage the following conditions must be considered. Add the dropout voltage to the peak output swing VOPEAK, to get the supply rail at a current of IOPEAK. The regulation of the supply determines the unloaded voltage which is usually about 15% higher. The supply voltage will also rise 10% during high line conditions. Therefore the maximum supply voltage is obtained from the following equation. Max supplies ≈ ± (VOPEAK + VOD) (1 + regulation) (1.1) (6) For 15W of output power into an 8Ω load, the required VOPEAK is 15.49V. A minimum supply rail of 20.5V results from adding VOPEAK and VOD. With regulation, the maximum supplies are ±26V and the required IOPEAK is 1.94A from Equation 5. It should be noted that for a dual 15W amplifier into an 8Ω load the IOPEAK drawn from the supplies is twice 1.94 Apk or 3.88 Apk. At this point it is a good idea to check the Power Output vs Supply Voltage to ensure that the required output power is obtainable from the device while maintaining low THD+N. In addition, the designer should verify that with the required power supply voltage and load impedance, that the required heatsink value θSA is feasible given system cost and size constraints. Once the heatsink issues have been addressed, the required gain can be determined from Equation 7. (7) From Equation 7, the minimum AV is: AV ≥ 11. By selecting a gain of 21, and with a feedback resistor, Rf = 20 kΩ, the value of Ri follows from Equation 8. Ri = Rf (AV − 1) (8) Thus with Ri = 1 kΩ a non-inverting gain of 21 will result. Since the desired input impedance was 47 kΩ, a value of 47 kΩ was selected for RIN. The final design step is to address the bandwidth requirements which must be stated as a pair of −3 dB frequency points. Five times away from a −3 dB point is 0.17 dB down from passband response which is better than the required ±0.25 dB specified. This fact results in a low and high frequency pole of 4 Hz and 100 kHz respectively. As stated in External Components Description, Ri in conjunction with Ci create a high-pass filter. Ci ≥ 1/(2π * 1 kΩ * 4 Hz) = 39.8 μF; 20 use 39 μF. Submit Documentation Feedback (9) Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 LM1876 www.ti.com SNAS097C – MAY 1999 – REVISED APRIL 2013 The high frequency pole is determined by the product of the desired high frequency pole, fH, and the gain, AV. With a AV = 21 and fH = 100 kHz, the resulting GBWP is 2.1 MHz, which is less than the minimum GBWP of the LM1876 of 5 MHz. This will ensure that the high frequency response of the amplifier will be no worse than 0.17 dB down at 20 kHz which is well within the bandwidth requirements of the design. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 21 LM1876 SNAS097C – MAY 1999 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision B (April 2013) to Revision C • 22 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 21 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1876 PACKAGE OPTION ADDENDUM www.ti.com 30-Jun-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM1876T LIFEBUY TO-220 NDL 15 20 TBD Call TI Call TI -20 to 85 LM1876T LM1876T/NOPB LIFEBUY TO-220 NDL 15 20 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -20 to 85 LM1876T LM1876TF LIFEBUY TO-220 NDB 15 20 TBD Call TI Call TI -20 to 85 LM1876TF LM1876TF/NOPB ACTIVE TO-220 NDB 15 20 Pb-Free (RoHS Exempt) CU SN Level-1-NA-UNLIM -20 to 85 LM1876TF (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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