LM2773 www.ti.com SNVS554A – JANUARY 2008 – REVISED MAY 2013 LM2773 Low-Ripple 1.8V/1.6V Spread-Spectrum Switched Capacitor Step-Down Regulator Check for Samples: LM2773 FEATURES DESCRIPTION • • • • • • • • • • • • The LM2773 is a switched capacitor step-down regulator that produces a selectable 1.8V or 1.6V output. It is capable of supplying loads up to 300mA. The LM2773 operates with an input voltage from 2.5V to 5.5V, accommodating 1-cell Li-Ion batteries and chargers. 1 2 Low-Noise Spread Spectrum Operation 1.8V/1.6V Selectable Output Voltage 2% Output Voltage Regulation > 75% Efficiency in 1.8V Mode Very Low Output Ripple: 10mV @ 300mA Output Currents up to 300mA 2.5V to 5.5V Input Voltage Range Shutdown Disconnects Load from VIN 1.15MHz Switching Frequency No Inductors…Small Solution Size Short Circuit and Thermal Protection 0.5mm pitch, DSBGA-9 (1.511 × 1.511mm × 0.6mm) The LM2773 utilizes a regulated charge pump with gains of 2/3x and 1x. It has very low ripple and noise on both the input and output due to its pre-regulated 1.15MHz (typ.) switching frequency and spread spectrum operation. When output currents are low, the LM2773 automatically switches to a low-ripple PFM regulation mode to maintain high efficiency over the entire load range. The LM2773 is available in TI's 0.5mm pitch 9-bump DSBGA. APPLICATIONS • • • Power Supply for DSP's, Memory, and Microprocessors Mobile Phones and Pagers Digital Cameras, Portable Music Players, and Other Portable Electronic Devices Typical Application Circuit VIN = 2.5V to 5.5V CIN 1 PF VIN GND C2+ VOUT VOUT: 1.8V or 1.6V IOUT up to 300 mA COUT 4.7 PF LM2773 C1+ C1 1 PF C2 1 PF C2- C1- EN SEL Capacitors: 1 PF - C1005 (0402), X5R, 6.3V 4.7 PF - C1608 (0603), X5R, 6.3V or equivalent Figure 1. Figure 2. LM2773 Efficiency vs. Low-Dropout Linear Regulator (LDO) Efficiency 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2013, Texas Instruments Incorporated LM2773 SNVS554A – JANUARY 2008 – REVISED MAY 2013 www.ti.com Connection Diagram A1 A2 A3 A3 A2 A1 B1 B2 B3 B3 B2 B1 C1 C2 C3 C3 C2 C1 Top View Bottom View 9-Bump DSBGA See Package Number YZR0009 0.5mm Pitch 1.511mm x 1.511mm x 0.6mm PIN DESCRIPTIONS Pin # Name A1 C2- Description A2 VOUT Output Voltage A3 C1+ Flying Capacitor 1: Positive Terminal B1 GND Ground B2 EN Device Enable. Logic HIGH: Enabled, Logic LOW: Shutdown. Flying Capacitor 2: Negative Terminal B3 VIN Input Voltage. Recommended VIN Operating Range = 2.5V to 5.5V. C1 SEL Voltage Mode Select. Logic HIGH: VOUT = 1.6V, Logic LOW: VOUT = 1.8V C2 C1- Flying Capacitor 1: Negative Terminal C3 C2+ Flying Capacitor 2: Positive Terminal These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 LM2773 www.ti.com SNVS554A – JANUARY 2008 – REVISED MAY 2013 Absolute Maximum Ratings (1) (2) (3) VIN Pin Voltage -0.3V to 6.0V EN, SEL Pin Voltage -0.3V to (VIN+0.3V) w/ 6.0V max Continuous Power Dissipation (4) Internally Limited Junction Temperature (TJ-MAX) 150°C Storage Temperature Range -65°C to +150° C Maximum Lead Temperature (Soldering, 10 sec.) 265°C ESD Rating (5) Human Body Model: (1) (2) (3) (4) (5) 2.5kV Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is ensured. Operating Ratings do not imply specified performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics tables. If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. All voltages are with respect to the potential at the GND pins. Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150°C (typ.) and disengages at TJ=140°C (typ.). The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. MIL-STD-883 3015.7 Operating Ratings (1) (2) Input Voltage Range 2.5V to 5.5V Recommended Load Current Range 0mA to 300mA Junction Temperature (TJ) Range Ambient Temperature (TA) Range (1) (2) (3) -30°C to +110°C (3) -30°C to +85°C Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pins. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 110°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). Thermal Properties Junction-to-Ambient Thermal Resistance (θJA), DSBGA-9 Package (1) (1) 75°C/W Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues. Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 3 LM2773 SNVS554A – JANUARY 2008 – REVISED MAY 2013 www.ti.com Electrical Characteristics (1) (2) Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full operating junction temperature range (-30°C ≤ TJ ≤ +110°C) . Unless otherwise noted, specifications apply to the LM2773 Typical Application Circuit (pg. 1) with: VIN = 3.6V; V(EN) = 1.8V, V(SEL) = 0V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF. (3) Symbol Typ Max 1.8V Mode Output Voltage Regulation 2.5V ≤ VIN ≤ 5.5V 0mA ≤ IOUT ≤ 300mA 1.779 (−2%) 1.815 1.851 (+2%) 1.6V Mode Output Voltage Regulation V(SEL) = 1.8V 2.5V ≤ VIN ≤ 5.5V 0mA ≤ IOUT ≤ 300mA 1.587 (−2%) 1.619 1.651 (+2%) VOUT/IOUT Output Load Regulation 0mA ≤ IOUT ≤ 300mA VOUT/VIN Output Line Regulation E Power Efficiency IOUT = 300mA IQ Quiescent Supply Current IOUT = 0mA See (4) 48 VR Fixed Frequency Output Ripple IOUT = 300mA 10 VR–PFM PFM–Mode Output Ripple IOUT < 40mA 12 ISD Shutdown Current V(EN) = 0V 0.1 0.625 µA FSW Switching Frequency 3.0V ≤ VIN ≤ 5.5V 1.15 1.50 MHz ROL Open-Loop Output Resistance IOUT = 300mA See (5) ICL Output Current Limit tON Turn-on Time VIL Logic-low Input Voltage EN, SEL Pins 2.5V ≤ VIN ≤ 5.5V 0 0.5 V VIH Logic-high Input Voltage EN, SEL Pins 2.5V ≤ VIN ≤ 5.5V 1.0 VIN V IIH Logic-high Input Current V(EN), V(SEL) = 1.8V See (7) IIL Logic-low Input Current V(EN), V(SEL) = 0V VOUT (1) (2) (3) (4) (5) (6) (7) 4 Parameter Condition Min 0.80 VIN = 5.5V 0V ≤ VOUT ≤ 0.2V See (6) Units V 0.15 mV/mA 0.3 %/V 75 % 55 µA mV mV 1.0 Ω 500 mA 150 µs 5 µA 0.01 µA All voltages are with respect to the potential at the GND pins. Min and Max limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most likely norm. CIN, COUT, C1, C2: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics. VOUT is set to 1.9V during this test (Device is not switching). Open loop output resistance can be used to predict output voltage when, under low VIN and high IOUT conditions, VOUT falls out of regulation. VOUT = (Gain)VIN - (ROL x IOUT) Under the stated conditions, the maximum input current is equal to 2/3 the maximum output current. There are 350kΩ pull-down resistors connected internally between the EN pin and GND and the SEL pin and GND. Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 LM2773 www.ti.com SNVS554A – JANUARY 2008 – REVISED MAY 2013 BLOCK DIAGRAM LM2773 VIN C1+ SWITCH ARRAY GAIN CONTROL SWITCH CONTROL G =1, 2 C1C2+ 3 C2GND Spread Spectrum 1.25V Ref. PFM Control Current sense VOUT 1.15 MHz OSC. EN Enable/ Shutdown Control EN Soft-Start Ramp 0.8V Ref. SEL Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 5 LM2773 SNVS554A – JANUARY 2008 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified: VIN = 3.6V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF, V(EN) = 1.8V, V(SEL) = 0V, TA = 25°C. Capacitors are low-ESR multi-layer ceramic capacitors (MLCC's). 6 Output Voltage vs. Input Voltage, 1.8V Mode Output Voltage vs. Input Voltage, 1.6V Mode Figure 3. Figure 4. Output Voltage vs. Output Current, 1.8V Mode Output Voltage vs. Output Current, 1.6V Mode Figure 5. Figure 6. Efficiency vs. Input Voltage, 1.8V Mode Efficiency vs. Input Voltage, 1.6V Mode Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 LM2773 www.ti.com SNVS554A – JANUARY 2008 – REVISED MAY 2013 Typical Performance Characteristics (continued) Unless otherwise specified: VIN = 3.6V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF, V(EN) = 1.8V, V(SEL) = 0V, TA = 25°C. Capacitors are low-ESR multi-layer ceramic capacitors (MLCC's). Shutdown Supply Current Operating Supply Current Figure 9. Figure 10. Line Step 3.0V to 4.2V with Load = 300mA, 1.8V Mode Line Step 3.0V to 4.2V with Load = 300mA, 1.6V Mode CH1: VIN; Scale: 1V/Div, DC Coupled CH2: VOUT; Scale: 20mV/Div, AC Coupled Time scale: 10ms/Div Figure 11. Load Step 0mA to 300mA, VIN = 3.6V, 1.8V Mode CH1: VIN; Scale: 1V/Div, DC Coupled CH2: VOUT; Scale: 20mV/Div, AC Coupled Time scale: 10ms/Div Figure 12. Load Step 300mA to 0mA, VIN = 3.6V, 1.8V Mode CH2: VOUT; Scale: 100mV/Div DC Coupled, Offset 1.834V CH4: IOUT; Scale: 100mA/Div Time scale: 4ms/Div Figure 13. CH2: VOUT; Scale: 100mV/Div DC Coupled, Offset 1.834V CH4: IOUT; Scale: 100mA/Div Time scale: 4ms/Div Figure 14. Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 7 LM2773 SNVS554A – JANUARY 2008 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: VIN = 3.6V, CIN = C1 = C2 = 1.0µF, COUT = 4.7µF, V(EN) = 1.8V, V(SEL) = 0V, TA = 25°C. Capacitors are low-ESR multi-layer ceramic capacitors (MLCC's). Load Step 0mA to 300mA, VIN = 3.6V, 1.6V Mode Load Step 300mA to 0mA, VIN = 3.6V, 1.6V Mode CH2: VOUT; Scale: 100mV/Div DC Coupled, Offset 1.633V CH4: IOUT; Scale: 100mA/Div Time scale: 4ms/Div Figure 15. 8 CH2: VOUT; Scale: 100mV/Div DC Coupled, Offset 1.633V CH4: IOUT; Scale: 100mA/Div Time scale: 4ms/Div Figure 16. 1.8V Mode Startup, Load = 300mA 1.6V Mode Startup, Load = 300mA, VSEL = VIN CH1: VEN; Scale: 5V/Div, DC Coupled CH2: VOUT; Scale: 500mV/Div, DC Coupled Time scale: 10µs/Div Figure 17. CH1: VEN; Scale: 5V/Div, DC Coupled CH2: VOUT; Scale: 500mV/Div, DC Coupled Time scale: 10µs/Div Figure 18. Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 LM2773 www.ti.com SNVS554A – JANUARY 2008 – REVISED MAY 2013 OPERATION DESCRIPTION Overview The LM2773 is a switched capacitor converter that produces a selectable 1.8V or 1.6V regulated output. The core of the part is a highly efficient charge pump that utilizes fixed frequency pre-regulation, Pulse Frequency Modulation, and spread spectrum to minimize conducted noise and power losses over wide input voltage and output current ranges. A description of the principal operational characteristics of the LM2773 is detailed in the Circuit Description, and Efficiency Performance sections. These sections refer to details in the Block Diagram. Circuit Description The core of the LM2773 is a two-phase charge pump controlled by an internally generated non-overlapping clock. The charge pump operates by using external flying capacitors C1 and C2 to transfer charge from the input to the output. The LM2773 will operate in a 1x Gain, with the input current being equal to the load current, when the input voltage is at or below 3.5V (typ.) for 1.8V mode or 3.3V (typ.) for 1.6V mode. At input voltages above 3.5V (typ.) or 3.3V (typ.) for the respective voltage mode selected, the part utilizes a gain of 2/3x, resulting in an input current equal to 2/3 times the load current. The two phases of the switched capacitor switching cycle will be referred to as the "charge phase" and the "discharge phase". During the charge phase, the flying capacitor is charged by the input supply. After half of the switching cycle [ t = 1/(2×FSW) ], the LM2773 switches to the discharge phase. In this configuration, the charge that was stored on the flying capacitors in the charge phase is transferred to the output. The LM2773 uses fixed frequency pre-regulation to regulate the output voltage to 1.8V during moderate to high load currents. The input and output connections of the flying capacitors are made with internal MOS switches. Pre-regulation limits the gate drive of the MOS switch connected between the voltage input and the flying capacitors. Controlling the on resistance of this switch limits the amount of charge transferred into and out of each flying capacitor during the charge and discharge phases, and in turn helps to keep the output ripple very low. When output currents are low (<40mA typ.), the LM2773 automatically switches to a low-ripple Pulse Frequency Modulation (PFM) form of regulation. In PFM mode, the flying capacitors stay in the discharge phase until the output voltage drops below a predetermined trip point. When this occurs, the flying capacitors switch back to the charge phase. After being charged, the flying capacitors repeat the process of staying in the discharge phase and switching to the charge phase when necessary. The LM2773 utilizes spread spectrum operation to distrubute the peak radiated energy of the device over a wider frequency band, reducing electromagnetic interference (EMI). Spread spectrum is used during all modes of operation for the LM2773. Efficiency Performance Charge-pump efficiency is derived in the following two ideal equations (supply current and other losses are neglected for simplicity): IIN = G × IOUT E = (VOUT × IOUT) ÷ (VIN × IIN) = VOUT ÷ (G × VIN) (1) (2) In the equations, G represents the charge pump gain. Efficiency is at its highest as G×VIN approaches VOUT. Refer to the efficiency graph in the Typical Performance Characteristics section for detailed efficiency data. The transition between the gain of 1x and 2/3x is clearly distinguished by the sharp discontinuity in the efficiency curve. Shutdown and Voltage Select The LM2773 is in shutdown mode when the voltage on the enable pin (EN) is logic-low. In shutdown, the LM2773 draws virtually no supply current. When in shutdown, the output of the LM2773 is completely disconnected from the input. Internal feedback resistors pull the output voltage down to 0V during shutdown. The SEL pin sets the output voltage at either 1.8V or 1.6V. A logic-low voltage on the SEL pin will place the output of the LM2773 in the 1.6V mode, and a logic-high voltage on the SEL pin will place it into the 1.8V mode. There are 350kΩ pull-down resistors connected internally between the EN pin and GND and the SEL pin and GND. Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 9 LM2773 SNVS554A – JANUARY 2008 – REVISED MAY 2013 www.ti.com Soft Start The LM2773 employs soft start circuitry to prevent excessive input inrush currents during startup. At startup, the output voltage gradually rises from 0V to the nominal output voltage. This occurs in 150µs (typ.). Soft-start is engaged when the part is enabled. Thermal Shutdown Protection from damage related to overheating is achieved with a thermal shutdown feature. When the junction temperature rises to 150°C (typ.), the part switches into shutdown mode. The LM2773 disengages thermal shutdown when the junction temperature of the part is reduced to 140°C (typ.). Due to the high efficiency of the LM2773, thermal shutdown and/or thermal cycling should not be encountered when the part is operated within specified input voltage, output current, and ambient temperature operating ratings. If thermal cycling is seen under these conditions, the most likely cause is an inadequate PCB layout that does not allow heat to be sufficiently dissipated out of the DSBGA package. Current Limit Protection The LM2773 charge pump contains current limit protection circuitry that protects the device during VOUT fault conditions where excessive current is drawn. Output current is limited to 500mA (typ). APPLICATION INFORMATION Recommended Capacitor Types The LM2773 requires 4 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and have very low equivalent series resistance (ESR, ≤ 15mΩ typ.). Tantalum capacitors, OS-CON capacitors, and aluminum electrolytic capacitors generally are not recommended for use with the LM2773 due to their high ESR, as compared to ceramic capacitors. For most applications, ceramic capacitors with an X7R or X5R temperature characteristic are preferred for use with the LM2773. These capacitors have tight capacitance tolerance (as good as ±10%) and hold their value over temperature (X7R: ±15% over -55°C to 125°C; X5R: ±15% over -55°C to 85°C). Capacitors with a Y5V or Z5U temperature characteristic are generally not recommended for use with the LM2773. These types of capacitors typically have wide capacitance tolerance (+80%, -20%) and vary significantly over temperature (Y5V: +22%, -82% over -30°C to +85°C range; Z5U: +22%, -56% over +10°C to +85°C range). Under some conditions, a 1µF-rated Y5V or Z5U capacitor could have a capacitance as low as 0.1µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance requirements of the LM2773. Net capacitance of a ceramic capacitor decreases with increased DC bias. This degradation can result in lower capacitance than expected on the input and/or output, resulting in higher ripple voltages and currents. Using capacitors at DC bias voltages significantly below the capacitor voltage rating will usually minimize DC bias effects. Consult capacitor manufacturers for information on capacitor DC bias characteristics. Capacitance characteristics can vary quite dramatically with different application conditions, capacitor types, and capacitor manufacturers. It is strongly recommended that the LM2773 circuit be thoroughly evaluated early in the design-in process with the mass-production capacitors of choice. This will help ensure that any such variability in capacitance does not negatively impact circuit performance. The table below lists some leading ceramic capacitor manufacturers. 10 Manufacturer Contact Information AVX www.avx.com Murata www.murata.com Taiyo-Yuden www.t-yuden.com TDK www.component.tdk.com Vishay-Vitramon www.vishay.com Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 LM2773 www.ti.com SNVS554A – JANUARY 2008 – REVISED MAY 2013 Output Capacitor and Output Voltage Ripple The output capacitor in the LM2773 circuit (COUT) directly impacts the magnitude of output voltage ripple. Other prominent factors also affecting output voltage ripple include input voltage, output current and flying capacitance. Due to the complexity of the regulation topology, providing equations or models to approximate the magnitude of the ripple can not be easily accomplished. But one important generalization can be made: increasing (decreasing) the output capacitance will result in a proportional decrease (increase) in output voltage ripple. In typical high-current applications, a 4.7µF low-ESR ceramic output capacitor is recommended. Different output capacitance values can be used to reduce ripple, shrink the solution size, and/or cut the cost of the solution. But changing the output capacitor may also require changing the flying capacitor and/or input capacitor to maintain good overall circuit performance. Performance of the LM2773 with different capacitor setups in discussed in the section Recommended Capacitor Configurations. High ESR in the output capacitor increases output voltage ripple. If a ceramic capacitor is used at the output, this is usually not a concern because the ESR of a ceramic capacitor is typically very low and has only a minimal impact on ripple magnitudes. If a different capacitor type with higher ESR is used (tantalum, for example), the ESR could result in high ripple. To eliminate this effect, the net output ESR can be significantly reduced by placing a low-ESR ceramic capacitor in parallel with the primary output capacitor. The low ESR of the ceramic capacitor will be in parallel with the higher ESR, resulting in a low net ESR based on the principles of parallel resistance reduction. Input Capacitor and Input Voltage Ripple The input capacitor (CIN) is a reservoir of charge that aids a quick transfer of charge from the supply to the flying capacitors during the charge phase of operation. The input capacitor helps to keep the input voltage from drooping at the start of the charge phase when the flying capacitors are connected to the input. It also filters noise on the input pin, keeping this noise out of sensitive internal analog circuitry that is biased off the input line. Much like the relationship between the output capacitance and output voltage ripple, input capacitance has a dominant, first-order effect on input ripple magnitude. Increasing (decreasing) the input capacitance will result in a proportional decrease (increase) in input voltage ripple. Input voltage, output current, and flying capacitance also will affect input ripple levels to some degree. In typical high-current applications, a 1µF low-ESR ceramic capacitor is recommended on the input. Different input capacitance values can be used to reduce ripple, shrink the solution size, and/or cut the cost of the solution. But changing the input capacitor may also require changing the flying capacitor and/or output capacitor to maintain good overall circuit performance. Performance of the LM2773 with different capacitor setups is discussed below in Recommended Capacitor Configurations. Flying Capacitors The flying capacitors (C1, C2) transfer charge from the input to the output. Flying capacitance can impact both output current capability and ripple magnitudes. If flying capacitance is too small, the LM2773 may not be able to regulate the output voltage when load currents are high. On the other hand, if the flying capacitance is too large, the flying capacitor might overwhelm the input and output capacitors, resulting in increased input and output ripple. In typical high-current applications, 1µF low-ESR ceramic capacitors are recommended for the flying capacitors. Polarized capacitors (tantalum, aluminum electrolytic, etc.) must not be used for the flying capacitor, as they could become reverse-biased during LM2773 operation. Recommended Capacitor Configurations The data in Table 1 can be used to assist in the selection of capacitance configurations that best balances solution size and cost with the electrical requirements of the application. As previously discussed, input and output ripple voltages will vary with output current and input voltage. The numbers provided show expected ripple voltage with VIN = 3.6V and a load current of 300mA. The table offers a first look at approximate ripple levels and provides a comparison of different capacitor configurations, but is not intended to ensure performance. With any capacitance configuration chosen, always verify that the performance of the ripple waveforms are suitable for the intended application. The same capacitance value must be used for all the flying capacitors. Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 11 LM2773 SNVS554A – JANUARY 2008 – REVISED MAY 2013 www.ti.com Table 1. LM2773 Performance with Different Capacitor Configurations, 1.8V Mode CAPACITOR CONFIGURATION (VIN = 3.6V) TYPICAL OUTPUT RIPPLE CIN = 1µF, COUT = 4.7µF, C1, C2 = 1µF 10mV CIN = 1µF, COUT = 2.2µF, C1, C2 = 1µF 16mV CIN = 0.47µF, COUT = 4.7µF, C1, C2 = 1µF 12mV CIN = 0.47µF, COUT = 3.3µF, C1, C2 = 1µF 12mV CIN = 0.47µF, COUT = 3.3µF, C1, C2 = 0.47µF 13mV (1) (1) Refer to the text in the Recommended Capacitor Configurations section for detailed information on the data in this table Layout Guidelines Proper board layout will help to ensure optimal performance of the LM2773 circuit. The following guidelines are recommended: • Place capacitors as close to the LM2773 as possible, and preferably on the same side of the board as the IC. • Use short, wide traces to connect the external capacitors to the LM2773 to minimize trace resistance and inductance. • Use a low resistance connection between ground and the GND pin of the LM2773. Using wide traces and/or multiple vias to connect GND to a ground plane on the board is most advantageous. 12 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 LM2773 www.ti.com SNVS554A – JANUARY 2008 – REVISED MAY 2013 REVISION HISTORY Changes from Original (May 2013) to Revision A • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 12 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM2773 13 PACKAGE OPTION ADDENDUM www.ti.com 3-May-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LM2773TL/NOPB ACTIVE DSBGA YZR 9 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM DJ LM2773TLX/NOPB ACTIVE DSBGA YZR 9 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM DJ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LM2773TL/NOPB DSBGA YZR 9 250 178.0 8.4 LM2773TLX/NOPB DSBGA YZR 9 3000 178.0 8.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1.57 1.57 0.76 4.0 8.0 Q1 1.57 1.57 0.76 4.0 8.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2773TL/NOPB DSBGA YZR LM2773TLX/NOPB DSBGA YZR 9 250 210.0 185.0 35.0 9 3000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA YZR0009xxx D 0.600±0.075 E TLA09XXX (Rev C) D: Max = 1.502 mm, Min =1.441 mm E: Max = 1.502 mm, Min =1.441 mm 4215046/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. 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