ON NTMFS5C410NLT Power mosfet Datasheet

NTMFS5C410NLT
Power MOSFET
40 V, 0.82 mW, 330 A, Single N−Channel
Features
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NTMFS5C410NLTWF − Wettable Flank Option for Enhanced
Optical Inspection
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
0.82 mW @ 10 V
40 V
330 A
1.2 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
40
V
Gate−to−Source Voltage
VGS
±20
V
ID
330
A
Parameter
Continuous Drain
Current RqJC
(Notes 1, 3)
TC = 25°C
Power Dissipation
RqJC (Note 1)
Continuous Drain
Current RqJA
(Notes 1, 2, 3)
Steady
State
TC = 100°C
TC = 25°C
TA = 25°C
Power Dissipation
RqJA (Notes 1 & 2)
Steady
State
G (4)
230
PD
TC = 100°C
W
167
83
ID
TA = 100°C
A
50
3.8
IDM
900
A
TJ, Tstg
−55 to
+175
°C
IS
169
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 29 A)
EAS
706
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Pulsed Drain Current
TA = 100°C
TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
D
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
0.9
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
39
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
May, 2016 − Rev. 2
MARKING
DIAGRAM
1.9
THERMAL RESISTANCE MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2016
N−CHANNEL MOSFET
W
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
Parameter
S (1,2,3)
35
PD
TA = 25°C
D (5,6)
1
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
S
S
S
G
D
XXXXXX
AYWZZ
D
D
XXXXXX = 5C410L
XXXXXX = (NTMFS5C410NLT) or
XXXXXX = 410LWF
XXXXXX = (NTMFS5C410NLTWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
Publication Order Number:
NVMFS5C410NL/D
NTMFS5C410NLT
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
40
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
21.2
VGS = 0 V,
VDS = 40 V
mV/°C
TJ = 25 °C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 250 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
1.2
2.0
−5.75
VGS = 10 V
ID = 50 A
0.65
0.82
VGS = 4.5 V
ID = 50 A
0.95
1.2
gFS
VDS = 15 V, ID = 50 A
V
mV/°C
190
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
8862
VGS = 0 V, f = 1 MHz, VDS = 25 V
4156
pF
116
Total Gate Charge
QG(TOT)
VGS = 4.5 V, VDS = 20 V; ID = 50 A
66
Total Gate Charge
QG(TOT)
VGS = 10 V, VDS = 20 V; ID = 50 A
143
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
6.75
nC
21.4
VGS = 4.5 V, VDS = 20 V; ID = 50 A
Gate−to−Drain Charge
QGD
Plateau Voltage
VGP
2.7
22
td(ON)
20
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 20 V,
ID = 50 A, RG = 1.0 W
tf
130
ns
66
177
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 50 A
TJ = 25°C
0.73
TJ = 125°C
0.6
tRR
ta
tb
1.2
V
79.5
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 50 A
QRR
39
ns
40.5
126
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NTMFS5C410NLT
TYPICAL CHARACTERISTICS
200
180
10 V to 3.2 V
180
160
3.0 V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
160
140
120
2.8 V
100
80
60
40
100
80
TJ = 25°C
60
40
TJ = 125°C
TJ = −55°C
0
0.5
1.0
1.5
2.0
0
3.0
2.5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.0013
0.0012
TJ = 25°C
ID = 50 A
0.0011
0.0010
0.0009
0.0008
0.0007
0.0006
3
4
5
6
7
8
9
10
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
120
20
20
0
4.0
0.0012
0.0011
TJ = 25°C
VGS = 4.5 V
0.0010
0.0009
0.0008
0.0007
VGS = 10 V
0.0006
0.0005
0.0004
10
20
30
40
50
60
VGS, GATE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.9
1M
1.7
VGS = 10 V
ID = 40 A
TJ = 150°C
100k
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
140
1.5
1.3
1.1
TJ = 125°C
10k
TJ = 85°C
1k
100
0.9
0.7
−50 −25
10
0
25
50
75
100
125
150
175
5
10
15
20
25
30
35
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
40
NTMFS5C410NLT
11k
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
10
10k
CISS
9k
8k
COSS
7k
VGS = 0 V
TJ = 25°C
f = 1 MHz
6k
5k
4k
3k
2k
CRSS
1k
0
5
0
15
10
25
20
30
20
6
15
4
QGD
QGS
10
VDS = 20 V
TJ = 25°C
ID = 50 A
2
5
0
40
0
0
20
60
40
80
120
100
140
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
td(off)
tf
tr
IS, SOURCE CURRENT (A)
46
td(on)
100
10
VGS = 4.5 V
VDD = 20 V
ID = 50 A
41
36
31
26
TJ = 125°C
21
16
11
TJ = 150°C
TJ = 25°C
6
1
TJ = −55°C
1
1
1000
25
8
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
10,00
t, TIME (ns)
35
30
QT
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
TC = 25°C
VGS ≤ 10 V
0.01 ms
0.1 ms
100
IPEAK (A)
100
IDS (A)
1 ms
dc
10 ms
TJ(initial) = 25°C
TJ(initial) = 100°C
10
10
RDS(on) Limit
Thermal Limit
Package Limit
1
1
0.1
1
10
1E−04
100
1E−03
VDS (V)
TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
1E−02
NTMFS5C410NLT
100
RqJA(t) (°C/W)
50% Duty Cycle
10
20%
10%
5%
1
2%
1%
NTMFS5C410NLT 650 mm2, 2 oz., Cu Single Layer Pad
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Marking
Package
Shipping†
NTMFS5C410NLTT1G
5C410L
DFN5
(Pb−Free)
1500 / Tape & Reel
NTMFS5C410NLTWFT1G
410LWF
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
NTMFS5C410NLTT3G
5C410L
DFN5
(Pb−Free)
5000 / Tape & Reel
NTMFS5C410NLTWFT3G
410LWF
DFN5
(Pb−Free, Wettable Flanks)
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTMFS5C410NLT
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
2X
0.20 C
D
A
2
B
D1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
2X
0.20 C
4X
E1
2
q
E
c
1
2
3
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
A1
4
TOP VIEW
C
SEATING
PLANE
DETAIL A
0.10 C
A
0.10 C
SIDE VIEW
0.10
8X b
C A B
0.05
c
DETAIL A
RECOMMENDED
SOLDERING FOOTPRINT*
e/2
1
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
2X
0.495
e
L
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15
5.00
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.15
6.30
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
4.560
2X
1.530
4
K
3.200
E2
PIN 5
(EXPOSED PAD)
G
L1
4.530
M
D2
1.330
2X
0.905
1
BOTTOM VIEW
0.965
4X
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
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For additional information, please contact your local
Sales Representative
NTMFS5C410NLT/D
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