EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown PRODUCT FEATURES Datasheet General Description Applications The EMC1423 and EMC1424 are high accuracy, low cost, System Management Bus (SMBus) temperature sensors. Advanced features such as Resistance Error Correction (REC), Beta Compensation (to support CPU diodes requiring the BJT/transistor model including 45nm, 65nm and 90nm processors) and automatic diode type detection combine to provide a robust solution for complex environmental monitoring applications. Additionally, the EMC1423 and EMC1424 provide a hardware programmable system shutdown feature that is programmed at part power-up via two pull-up resistor values and that cannot be masked or corrupted through the SMBus. Each device provides ±1° accuracy for external diode temperatures and ±2°C accuracy for the internal diode temperature. The EMC1423 monitors three temperature channels (two external and one internal). The EMC1424 monitors four temperature channels (three external and one internal). Resistance Error Correction automatically eliminates the temperature error caused by series resistance allowing greater flexibility in routing thermal diodes. Beta Compensation eliminates temperature errors caused by low, variable beta transistors common in today's fine geometry processors. The automatic beta detection feature monitors each external diode/transistor and determines the optimum sensor settings for accurate temperature measurements regardless of processor technology. This frees the user from providing unique sensor configurations for each temperature monitoring application. These advanced features plus ±1°C measurement accuracy provide a low-cost, highly flexible and accurate solution for critical temperature monitoring applications. SMSC EMC1423/EMC1424 Notebook Computers Desktop Computers Industrial Embedded applications Features Hardware Thermal Shutdown — triggers dedicated SYS_SHDN pin — hardware configured range 77°C to 112°C in 1°C steps — cannot be disabled or modified by software Support for diodes requiring the BJT/transistor model Automatically determines external diode type and optimal settings Resistance Error Correction External Temperature Monitors — supports 45nm, 65nm, and 90nm CPU thermal diodes. — — — — ±1°C Accuracy (60°C < TDIODE < 100°C) 0.125°C Resolution Supports up to 2.2nF diode filter capacitor Anti-parallel diodes for extra diode support Internal Temperature Monitor 3.3V Supply Voltage Programmable temperature limits for ALERT Available in Small 10-pin MSOP Lead-free RoHS Compliant Package — ±2°C accuracy DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Ordering Information: EMC1423-1-AIZL-TR FOR 10-PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE EMC1424-1-AIZL-TR FOR 10-PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE Note: See Table 1.1, "Part Selection" for SMBus addressing options. REEL SIZE IS 4,000 PIECES. This product meets the halogen maximum concentration values per IEC61249-2-21 For RoHS compliance and environmental information, please visit www.smsc.com/rohs Please contact your SMSC sales representative for additional documentation related to this product such as application notes, anomaly sheets, and design guidelines. Copyright © 2012 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Revision 2.0 (08-10-12) 2 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table of Contents Chapter 1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 Part Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 2 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chapter 3 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 3.2 3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SMBus Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Chapter 4 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Send Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receive Byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Alert Response Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 15 15 15 15 16 16 16 Chapter 5 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11 5.12 5.13 5.14 5.0.1 Conversion Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0.2 Dynamic Averaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SYS_SHDN Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hardware Thermal Shutdown Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ALERT Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.1 ALERT Pin Interrupt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.2 ALERT Pin Comparator Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ALERT and SYS_SHDN Pin Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Beta Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Resistance Error Correction (REC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programmable External Diode Ideality Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diode Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Consecutive Alerts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Monitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Measurement Results and Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Anti-parallel Diode Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Diode Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18 19 20 21 21 21 21 22 22 22 23 23 23 25 25 26 26 Chapter 6 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 Data Read Interlock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conversion Rate Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scratchpad Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Therm Limit Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Diode Fault Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMSC EMC1423/EMC1424 3 DATASHEET 31 31 32 32 33 34 35 36 36 Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 6.10 6.11 6.12 6.13 6.14 6.15 6.16 6.17 6.18 6.19 6.20 6.21 6.22 Software Thermal Shutdown Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hardware Thermal Shutdown Limit Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Channel Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Consecutive ALERT Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Beta Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Diode Ideality Factor Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . High Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THERM Limit Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Filter Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMSC ID Register (FEh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision Register (FFh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 38 38 39 40 41 43 43 44 44 45 45 46 Chapter 7 Typical Operating Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Chapter 8 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 8.1 Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Chapter 9 Datasheet Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Revision 2.0 (08-10-12) 4 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet List of Figures Figure 1.1 Figure 2.1 Figure 4.1 Figure 5.1 Figure 5.2 Figure 5.3 Figure 5.4 Figure 5.5 Figure 5.6 Figure 5.7 Figure 5.8 Figure 8.1 EMC1423/EMC1424 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 EMC1423/EMC1424 Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 SMBus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 System Diagram for EMC1423 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 System Diagram for EMC1424 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Block Diagram of Hardware Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Isolating ALERT and SYS_SHDN Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Temperature Filter Step Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Temperature Filter Impulse Response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Block Diagram of Temperature Monitoring Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Diode Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10-Pin MSOP / TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 SMSC EMC1423/EMC1424 5 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet List of Tables Table 1.1 Part Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2.1 EMC1423 and EMC1424 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 3.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 3.3 SMBus Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 4.1 Protocol Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 4.2 Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.3 Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.4 Send Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.5 Receive Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.6 Alert Response Address Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 5.1 Supply Current vs. Conversion Rate for EMC1423 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 5.2 Supply Current vs. Conversion Rate for EMC1424 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 5.3 SYS_SHDN Threshold Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 5.4 Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 6.1 Register Set in Hexadecimal Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 6.2 Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 6.3 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 6.4 Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 6.5 Conversion Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.6 Conversion Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.7 Temperature Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6.8 Scratchpad Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 6.9 Therm Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 6.10 External Diode Fault Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 6.11 Software Thermal Shutdown Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 6.12 Hardware Thermal Shutdown Limit Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6.13 Channel Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6.14 Consecutive ALERT Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 6.15 Consecutive Alert / THERM Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 6.16 Beta Configuration Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 6.17 CPU Beta Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 6.18 Ideality Configuration Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 6.19 Ideality Factor Look-Up Table (Diode Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 6.20 Substrate Diode Ideality Factor Look-Up Table (BJT Model) . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 6.21 High Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 6.22 Low Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 6.23 THERM Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 6.24 Filter Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 6.25 Filter Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 6.26 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 6.27 Manufacturer ID Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 6.28 Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 9.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Revision 2.0 (08-10-12) 6 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 1 Block Diagram VDD Switching Current SYS_SHDN Limit EMC1423 / EMC1424 Conversion Rate Register DN2 External Temperature Register(s) Internal Temperature Register Low Limit Registers SMBus Interface Anti-parallel diodes ΔΣ ADC Digital Mux Analog Mux DP2 Digital Mux DN1 Limit Comparator DP1 High Limit Registers Internal Temp Diode SMCLK Configuration Register Status Registers SMDATA Interupt Masking ALERT SYS_SHDN GND Figure 1.1 EMC1423/EMC1424 Block Diagram 1.1 Part Selection The EMC1423 and EMC1424 device configuration is highlighted below. Table 1.1 Part Selection FUNCTIONALITY PART NUMBER SMBUS ADDRESS EXTERNAL DIODES DIODE 1 DEFAULT CONFIGURATION DIODE 2 DEFAULT CONFIGURATION OTHER PRODUCT ID Software programmable and maskable High Limits EMC1423 - 1 100_1100b 2 Detect Diode w/ REC enabled Detect Diode w/ REC enabled Software programmable and maskable SYS_SHDN Limits 23h Hardware set SYS_SHDN Limit on External Diode 1 SMSC EMC1423/EMC1424 7 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 1.1 Part Selection (continued) FUNCTIONALITY PART NUMBER SMBUS ADDRESS EXTERNAL DIODES DIODE 1 DEFAULT CONFIGURATION DIODE 2 DEFAULT CONFIGURATION OTHER PRODUCT ID Software programmable and maskable High Limits EMC1424 - 1 100_1100b 3 Detect Diode w/ REC enabled Fixed 2N3904 in antiparallel diode configuration Note 1.1 Software programmable and maskable SYS_SHDN Limits 27h Hardware set SYS_SHDN Limit on External Diode 1 Note 1.1 Revision 2.0 (08-10-12) External 2 and external 3 channels have beta configuration hard wired to ‘0111b’ and REC enabled. 8 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 2 Pin Description VDD 1 10 SMCLK DP1 2 9 SMDATA DN1 3 8 ALERT DP2 / DN3 4 7 SYS_SHDN DN2 / DP3 5 6 GND Figure 2.1 EMC1423/EMC1424 Pin Diagram Table 2.1 EMC1423 and EMC1424 Pin Description PIN NUMBER NAME FUNCTION TYPE 1 VDD Power supply Power 2 DP1 External diode 1 positive (anode) connection AIO 3 DN1 External diode 1 negative (cathode) connection AIO DP2 / DN3 External diode 2 positive (anode) connection / External Diode 3 negative (cathode) connection for anti-parallel diodes AIO DN2/ DP3 External diode 2 negative (cathode) connection / External Diode 3 positive (anode) connection for antiparallel diodes AIO GND Ground Power SYS_SHDN System Shutdown output signal requires pull-up resistor which selects the Hardware Thermal Shutdown Limit OD (5V) 8 ALERT Active low digital ALERT output signal - requires pull-up resistor OD (5V) 9 SMDATA SMBus Data input/output - requires pull-up resistor DIOD (5V) 10 SMCLK SMBus Clock input - requires pull-up resistor DI (5V) 4 5 6 7 SMSC EMC1423/EMC1424 9 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet APPLICATION NOTE: For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA, SYS_SHDN, and ALERT), the voltage difference between VDD and the pull-up voltage must never exceed 3.6V. The pin types are described below: Power - these pins are used to supply either VDD or GND to the device. AIO - Analog Input / Output. DI - Digital Input. OD - Open Drain Digital Output. DIOD - Digital Input / Open Drain Output. Revision 2.0 (08-10-12) 10 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 3 Electrical Specifications 3.1 Absolute Maximum Ratings Table 3.1 Absolute Maximum Ratings DESCRIPTION RATING UNIT Supply Voltage (VDD) -0.3 to 4.0 V Voltage on 5V tolerant pins (V5VT_pin) -0.3 to 5.5 V Voltage on 5V tolerant pins (|V5VT_pin - VDD|) (see Note 3.1) -0.3 to 3.6 V -0.3 to VDD +0.3 V Operating Temperature Range -40 to +125 °C Storage Temperature Range -55 to +150 °C Voltage on any other pin to Ground Lead Temperature Range Refer to JEDEC Spec. J-STD-020 Package Thermal Characteristics for MSOP-10 Thermal Resistance (θj-a) ESD Rating, All pins HBM 132.2 °C/W 2000 V Note: Stresses at or above those listed could cause permanent damage to the device. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. When powering this device from laboratory or system power supplies, it is important that the Absolute Maximum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on the DC output. If this possibility exists, it is suggested that a clamp circuit be used. Note 3.1 SMSC EMC1423/EMC1424 For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA, SYS_SHDN, and ALERT), the pull-up voltage must not exceed 3.6V when the device is unpowered. 11 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 3.2 Electrical Specifications Table 3.2 Electrical Specifications VDD = 3.0V to 3.6V, TA = -40°C to 125°C, all typical values at TA = 27°C unless otherwise noted. CHARACTERISTIC SYMBOL MIN TYP MAX UNITS CONDITIONS DC Power Supply Voltage VDD Supply Current IDD 3.0 3.3 3.6 V 430 850 uA 1 conversion / sec, dynamic averaging disabled 930 1200 uA 4 conversions / sec, dynamic averaging enabled uA > 16 conversions / sec, dynamic averaging enabled 1120 Internal Temperature Monitor Temperature Accuracy ±0.25 Temperature Resolution ±1 °C -5°C < TA < 100°C ±2 °C -40°C < TA < 125°C 0.125 °C External Temperature Monitor Temperature Accuracy Temperature Resolution Capacitive Filter ±0.25 ±1 °C +20°C < TDIODE < +110°C 0°C < TA < 100°C ±0.5 ±2 °C -40°C < TDIODE < 127°C 0.125 °C tCONV 190 ms EMC1423, default settings tCONV 150 ms EMC1424, default settings CFILTER 2.2 nF Connected across external diode 2.5 ALERT and SYS_SHDN pins Output Low Voltage VOL Leakage Current ILEAK Power up time Note 3.2 Revision 2.0 (08-10-12) 0.4 V ISINK = 8mA ±5 uA ALERT and SYS_SHDN pins Device powered or unpowered TA < 85°C pull-up voltage < 3.6V 15 ms Temp selection read Note 3.2 During the power up time, SMBus communication is permitted, however the SYS_SHDN and ALERT pins must not be pulled low. 12 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 3.3 SMBus Electrical Characteristics Table 3.3 SMBus Electrical Specifications VDD = 3.0V to 3.6V, TA = -40°C to 125°C, all typical values are at TA = 27°C unless otherwise noted. CHARACTERISTIC SYMBOL MIN TYP MAX UNITS CONDITIONS SMBus Interface Input High Voltage VIH 2.0 VDD V 5V Tolerant Input Low Voltage VIL -0.3 0.8 V 5V Tolerant Input High/Low Current IIH / IIL ±5 uA Powered or unpowered TA < 85°C Hysteresis Input Capacitance CIN Output Low Sink Current IOL 420 mV 5 pF 8.2 15 mA SMDATA = 0.4V SMBus Timing Clock Frequency fSMB Spike Suppression tSP Bus free time Start to Stop tBUF 1.3 us Hold Time: Start tHD:STA 0.6 us Setup Time: Start tSU:STA 0.6 us Setup Time: Stop tSU:STP 0.6 us Data Hold Time tHD:DAT 0 us When transmitting to the master Data Hold Time tHD:DAT 0.3 us When receiving from the master Data Setup Time tSU:DAT 100 ns Clock Low Period tLOW 1.3 us Clock High Period tHIGH 0.6 us Clock/Data Fall time tFALL 300 ns Min = 20+0.1CLOAD ns Clock/Data Rise time tRISE 300 ns Min = 20+0.1CLOAD ns Capacitive Load CLOAD 400 pF per bus line SMSC EMC1423/EMC1424 10 400 kHz 50 ns 13 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 4 System Management Bus Interface Protocol 4.1 System Management Bus Interface Protocol The EMC1423 and EMC1424 communicate with a host controller, such as an SMSC SIO, through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 4.1. For the first 15ms after power-up the device may not respond to SMBus communications. . TLOW THIGH THD:STA TSU:STO TRISE SMCLK THD:STA TFALL THD:DAT TSU:STA TSU:DAT SMDTA TBUF P S S S - Start Condition P - Stop Condition P Figure 4.1 SMBus Timing Diagram The EMC1423 and EMC1424 are SMBus 2.0 compatible and support Send Byte, Read Byte, Write Byte, Receive Byte, and the Alert Response Address as valid protocols as shown below. All of the below protocols use the convention in Table 4.1. Table 4.1 Protocol Format DATA SENT TO DEVICE # of bits sent DATA SENT TO THE HOST # of bits sent Attempting to communicate with the EMC1423 and EMC1424 SMBus interface with an invalid slave address or invalid protocol will result in no response from the device and will not affect its register contents. Stretching of the SMCLK signal is supported, provided other devices on the SMBus control the timing. Revision 2.0 (08-10-12) 14 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 4.2 Write Byte The Write Byte is used to write one byte of data to the registers as shown below Table 4.2: Table 4.2 Write Byte Protocol START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK REGISTER DATA ACK STOP 1 -> 0 1001_100 0 0 XXh 0 XXh 0 0 -> 1 4.3 Read Byte The Read Byte protocol is used to read one byte of data from the registers as shown in Table 4.3. Table 4.3 Read Byte Protocol START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK START SLAVE ADDRESS RD ACK REGISTER DATA NACK STOP 1 -> 0 1001_100 0 1 XXh 0 1 -> 0 1001_100 1 1 XX 1 0 -> 1 4.4 Send Byte The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is transferred during the Send Byte protocol as shown in Table 4.4. Table 4.4 Send Byte Protocol START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK STOP 1 -> 0 1001_100 0 0 XXh 0 0 -> 1 4.5 Receive Byte The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in Table 4.5. Table 4.5 Receive Byte Protocol START SLAVE ADDRESS RD ACK REGISTER DATA NACK STOP 1 -> 0 1001_100 1 0 XXh 1 0 -> 1 SMSC EMC1423/EMC1424 15 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 4.6 Alert Response Address The ALERT output can be used as a processor interrupt or as an SMBus Alert. When it detects that the ALERT pin is asserted, the host will send the Alert Response Address (ARA) to the general address of 0001_100xb. All devices with active interrupts will respond with their client address as shown in Table 4.6. Table 4.6 Alert Response Address Protocol START ALERT RESPONSE ADDRESS RD ACK DEVICE ADDRESS NACK STOP 1 -> 0 0001_100 1 0 1001_1000 1 0 -> 1 The EMC1423 and EMC1424 will respond to the ARA in the following way: 1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication from the device was not prematurely stopped due to a bus contention event). 2. Set the MASK bit to clear the ALERT pin. APPLICATION NOTE: The ARA does not clear the Status Register and if the MASK bit is cleared prior to the Status Register being cleared, the ALERT pin will be reasserted. 4.7 SMBus Address The EMC1423 and EMC1424 respond to hard-wired SMBus slave address as shown in Table 1.1. Note: Other addresses are available. Contact SMSC for more information. 4.8 SMBus Timeout The EMC1423 and EMC1424 support SMBus Timeout. If the clock line is held low for longer than 30ms, the device will reset its SMBus protocol. This function can be enabled by setting the TIMEOUT bit in the Consecutive Alert Register (see Section 6.13). Revision 2.0 (08-10-12) 16 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 5 Product Description The EMC1423 and EMC1424 are SMBus temperature sensors with Hardware Thermal Shutdown. The EMC1423 monitors one internal diode and two externally connected temperature diodes. The EMC1424 monitors one internal diode and three externally connected temperature diodes. Thermal management is performed in cooperation with a host device. This consists of the host reading the temperature data of both the external and internal temperature diodes of the EMC1423 and EMC1424 and using that data to control the speed of one or more fans. The EMC1423 and EMC1424 have two levels of monitoring. The first provides a maskable ALERT signal to the host when measured temperatures meet or exceed user programmable limits. This allows the EMC1423 or EMC1424 to be used as an independent thermal watchdog to warn the host of temperature hot spots without direct control by the host. The second level of monitoring asserts the SYS_SHDN pin when the External Diode 1 temperature exceeds a hardware specified threshold temperature. Additionally, the internal diode and External Diode 2, and External Diode 3 (EMC1424 only) can be configured to assert the SYS_SHDN pin when the measured temperature exceeds user programmable limits. Since the EMC1423 and EMC1424 automatically correct for temperature errors due to series resistance in temperature diode lines, there is greater flexibility in where external diodes are positioned and better measurement accuracy than previously available with non-resistance error correcting devices. The automatic beta detection feature means that there is no need to program the device according to which type of diode is present on the External Diode 1 channel. This also includes CPU diodes that require the transistor or BJT model for monitoring their temperature. Therefore, the EMC1423/EMC1424 can power up ready to operate for any system configuration. For the EMC1424, External Diode channels 2 and 3 are only compatible with general purpose diodes (such as a 2N3904). Figure 5.1 shows a system level block diagram of the EMC1423. Figure 5.2 shows a system level block diagram of the EMC1424. CPU Thermal diode EMC1423 Host DP1 DN1 Internal Diode SMCLK SMDATA ALERT SMBus Interface DP2 DN2 SYS_SHDN Power Control Figure 5.1 System Diagram for EMC1423 SMSC EMC1423/EMC1424 17 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet CPU Thermal diode EMC1424 Host DP1 DN1 Internal Diode SMCLK SMDATA ALERT SMBus Interface DP2 Anti-parallel diodes DN2 SYS_SHDN Power Control Figure 5.2 System Diagram for EMC1424 5.0.1 Conversion Rates The EMC1423 and EMC1424 may be configured for different conversion rates based on the system requirements. The conversion rate is configured as described in Section 6.5. The default conversion rate is 4 conversions per second. Other available conversion rates are shown in Table 6.6. 5.0.2 Dynamic Averaging Dynamic averaging causes the EMC1423 and EMC1424 to measure the external diode channels for an extended time based on the selected conversion rate. This functionality can be disabled for increased power savings at the lower conversion rates (see Section 6.4). When dynamic averaging is enabled, the device will automatically adjust the sampling and measurement time for the external diode channels. This allows the device to average 2x or 16x longer than the normal 11 bit operation (nominally 21ms per channel) while still maintaining the selected conversion rate. The benefits of dynamic averaging are improved noise rejection due to the longer integration time as well as less random variation of the temperature measurement. When enabled, the dynamic averaging will affect the average supply current based on the chosen conversion rate as shown in Table 5.1 for EMC1423. Table 5.1 Supply Current vs. Conversion Rate for EMC1423 AVERAGE SUPPLY CURRENT AVERAGING FACTOR (BASED ON 11-BIT OPERATION) CONVERSION RATE ENABLED (DEFAULT) DISABLED ENABLED (DEFAULT) DISABLED 1 / sec 660uA 430uA 16x 1x 2 / sec 930uA 475uA 8x 1x 4 / sec (default) 950uA 510uA 4x 1x 8 / sec 1010uA 630uA 2x 1x 16 / sec 1020uA 775uA 1x 1x Revision 2.0 (08-10-12) 18 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 5.1 Supply Current vs. Conversion Rate for EMC1423 (continued) AVERAGE SUPPLY CURRENT AVERAGING FACTOR (BASED ON 11-BIT OPERATION) CONVERSION RATE ENABLED (DEFAULT) DISABLED ENABLED (DEFAULT) DISABLED 32 / sec 1050uA 1050uA 0.5x 0.5x 64 / sec 1100uA 1100uA 0.25x 0.25x When enabled, the dynamic averaging will affect the average supply current based on the chosen conversion rate as shown in Table 5.2 for EMC1424. Table 5.2 Supply Current vs. Conversion Rate for EMC1424 AVERAGE SUPPLY CURRENT AVERAGING FACTOR (BASED ON 11-BIT OPERATION) CONVERSION RATE ENABLED (DEFAULT) DISABLED ENABLED (DEFAULT) DISABLED 1 / sec 660uA 430uA 8x 1x 2 / sec 930uA 475uA 4x 1x 4 / sec (default) 950uA 510uA 2x 1x 8 / sec 1010uA 630uA 1x 1x 16 / sec 1020uA 775uA 0.5x 0.5x 32 / sec 1050uA 1050uA 0.25x 0.25x 64 / sec 1100uA 1100uA 0.125x 0.125x 5.1 SYS_SHDN Output The SYS_SHDN output is asserted independently of the ALERT output and cannot be masked. If the External Diode 1 temperature exceeds the Hardware Thermal Shutdown Limit for the programmed number of consecutive measurements, then the SYS_SHDN pin is asserted. The Hardware Thermal Shutdown Limit is defined at power-up via the pull-up resistors on the SYS_SHDN and ALERT pins as shown in Table 5.3. This limit cannot be modified or masked via software. In addition to External Diode 1 channel triggering the SYS_SHDN pin when the measured temperature exceeds to the Hardware Thermal Shutdown Limit, each of the measurement channels can be configured to assert the SYS_SHDN pin when they exceed the corresponding THERM Limit. When the SYS_SHDN pin is asserted, it will not release until the External Diode 1 temperature drops below the Hardware Thermal Shutdown Limit minus 10°C and all other measured temperatures drop below the THERM Limit minus the THERM Hysteresis value (when linked to SYS_SHDN). Figure 5.3 shows a block diagram of the interaction between the input channels and the SYS_SHDN pin. SMSC EMC1423/EMC1424 19 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Internal Diode S/W Set Sensor (EMC1424 only) S/W Set Sensor Temperature Conversion and up to 4 THERM Limit Registers S/W Set Sensor Hardware Thermal Shutdown SMBus Traffic Software Shutdown Enable H/W Thermal Shutdown Sensor 3.3V SW_SHDN Temperature Conversion 3.3V SYS_SHDN HW_SHDN ALERT Function Select Figure 5.3 Block Diagram of Hardware Thermal Shutdown 5.2 Hardware Thermal Shutdown Limit The Hardware Thermal Shutdown Limit temperature is determined by pull-up resistors on the SYS_SHDN and ALERT pins shown in Table 5.3. Table 5.3 SYS_SHDN Threshold Temperature SYS_SHD PULL-UP ALERT PULL-UP 4.7K OHM ±10% 6.8K OHM ±10% 10K OHM ±10% 15K OHM ±10% 22K OHM ±10% 33K OHM ±10% 4.7K OHM ±10% 77°C 83°C 89°C 95°C 101°C 107°C 6.8K OHM ±10% 78°C 84°C 90°C 96°C 102°C 108°C 10K OHM ±10% 79°C 85°C 91°C 97°C 103°C 109°C 15K OHM ±10% 80°C 86°C 92°C 98°C 104°C 110°C 22K OHM ±10% 81°C 87°C 93°C 99°C 105°C 111°C 33K OHM ±10% 82°C 88°C 94°C 100°C 106°C 112°C Revision 2.0 (08-10-12) 20 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 5.3 ALERT Output The ALERT pin is an open drain output and requires a pull-up resistor to VDD and has two modes of operation: interrupt mode and comparator Mode. The mode of the ALERT output is selected via the ALERT / COMP bit in the Configuration Register (see Section 6.4). 5.3.1 ALERT Pin Interrupt Mode When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected. The ALERT pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit condition has been removed, the ALERT pin will remain asserted until the appropriate status bits are cleared. The ALERT pin can be masked by setting the MASK bit. Once the ALERT pin has been masked, it will be de-asserted and remain de-asserted until the MASK bit is cleared by the user. Any interrupt conditions that occur while the ALERT pin is masked will update the Status Register normally. The ALERT pin is used as an interrupt signal or as an Smbus Alert signal that allows an SMBus slave to communicate an error condition to the master. One or more ALERT outputs can be hard-wired together. 5.3.2 ALERT Pin Comparator Mode When the ALERT pin is configured to operate in comparator mode it will be asserted if any of the measured temperatures exceeds the respective high limit. The ALERT pin will remain asserted until all temperatures drop below the corresponding high limit minus the THERM Hysteresis value. When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be set. Reading these bits will not clear them until the ALERT pin is deasserted. Once the ALERT pin is deasserted, the status bits will be automatically cleared. The MASK bit will not block the ALERT pin in this mode, however the individual channel masks (see Section 6.12) will prevent the respective channel from asserting the ALERT pin. 5.4 ALERT and SYS_SHDN Pin Considerations Because of the decode method used to determine the Hardware Thermal Shutdown Limit, it is important that the pull-up resistance on both the ALERT and SYS_SHDN pins be within the tolerances shown in Table 5.3. Additionally, the pull-up resistor on the ALERT and SYS_SHDN pins must be connected to the same 3.3V supply that drives the VDD pin. For 15ms after power up, the ALERT and SYS_SHDN pins must not be pulled low or the Hardware Thermal Shutdown Limit will not be decoded properly. If the system requirements do not permit these conditions, then the ALERT and SYS_SHDN pins must be isolated from their respective busses during this time. One method of isolating this pin is shown in Figure 5.4. SMSC EMC1423/EMC1424 21 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet +3.3V VDD 1 10 SMCLK DP1 2 9 SMDATA DN1 3 8 ALERT 7 GND SYS_SHDN 4 4.7K 33K +2.5 - 5V 22K Shared Alert/ Figure 5.4 Isolating ALERT and SYS_SHDN Pins 5.5 Beta Compensation The EMC1423 and EMC1424 are configured to monitor the temperature of basic diodes (e.g. 2N3904), or CPU thermal diodes. It automatically detects the type of external diode (CPU diode or diode connected transistor) and determines the optimal setting to reduce temperature errors introduced by beta variation for the External Diode 1 channel only. Compensating for this error is also known as implementing the transistor or BJT model for temperature measurement. For discrete transistors configured with the collector and base shorted together, the beta is generally sufficiently high such that the percent change in beta variation is very small. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 50 would contribute approximately 0.25°C error at 100°C. However for substrate transistors where the base-emitter junction is used for temperature measurement and the collector is tied to the substrate, the proportional beta variation will cause large error. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 0.5 would contribute approximately 8.25°C error at 100°C. The External Diode 2 and External Diode 3 channels do not support Beta Compensation. 5.6 Resistance Error Correction (REC) Parasitic resistance in series with the external diodes will limit the accuracy obtainable from temperature measurement devices. The voltage developed across this resistance by the switching diode currents cause the temperature measurement to read higher than the true temperature. Contributors to series resistance are PCB trace resistance, on die (i.e. on the processor) metal resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error caused by series resistance is +0.7°C per ohm. The EMC1423 and EMC1424 automatically correct up to 100 ohms of series resistance. 5.7 Programmable External Diode Ideality Factor The EMC1423 and EMC1424 do not support a programmable Ideality Factor for the External Diode 1 channel. It is hard-wired for an ideality factor of 1.008. The EMC1423 External Diode 2 channel defaults to measuring external diodes with an ideality factor of 1.008. Likewise, the EMC1424 External Diode 2 and 3 channels default to measuring external diodes with an ideality factor of 1.008. Not all external diodes, processor or discrete, will have this exact value. This variation of the ideality factor introduces error in the temperature measurement which must be corrected for. This correction is typically done using programmable offset registers. Since an ideality factor mismatch introduces an error that is a function of temperature, this correction is only accurate within a small range of temperatures. To provide maximum flexibility to the user, the EMC1423 and EMC1424 provides a 6- Revision 2.0 (08-10-12) 22 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet bit register for the External Diode 2 channel (and External Diode 3 channel for the EMC1424) where the ideality factor of the diode can be programmed to eliminate errors across all temperatures. APPLICATION NOTE: When monitoring a substrate transistor or CPU diode and beta compensation is enabled, the Ideality Factor should not be adjusted. Beta Compensation automatically corrects for most ideality errors. 5.8 Diode Faults The EMC1423 and EMC1424 detect an open on the DP and DN pins, and a short across the DP and DN pins. For each temperature measurement made, the device checks for a diode fault on the external diode channel(s). When a diode fault is detected, the ALERT pin asserts (unless masked, see Section 5.9) and the temperature data reads 00h in the MSB and LSB registers (note: the low limit will not be checked). A diode fault is defined as one of the following: an open between DP and DN, a short from VDD to DP, or a short from VDD to DN. If a short occurs across DP and DN or a short occurs from DP to GND, the low limit status bit is set and the ALERT pin asserts (unless masked). This condition is indistinguishable from a temperature measurement of 0.000degC (-64°C in extended range) resulting in temperature data of 00h in the MSB and LSB registers. If a short from DN to GND occurs (with a diode connected), temperature measurements will continue as normal with no alerts. 5.9 Consecutive Alerts The EMC1423 and EMC1424 contain multiple consecutive alert counters. One set of counters applies to the ALERT pin and the second set of counters applies to the SYS_SHDN pin. Each temperature measurement channel has a separate consecutive alert counter for each of the ALERT and SYS_SHDN pins. All counters are user programmable and determine the number of consecutive measurements that a temperature channel(s) must be out-of-limit or reporting a diode fault before the corresponding pin is asserted. See Section 6.13 for more details on the consecutive alert function. 5.10 Digital Filter To reduce the effect of noise and temperature spikes on the reported temperature, the External Diode 1 channel uses a programmable digital filter. This filter can be configured as Level 1, Level 2, or Disabled. The typical filter performance is shown in Figure 5.5 and Figure 5.6. SMSC EMC1423/EMC1424 23 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Filter Step Response Temperature (C) 90 Disabled 80 70 Level1 Level2 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 Samples Figure 5.5 Temperature Filter Step Response Filter Impulse Response 90 Temperature (C) 80 Disabled 70 60 50 Level1 40 Level2 30 20 10 0 0 2 4 6 8 10 12 14 Samples Figure 5.6 Temperature Filter Impulse Response Revision 2.0 (08-10-12) 24 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 5.11 Temperature Monitors In general, thermal diode temperature measurements are based on the change in forward bias voltage of a diode when operated at two different currents. This ΔVBE is proportional to absolute temperature as shown in the following equation: where: Δ V BE = η kT q ⎞ ⎟⎟ ⎠ ⎛ I ln ⎜⎜ HIGH ⎝ I LOW k = Boltzmann’s constant T = absolute temperature in Kelvin [1] q = electron charge η = diode ideality factor Figure 5.7 shows a block diagram of the temperature measurement circuit. The negative terminal for the remote temperature diode, DN, is internally biased with a forward diode voltage referenced to ground. IHIGH ILOW Substrate PNP DP AntiAliasing Filter Resistance Error Correction ΔΣ ADC DN Figure 5.7 Block Diagram of Temperature Monitoring Circuit 5.12 Temperature Measurement Results and Data The temperature measurement results are stored in the internal and external temperature registers. These are then compared with the values stored in the high and low limit registers. Both external and internal temperature measurements are stored in 11-bit format with the eight (8) most significant bits stored in a high byte register and the three (3) least significant bits stored in the three (3) MSB positions of the low byte register. All other bits of the low byte register are set to zero. The EMC1423 and EMC1424 have two selectable temperature ranges. The default range is from 0°C to +127°C and the temperature is represented as binary number able to report a temperature from 0°C to +127.875°C in 0.125°C steps. The extended range is an extended temperature range from -64°C to +191°C. The data format is a binary number offset by 64°C. The extended range is used to measure temperature diodes with a large known offset (such as AMD processor diodes) where the diode temperature plus the offset would be equivalent to a temperature higher than +127°C. Table 5.4 shows the default and extended range formats. SMSC EMC1423/EMC1424 25 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 5.4 Temperature Data Format TEMPERATURE (°C) DEFAULT RANGE 0°C TO 127°C EXTENDED RANGE -64°C TO 191°C Diode Fault 000 0000 0000 000 0000 0000 -64 000 0000 0000 000 0000 0000 Note 5.2 -1 000 0000 0000 001 1111 1000 0 000 0000 0000 Note 5.1 010 0000 0000 0.125 000 0000 0001 010 0000 0001 1 000 0000 1000 010 0000 1000 64 010 0000 0000 100 0000 0000 65 010 0000 1000 100 0000 1000 127 011 1111 1000 101 1111 1000 127.875 011 1111 1111 101 1111 1111 128 011 1111 1111 Note 5.3 110 0000 0000 190 011 1111 1111 111 1111 0000 191 011 1111 1111 111 1111 1000 >= 191.875 011 1111 1111 111 1111 1111 Note 5.4 5.13 Note 5.1 In default mode, all temperatures < 0°C will be reported as 0°C. Note 5.2 In the extended range, all temperatures < -64°C will be reported as -64°C. Note 5.3 For the default range, all temperatures > +127.875°C will be reported as +127.875°C. Note 5.4 For the extended range, all temperatures > +191.875°C will be reported as +191.875°C. Anti-parallel Diode Connections The EMC1424 supports reading two external diodes on the same set of pins (DP2, DN2). These diodes are connected as shown in Figure 5.2. Due to the anti-parallel connection of these diodes, both diodes will be reverse biased by a VBE voltage (approximately 0.7V). Because of this reverse bias, only discrete thermal diodes (such as a 2N3904) are recommended to be placed on these pins. 5.14 External Diode Connections The EMC1423 is hard-wired to measure a specific type of thermal diode on the External Diode 1 channel only (DP1 and DN1 pins). The External Diode 2 channel can be configured to measure a CPU substrate transistor, a discrete thermal diode such as a 2N3904, or an AMD processor diode. The supported configurations for the external diode channels are shown in Figure 5.8. The EMC1424 is hard-wired to measure a specific type of thermal diode on the External Diode 1 channel only (DP1 and DN1 pins). The External Diode 2 and External Diode 3 channel are configured to measure a pair of discrete anti-parallel diodes (shared on pins DP2 and DN2). The supported configurations for the external diode channels are shown in Figure 5.8. Revision 2.0 (08-10-12) 26 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet to DP to DP to DP to DN to DN to DN Local Ground Typical remote substrate transistor i.e. CPU substrate PNP Typical remote discrete PNP transistor i.e. 2N3906 Typical remote discrete NPN transistor i.e. 2N3904 Figure 5.8 Diode Configurations SMSC EMC1423/EMC1424 27 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 6 Register Description The registers shown in Table 6.1 are accessible through the SMBus. An entry of ‘-’ indicates that the bit is not used and will always read ‘0’. Table 6.1 Register Set in Hexadecimal Order REGISTER ADDRESS R/W REGISTER NAME FUNCTION DEFAULT VALUE 00h R Internal Diode Data High Byte Stores the integer data for the Internal Diode 00h 01h R External Diode 1 Data High Byte Stores the integer data for External Diode 1 00h 02h R Status Stores the status bits for the Internal Diode and External Diodes 00h Page 32 03h R/W Configuration Controls the general operation of the device (mirrored at address 09h) 00h Page 32 04h R/W Conversion Rate Controls the conversion rate for updating temperature data (mirrored at address 0Ah) 06h (4/sec) Page 33 05h R/W Internal Diode High Limit Stores the 8-bit high limit for the Internal Diode (mirrored at address 0Bh) 55h (85°C) 06h R/W Internal Diode Low Limit Stores the 8-bit low limit for the Internal Diode (mirrored at address 0Ch) 00h (0°C) 55h (85°C) PAGE Page 31 Page 34 07h R/W External Diode 1 High Limit High Byte Stores the integer portion of the high limit for External Diode 1 (mirrored at register 0Dh) 08h R/W External Diode 1 Low Limit High Byte Stores the integer portion of the low limit for External Diode 1 (mirrored at register 0Eh) 00h (0°C) 09h R/W Configuration Controls the general operation of the device (mirrored at address 03h) 00h Page 32 0Ah R/W Conversion Rate Controls the conversion rate for updating temperature data (mirrored at address 04h) 06h (4/sec) Page 33 Revision 2.0 (08-10-12) 28 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS R/W REGISTER NAME FUNCTION DEFAULT VALUE 0Bh R/W Internal Diode High Limit Stores the 8-bit high limit for the Internal Diode (mirrored at address 05h) 55h (85°C) 0Ch R/W Internal Diode Low Limit Stores the 8-bit low limit for the Internal Diode (mirrored at address 06h) 00h (0°C) 55h (85°C) PAGE Page 34 0Dh R/W External Diode 1 High Limit High Byte Stores the integer portion of the high limit for External Diode 1 (mirrored at register 07h) 0Eh R/W External Diode 1 Low Limit High Byte Stores the integer portion of the low limit for External Diode 1 (mirrored at register 08h) 00h (0°C) 10h R External Diode 1 Data Low Byte Stores the fractional data for External Diode 1 00h Page 31 11h R/W Scratchpad Scratchpad register for software compatibility 00h Page 35 12h R/W Scratchpad Scratchpad register for software compatibility 00h Page 35 13h R/W External Diode 1 High Limit Low Byte Stores the fractional portion of the high limit for External Diode 1 00h 14h R/W External Diode 1 Low Limit Low Byte Stores the fractional portion of the low limit for External Diode 1 00h 15h R/W External Diode 2 High Limit High Byte Stores the integer portion of the high limit for External Diode 2 55h (85°C) 16h R/W External DIode 2 Low Limit High Byte Stores the integer portion of the low limit for External Diode 2 00h (0°C) 17h R/W External Diode 2 High Limit Low Byte Stores the fractional portion of the high limit External Diode 2 00h 18h R/W External Diode 2 Low Limit Low Byte Stores the fractional portion of the low limit for External Diode 2 00h 19h R/W External Diode 1 THERM Limit Stores the 8-bit critical temperature limit for External Diode 1 55h (85°C) Page 36 1Ah R/W External Diode 2 THERM Limit Stores the 8-bit critical temperature limit for External Diode 2 55h (85°C) Page 36 1Bh R-C External Diode Fault Stores status bits indicating which external diode detected a diode fault 00h Page 36 1Dh R/W SYS_SHDN Configuration Controls which software channels, if any, are linked to the SYS_SHDN pin 00h Page 37 1Eh R Hardware Thermal Shutdown Limit When read, returns the selected Hardware Thermal Shutdown Limit N/A Page 38 Page 34 Page 34 Page 34 SMSC EMC1423/EMC1424 29 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS R/W REGISTER NAME FUNCTION DEFAULT VALUE PAGE 1Fh R/W Channel Mask Register Controls the masking of individual channels 00h Page 38 20h R/W Internal Diode THERM Limit Stores the 8-bit critical temperature limit for the Internal Diode 55h (85°C) 0Ah (10°C) Page 36 21h R/W THERM Hysteresis Stores the 8-bit hysteresis value that applies to all THERM limits 22h R/W Consecutive ALERT Controls the number of out-of-limit conditions that must occur before an interrupt is asserted 70h 23h R External Diode 2 Data High Byte Stores the integer data for External Diode 2 00h 24h R External Diode 2 Data Low Byte Stores the fractional data for External Diode 2 00h 26h R/W External Diode 2 Beta Configuration Stores the Beta Compensation circuitry settings for External Diode 2 08h or 07h Page 40 28h R/W External Diode 2 Ideality Factor Stores the ideality factor for External Diode 2 12h (1.008) Page 41 29h R Internal Diode Data Low Byte Stores the fractional data for the Internal Diode 00h Page 31 2Ah R External Diode 3 High Byte Stores the integer data for External Diode 3 00h 2Bh R External Diode 3 Low Byte Stores the fractional data for External Diode 3 00h 2Ch R/W External Diode 3 High Limit High Byte Stores the integer portion of the high limit for External Diode 3 55h (85°C) 2Dh R/W External Diode 3 Low Limit High Byte Stores the integer portion of the low limit for External Diode 3 00h (0°C) 2Eh R/W External Diode 3 High Limit Low Byte Stores the fractional portion of the high limit for External Diode 3 00h 2Fh R/W External Diode 3 Low Limit Low Byte Stores the fractional portion of the low limit for External Diode 3 00h 30h R/W External Diode 3 THERM Limit Stores the 8-bit critical temperature limit for External Diode 3 55h (85°C) Page 36 31h R/W External Diode 3 Ideality Factor Stores the ideality factor for External Diode 3 12h (1.008) Page 41 35h R-C High Limit Status Status bits for the High Limits 00h Page 43 36h R-C Low Limit Status Status bits for the Low Limits 00h Page 43 37h R THERM Limit Status Status bits for the THERM Limits 00h Page 44 40h R/W Filter Control Controls the digital filter setting for the External Diode 1 channel 00h Page 44 Page 39 Page 31 Page 31 Page 34 Revision 2.0 (08-10-12) 30 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS R/W REGISTER NAME FUNCTION FDh R Product ID FEh R FFh R 6.1 DEFAULT VALUE PAGE Stores a fixed value that identifies each product Table 6.26 Page 45 SMSC ID Stores a fixed value that represents SMSC 5Dh Page 45 Revision Stores a fixed value that represents the revision number 01h or 04h Page 46 Data Read Interlock When any temperature channel high byte register is read, the corresponding low byte is copied into an internal ‘shadow’ register. The user is free to read the low byte at any time and be guaranteed that it will correspond to the previously read high byte. Regardless if the low byte is read or not, reading from the same high byte register again will automatically refresh this stored low byte data. 6.2 Temperature Data Registers Table 6.2 Temperature Data Registers ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 00h R Internal Diode High Byte 128 64 32 16 8 4 2 1 00h 29h R Internal Diode Low Byte 0.5 0.25 0.125 - - - - - 00h 01h R External Diode 1 High Byte 128 64 32 16 8 4 2 1 00h 10h R External Diode 1 Low Byte 0.5 0.25 0.125 - - - - - 00h 23h R External Diode 2 High Byte 128 64 32 16 8 4 2 1 00h 24h R External Diode 2 Low Byte 0.5 0.25 0.125 - - - - - 00h 2Ah R External Diode 3 High Byte 128 64 32 16 8 4 2 1 00h 2Bh R External Diode 3 Low Byte 0.5 0.25 0.125 - - - - - 00h As shown in Table 6.2, all temperatures are stored as an 11-bit value with the high byte representing the integer value and the low byte representing the fractional value left justified to occupy the MSBits. SMSC EMC1423/EMC1424 31 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 6.3 Status Register Table 6.3 Status Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 02h R Status BUSY - - HIGH LOW FAULT THERM HWSD 00h The Status Register reports general error conditions. To identify specific channels, refer to Section 6.9, Section 6.16, Section 6.17, and Section 6.18. The individual Status Register bits are cleared when the appropriate High Limit, Low Limit, or THERM Limit register has been read or cleared. Bit 7 - BUSY - This bit indicates that the ADC is currently converting. This bit does not cause the ALERT pin to be asserted. Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit. See the High Limit Status Register for specific channel information (Section 6.16). When set, this bit will assert the ALERT pin. Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low limit. See the Low Limit Status Register for specific channel information (Section 6.17). When set, this bit will assert the ALERT pin. Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode channels. See the External Diode Fault Register for specific channel information (Section 6.9). When set, this bit will assert the ALERT pin. Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed THERM limit. See the THERM Limit Status Register for specific channel information (Section 6.18). Bit 0 - HWSD - This bit is set when the External Diode 1 Temperature exceeds the Hardware Thermal Shutdown Limit set by the pull-up resistors on the ALERT and SYS_SHDN pins. When set, this bit will assert the SYS_SHDN pin. 6.4 Configuration Register Table 6.4 Configuration Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT R/W Configuration MASK_ ALL - ALERT/ COMP - RECD2 RANGE DAVG_ DIS APDD 00h 03h 09h The Configuration Register controls the basic operation of the device. This register is fully accessible at either address. Bit 7 - MASK_ALL - Masks the ALERT pin from asserting. ‘0’ (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT pin will be asserted. ‘1’ - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is configured to act in comparator mode. The Status Registers will be updated normally. Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin. ‘0’ (default) - The ALERT pin acts as described in Section 5.3. ‘1’ - The ALERT pin acts in comparator mode as described in Section 5.3.2. In this mode the MASK_ALL bit is ignored. Revision 2.0 (08-10-12) 32 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Bit 3 - RECD2 - Disables the Resistance Error Correction (REC) for External Diode 2 and External Diode 3. ‘0’ (default) - REC is enabled for External Diode 2 and External Diode 3. ‘1’ - REC is disabled for External Diode 2 and External Diode 3. Bit 2 - RANGE - Configures the measurement range and data format of the temperature channels. ‘0’ (default) - The temperature measurement range is 0°C to +127.875°C and the data format is binary. ‘1’ -The temperature measurement range is -64°C to +191.875°C and the data format is offset binary (see Table 5.4). Bit 1 - DAVG_DIS - Disables the dynamic averaging feature on all temperature channels. ‘0’ (default) - The dynamic averaging feature is enabled. All temperature channels will be converted with an averaging factor that is based on the conversion rate as shown in Table 5.1 and Table 5.2. ‘1’ - The dynamic averaging feature is disabled. All temperature channels will be converted with a maximum averaging factor of 1x (equivalent to 11-bit conversion). For higher conversion rates, this averaging factor will be reduced as shown in Table 5.1 and Table 5.2. Bit 0 - APDD (EMC1424 only) - Disables the anti-parallel diode operation. Beta Compensation is disabled on External Diode 2 and 3 regardless of APDD setting. In addition, External Diode 2 Beta Configuration register will be ignored. 6.5 ‘0’ (default) - Anti-parallel diode mode is enabled. Two external diodes will be measured on the DP2 and DN2 pins. ‘1’ - Anti-parallel diode mode is disabled. Only one external diode will be measured on the DP2 and DN2 pins. Conversion Rate Register Table 6.5 Conversion Rate Register ADDR R/W REGISTER B7 B6 B5 B4 R/W Conversion Rate - - - - 04h 0Ah B3 B2 B1 B0 DEFAULT 06h (4/sec) CONV[3:0] The Conversion Rate Register controls how often the temperature measurement channels are updated and compared against the limits. This register is fully accessible at either address. Bits 3-0 - CONV[3:0] - Determines the conversion rate as shown in Table 6.6. Table 6.6 Conversion Rate CONV[3:0] HEX 3 2 1 0 CONVERSIONS / SECOND 0h 0 0 0 0 1 1h 0 0 0 1 1 2h 0 0 1 0 1 3h 0 0 1 1 1 4h 0 1 0 0 1 SMSC EMC1423/EMC1424 33 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.6 Conversion Rate (continued) CONV[3:0] HEX 3 2 1 0 CONVERSIONS / SECOND 5h 0 1 0 1 2 6h 0 1 1 0 4 (default) 7h 0 1 1 1 8 8h 1 0 0 0 16 9h 1 0 0 1 32 Ah 1 0 1 0 64 Bh - Fh 6.6 All others 1 Limit Registers Table 6.7 Temperature Limit Registers ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT R/W Internal Diode High Limit 128 64 32 16 8 4 2 1 55h (85°C) R/W Internal Diode Low Limit 128 64 32 16 8 4 2 1 00h (0°C) R/W External Diode 1 High Limit High Byte 128 64 32 16 8 4 2 1 55h (85°C) R/W External Diode 1 High Limit Low Byte 0.5 0.25 0.125 - - - - - 00h R/W External Diode 1 Low Limit High Byte 128 64 32 16 8 4 2 1 00h (0°C) 14h R/W External Diode 1 Low Limit Low Byte 0.5 0.25 0.125 - - - - - 00h 15h R/W External Diode 2 High Limit High Byte 128 64 32 16 8 4 2 1 55h (85°C) R/W External Diode 2 Low Limit High Byte 128 64 32 16 8 4 2 1 00h (0°C) 05h 0Bh 06h 0Ch 07h 0Dh 13h 08h 0Eh 16h Revision 2.0 (08-10-12) 34 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.7 Temperature Limit Registers (continued) ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT R/W External Diode 2 High Limit Low Byte 0.5 0.25 0.125 - - - - - 00h 18h R/W External Diode 2 Low Limit Low Byte 0.5 0.25 0.125 - - - - - 00h 2Ch R/W External Diode 3 High Limit High Byte 128 64 32 16 8 4 2 1 55h (85°C) R/W External Diode 3 Low Limit High Byte 128 64 32 16 8 4 2 1 00h (0°C) R/W External Diode 3 High Limit Low Byte 0.5 0.25 0.125 - - - - - 00h R/W External Diode 3 Low Limit Low Byte 0.5 0.25 0.125 - - - - - 00h 17h 2Dh 2Eh 2Fh The device contains both high and low limits for all temperature channels. If the measured temperature exceeds the high limit, then the corresponding status bit is set and the ALERT pin is asserted. Likewise, if the measured temperature is less than or equal to the low limit, the corresponding status bit is set and the ALERT pin is asserted. The data format for the limits must match the selected data format for the temperature so that if the extended temperature range is used, the limits must be programmed in the extended data format. The limit registers with multiple addresses are fully accessible at either address. 6.7 Scratchpad Registers Table 6.8 Scratchpad Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 11h R/W Scratchpad 7 6 5 4 3 2 1 0 00h 12h R/W Scratchpad 7 6 5 4 3 2 1 0 00h The Scratchpad Registers are Read Write registers that are used for place holders to be software compatible with legacy programs. Reading from the registers will return what is written to them. SMSC EMC1423/EMC1424 35 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 6.8 Therm Limit Registers Table 6.9 Therm Limit Registers ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 19h R/W External Diode 1 THERM Limit 128 64 32 16 8 4 2 1 55h (85°C) 1Ah R/W External Diode 2 THERM Limit 128 64 32 16 8 4 2 1 55h (85°C) 20h R/W Internal Diode THERM Limit 128 64 32 16 8 4 2 1 55h (85°C) 21h R/W THERM Hysteresis 128 64 32 16 8 4 2 1 0Ah (10°C) 30h R/W External Diode 3 THERM Limit 128 64 32 16 8 4 2 1 55h (85°C) The THERM Limit Registers are used to determine whether a critical thermal event has occurred. If the measured temperature exceeds the THERM Limit, then the SYS_SHDN pin will be asserted (if the corresponding measurement channel is linked to the SYS_SHDN pin). The limit setting must match the chosen data format of the temperature reading registers. 6.9 External Diode Fault Register Table 6.10 External Diode Fault Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 1Bh R-C External Diode Fault - - - - E3FLT E2FLT E1FLT - 00h The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the Status Register to be set. This register is cleared when it is read. Bit 3 - E3FLT - This bit is set if the External Diode 3 channel reported a diode fault. Bit 2 - E2FLT - This bit is set if the External Diode 2 channel reported a diode fault. Bit 1 - E1FLT - This bit is set if the External Diode 1 channel reported a diode fault. Revision 2.0 (08-10-12) 36 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 6.10 Software Thermal Shutdown Configuration Register Table 6.11 Software Thermal Shutdown Configuration Register ADDR. 1Dh R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT R/W Software Thermal Shutdown Configuration - - - - E3SYS E2SYS ESYS INTSYS 00h The Software Thermal Shutdown Configuration Register controls whether any of the software channels will assert the SYS_SHDN pin. If a channel is enabled, the temperature is compared against the corresponding THERM Limit. If the measured temperature exceeds the THERM Limit, then the SYS_SHDN pin is asserted. This functionality is in addition to the Hardware Shutdown circuitry. Bit 3 - E3SYS - configures the External Diode 3 channel to assert the SYS_SHDN pin based on its THERM Limit. ‘0’ (default) - the External Diode 3 channel is not linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the E3THERM status bit is set but the SYS_SHDN pin is not asserted. ‘1’ - the External Diode 3 channel is linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the E3THERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below it’s THERM Limit minus the THERM Hysteresis. Bit 2 - E2SYS - configures the External Diode 2 channel to assert the SYS_SHDN pin based on its THERM Limit. ‘0’ (default) - the External Diode 2 channel is not linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the E2THERM status bit is set but the SYS_SHDN pin is not asserted. ‘1’ - the External Diode 2 channel is linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the E2THERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below it’s THERM Limit minus the THERM Hysteresis. Bit 1 - E1SYS - configures the External Diode 1 channel to assert the SYS_SHDN pin based on its THERM Limit. ‘0’ (default) - the External Diode 1 channel is not linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the E1THERM status bit is set but the SYS_SHDN pin is not asserted. ‘1’ - the External Diode 1 channel is linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the E1THERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below its THERM Limit minus the THERM Hysteresis. Bit 0 - INTSYS - configures the Internal Diode channel to assert the SYS_SHDN pin based on its THERM Limit. ‘0’ (default) - the Internal Diode channel is not linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the ITHERM status bit is set but the SYS_SHDN pin is not asserted. ‘1’ - the Internal Diode channel is linked to the SYS_SHDN pin. If the temperature exceeds its THERM Limit, the ITHERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below its THERM Limit minus the THERM Hysteresis. SMSC EMC1423/EMC1424 37 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 6.11 Hardware Thermal Shutdown Limit Register Table 6.12 Hardware Thermal Shutdown Limit Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 1Eh R Hardware Thermal Shutdown Limit 128 64 32 16 8 4 2 1 N/A This read only register returns the Hardware Thermal Shutdown Limit selected by the value of the pullup resistors on the ALERT and SYS_SHDN pins. The data represents the hardware set temperature in °C using the active temperature setting set by the RANGE bit in the Configuration Register. See Table 6.5 for the data format. When the External Diode 1 Temperature exceeds this limit, the SYS_SHDN pin is asserted and will remain asserted until the External Diode 1 Temperature drops below this limit minus 10°C. 6.12 Channel Mask Register Table 6.13 Channel Mask Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 1Fh R/W Channel Mask - - - - E3 MASK E2 MASK E1 MASK INT MASK 00h The Channel Mask Register controls individual channel masking. When a channel is masked, the ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error. The channel mask does not mask the SYS_SHDN pin. Bit 3 - E3MASK - Masks the ALERT pin from asserting when the External Diode 3 channel is out of limit or reports a diode fault. ‘0’ (default) - The External Diode 3 channel will cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. ‘1’ - The External Diode 3 channel will not cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. Bit 2 - E2MASK - Masks the ALERT pin from asserting when the External Diode 2 channel is out of limit or reports a diode fault. ‘0’ (default) - The External Diode 2 channel will cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. ‘1’ - The External Diode 2 channel will not cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. Bit 1 - E1MASK - Masks the ALERT pin from asserting when the External Diode 1 channel is out of limit or reports a diode fault. ‘0’ (default) - The External Diode 1 channel will cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. ‘1’ - The External Diode 1 channel will not cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out of limit. ‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit. Revision 2.0 (08-10-12) 38 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 6.13 ‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit. Consecutive ALERT Register Table 6.14 Consecutive ALERT Register ADDR. R/W REGISTER B7 22h R/W Consecutive ALERT TIME OUT B6 B5 B4 CTHRM[2:0] B3 B2 B1 CALRT[2:0] B0 DEFAULT - 70h The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must be detected in consecutive measurements before the ALERT or SYS_SHDN pin is asserted. Additionally, the Consecutive ALERT Register controls the SMBus Timeout functionality. An out-of-limit condition (i.e. HIGH, LOW, or FAULT) occurring on the same temperature channel in consecutive measurements will increment the consecutive alert counter. The counters will also be reset if no out-of-limit condition or diode fault condition occurs in a consecutive reading. When the ALERT pin is configured as an interrupt, when the consecutive alert counter reaches its programmed value, the following will occur: the STATUS bit(s) for that channel and the last error condition(s) (i.e. E1HIGH, or E2LOW and/or E2FAULT) will be set to ‘1’, the ALERT pin will be asserted, the consecutive alert counter will be cleared, and measurements will continue. When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode fault and low limit errors and only increment if the measured temperature exceeds the High Limit. Additionally, once the consecutive alert counter reaches the programmed limit, the ALERT pin will be asserted, but the counter will not be reset. It will remain set until the temperature drops below the High Limit minus the THERM Hysteresis value. For example, if the CALRT[2:0] bits are set for 4 consecutive alerts on an EMC1423 device, the high limits are set at 70°C, and none of the channels are masked, then the ALERT pin will be asserted after the following four measurements: 1. Internal Diode reads 71°C and both external diodes read 69°C. Consecutive alert counter for INT is incremented to 1. 2. Both Internal Diode and External Diode 1 read 71°C and External Diode 2 reads 68°C. Consecutive alert counter for INT is incremented to 2 and for EXT1 is set to 1. 3. The External Diode 1 reads 71°C and both the Internal Diode and External Diode 2 read 69°C. Consecutive alert counter for INT and EXT2 are cleared and EXT1 is incremented to 2. 4. The Internal Diode reads 71°C and both external diodes read 71°C. Consecutive alert counter for INT is set to 1, EXT2 is set to 1, and EXT1 is incremented to 3. 5. The Internal Diode reads 71°C and both the external diodes read 71°C. Consecutive alert counter for INT is incremented to 2, EXT2 is set to 2, and EXT1 is incremented to 4. The appropriate status bits are set for EXT1 and the ALERT pin is asserted. EXT1 counter is reset to 0 and all other counters hold the last value until the next temperature measurement. Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled. ‘0’ (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely without the device resetting its SMBus protocol. ‘1’ - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms, then the device will reset the SMBus protocol. Bits 6-4 CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the corresponding THERM Limit and Hardware Thermal Shutdown Limit before the SYS_SHDN pin is asserted. All temperature channels use this value to set the respective counters. The consecutive THERM counter is incremented whenever any of the measurements exceed the corresponding THERM Limit or if the External Diode 1 measurement exceeds the Hardware Thermal Shutdown Limit. SMSC EMC1423/EMC1424 39 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet If the temperature drops below the THERM limit or Hardware Thermal Shutdown Limit, then the counter is reset. If the programmed number of consecutive measurements exceed the THERM Limit or Hardware Thermal Shutdown Limit, and the appropriate channel is linked to the SYS_SHDN pin, then the SYS_SHDN pin will be asserted low. Once the SYS_SHDN pin is asserted, the consecutive THERM counter will not reset until the corresponding temperature drops below the appropriate limit minus the corresponding hysteresis. The bits are decoded as shown in Table 6.15. The default setting is 4 consecutive out of limit conversions. Bits 3-1 - CALRT[2:0] - Determine the number of consecutive measurements that must have an out of limit condition or diode fault before the ALERT pin is asserted. All temperature channels use this value to set the respective counters. The bits are decoded as shown in Table 6.15. The default setting is 1 consecutive out of limit conversion. Table 6.15 Consecutive Alert / THERM Settings 6.14 NUMBER OF CONSECUTIVE OUT OF LIMIT MEASUREMENTS 2 1 0 0 0 0 1 (default for CALRT[2:0]) 0 0 1 2 0 1 1 3 1 1 1 4 (default for CTHRM[2:0]) Beta Configuration Registers Table 6.16 Beta Configuration Registers ADDR. 26h R/W REGISTER R/W External Diode 2 Beta Configuration B7 - B6 - B5 - B4 - B3 ENABLE2 B2 B1 B0 BETA2[2:0] DEFAULT 08h for EMC1423 or 07h for EMC1424 This register is used to set the Beta Compensation factor that is used for the external diode channels. Bit 3 - ENABLEx - Enables the Beta Compensation factor autodetection function. This function shall be disabled for External Diode 2. ‘0’ - The Beta Compensation Factor autodetection circuitry is disabled. The External Diode will always use the Beta Compensation factor set by the BETAx[2:0] bits. ‘1’ (default) - The Beta Compensation factor autodetection circuitry is enabled. At the beginning of every conversion, the optimal Beta Compensation factor setting will be determined and applied. The BETAx[2:0] bits will be automatically updated to indicate the current setting. Bit 2-0 - BETAx[2:0] - These bits always reflect the current beta configuration settings. If autodetection circuitry is enabled, then these bits will be updated automatically and writing to these bits will have no effect. If the autodetection circuitry is disabled, then these bits will determine the beta configuration setting that is used for their respective channels. Care should be taken when setting the BETAx[2:0] bits when the autodetection circuitry is disabled. If the Beta Compensation factor is set at a beta value that is higher than the transistor beta, then the circuit may introduce measurement errors. When measuring a discrete thermal diode (such as Revision 2.0 (08-10-12) 40 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 2N3904) or a CPU diode that functions like a discrete thermal diode (such as an AMD processor diode), then the BETAx[2:0] bits should be set to ‘111b’. Table 6.17 CPU Beta Values BETAX[2:0] HEX ENABLEX 2 1 0 0h 0 0 0 0 0.11 1h 0 0 0 1 0.18 2h 0 0 1 0 0.25 3h 0 0 1 1 0.33 4h 0 1 0 0 0.43 5h 0 1 0 1 1.00 6h 0 1 1 0 2.33 7h 0 1 1 1 Disabled 8h - Fh 1 X X X Autodetection 6.15 MINIMUM BETA External Diode Ideality Factor Registers Table 6.18 Ideality Configuration Registers ADDR. R/W REGISTER B7 B6 28h R/W External Diode 2 Ideality Factor - - IDEALITY2[5:0] 12h R/W External Diode 3 Ideality Factor - - IDEALITY3[5:0] 12h 31h B5 B4 B3 B2 B1 B0 DEFAULT These registers store the ideality factors that are applied to the external diodes. Table 6.19 defines each setting and the corresponding ideality factor. Beta Compensation and Resistance Error Correction automatically correct for most diode ideality errors, therefore it is not recommended that these settings be updated without consulting SMSC. Table 6.19 Ideality Factor Look-Up Table (Diode Model) SETTING FACTOR SETTING FACTOR SETTING FACTOR 08h 0.9949 18h 1.0159 28h 1.0371 09h 0.9962 19h 1.0172 29h 1.0384 0Ah 0.9975 1Ah 1.0185 2Ah 1.0397 SMSC EMC1423/EMC1424 41 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.19 Ideality Factor Look-Up Table (Diode Model) (continued) SETTING FACTOR SETTING FACTOR SETTING FACTOR 0Bh 0.9988 1Bh 1.0200 2Bh 1.0410 0Ch 1.0001 1Ch 1.0212 2Ch 1.0423 0Dh 1.0014 1Dh 1.0226 2Dh 1.0436 0Eh 1.0027 1Eh 1.0239 2Eh 1.0449 0Fh 1.0040 1Fh 1.0253 2Fh 1.0462 10h 1.0053 20h 1.0267 30h 1.0475 11h 1.0066 21h 1.0280 31h 1.0488 12h 1.0080 22h 1.0293 32h 1.0501 13h 1.0093 23h 1.0306 33h 1.0514 14h 1.0106 24h 1.0319 34h 1.0527 15h 1.0119 25h 1.0332 35h 1.0540 16h 1.0133 26h 1.0345 36h 1.0553 17h 1.0146 27h 1.0358 37h 1.0566 For CPU substrate transistors that require the BJT transistor model, the ideality factor behaves slightly differently than for discrete diode-connected transistors. Refer to Table 6.20 when using a CPU substrate transistor. Table 6.20 Substrate Diode Ideality Factor Look-Up Table (BJT Model) SETTING FACTOR SETTING FACTOR SETTING FACTOR 08h 0.9869 18h 1.0079 28h 1.0291 09h 0.9882 19h 1.0092 29h 1.0304 0Ah 0.9895 1Ah 1.0105 2Ah 1.0317 0Bh 0.9908 1Bh 1.0120 2Bh 1.0330 0Ch 0.9921 1Ch 1.0132 2Ch 1.0343 0Dh 0.9934 1Dh 1.0146 2Dh 1.0356 0Eh 0.9947 1Eh 1.0159 2Eh 1.0369 0Fh 0.9960 1Fh 1.0173 2Fh 1.0382 10h 0.9973 20h 1.0187 30h 1.0395 11h 0.9986 21h 1.0200 31h 1.0408 12h 1.0000 22h 1.0213 32h 1.0421 13h 1.0013 23h 1.0226 33h 1.0434 14h 1.0026 24h 1.0239 34h 1.0447 15h 1.0039 25h 1.0252 35h 1.0460 Revision 2.0 (08-10-12) 42 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.20 Substrate Diode Ideality Factor Look-Up Table (BJT Model) (continued) SETTING FACTOR SETTING FACTOR SETTING FACTOR 16h 1.0053 26h 1.0265 36h 1.0473 17h 1.0066 27h 1.0278 37h 1.0486 APPLICATION NOTE: When measuring a 65nm Intel CPUs, the Ideality Setting should be the default 12h. When measuring 45nm Intel CPUs, the Ideality Setting should be 15h. 6.16 High Limit Status Register Table 6.21 High Limit Status Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 35h R-C High Limit Status - - - - E3HIGH E2HIGH E1HIGH IHIGH 00h The High Limit Status Register contains the status bits that are set when a temperature channel high limit is exceeded. If any of these bits are set, then the HIGH status bit in the Status Register is set. Reading from the High Limit Status Register will clear all bits if. Reading from the register will also clear the HIGH status bit in the Status Register. The ALERT pin will be set if the programmed number of consecutive alert counts have been met and any of these status bits are set. The status bits will remain set until read unless the ALERT pin is configured as a comparator output (see Section 5.3.2). Bit 3 - E3HIGH - This bit is set when the External Diode 3 channel exceeds its programmed high limit. Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel exceeds its programmed high limit. Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel exceeds its programmed high limit. Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit. 6.17 Low Limit Status Register Table 6.22 Low Limit Status Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 36h R-C Low Limit Status - - - - E3LOW E2LOW E1LOW ILOW 00h The Low Limit Status Register contains the status bits that are set when a temperature channel drops below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set. Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear the LOW status bit in the Status Register. The ALERT pin will be set if the programmed number of consecutive alert counts have been met and any of these status bits are set. The status bits will remain set until read unless the ALERT pin is configured as a comparator output (see Section 5.3.2). SMSC EMC1423/EMC1424 43 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low limit. Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low limit. Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low limit. Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit. 6.18 THERM Limit Status Register Table 6.23 THERM Limit Status Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 37h R-C THERM Limit Status - - - - E3 THERM E2 THERM E1 THERM ITHERM 00h The THERM Limit Status Register contains the status bits that are set when a temperature channel THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all individual channel THERM bits are cleared. Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds its programmed THERM Limit. Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds its programmed THERM Limit. Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds its programmed THERM limit. Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds its programmed THERM limit. 6.19 Filter Control Register Table 6.24 Filter Configuration Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 40h R/W Filter Control - - - - - - B1 B0 DEFAULT FILTER[1:0] 00h The Filter Configuration Register controls the digital filter on the External Diode 1 channel. Bits 1-0 - FILTER[1:0] - Control the level of digital filtering that is applied to the External Diode temperature measurements as shown in Table 6.25. See Figure 5.5and Figure 5.6 for examples on the filter behavior. Revision 2.0 (08-10-12) 44 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Table 6.25 Filter Settings FILTER[1:0] 6.20 1 0 AVERAGING 0 0 Disabled (default) 0 1 Level 1 1 0 Level 1 1 1 Level 2 Product ID Register Table 6.26 Product ID Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT FDh R Product ID 0 0 1 0 0 0 1 1 23h EMC1423 FDh R Product ID 0 0 1 0 0 1 1 1 27h EMC1424 The Product ID Register holds a unique value that identifies the device. 6.21 SMSC ID Register (FEh) Table 6.27 Manufacturer ID Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT FEh R SMSC ID 0 1 0 1 1 1 0 1 5Dh The Manufacturer ID register contains an 8 bit word that identifies the SMSC as the manufacturer of the EMC1423 and EMC1424. SMSC EMC1423/EMC1424 45 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 6.22 Revision Register (FFh) Table 6.28 Revision Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT FFh R Revision 0 0 0 0 0 0 0 1 01h FFh R Revision 0 0 0 0 0 1 0 0 04h The Revision register contains an 8-bit word that identifies the die revision. It can be 01h or 04h. ENGINEERING NOTE: Revision 2.0 (08-10-12) 46 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 7 Typical Operating Curves Tem perature Error vs. Am bient Tem perature (2N3904, TDIODE = 42.5°C, VDD = 3.3V) 1.0 1.0 0.8 0.8 0.6 Temperature Error (°C) Temperature Error (°C) Tem perature Error vs. Filter Capacitor (2N3904, TA = 27°C, TDIODE = 27°C, VDD = 3.3V) 0.5 0.3 0.0 -0.3 -0.5 -0.8 -1.0 0 1000 2000 3000 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 4000 -1.0 -40 -25 -10 Filter Capacitor (pF) 5 Temperature Error (°C) Temperature Error (°C) SMSC EMC1423/EMC1424 95 110 125 Temperature Error vs. CPU Temperature Typical 65nm CPU from major vendor (TA = 27°C, VDD = 3.3V, BETA = 011, CFILTER = 470pF) Tem perature Error vs. External Diode Tem perature (2N3904, TA = 42.5°C, VDD = 3.3V) 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 -40 -25 -10 5 20 35 50 65 80 95 External Diode Tem perature (°C) 5 20 35 50 65 80 Am bient Tem perature (°C) 4 Beta Compensation Disabled 3 2 1 0 Beta Compensation Enabled -1 20 110 125 40 60 80 100 120 CPU Temperature (°C) 47 DATASHEET Revision 2.0 (08-10-12) 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Tem perature Error vs. Am bient Tem perature (2N3904, TDIODE = 27°C, VDD = 3.3V) 0.8 100 80 REC Disabled 0.6 60 0.4 40 0.2 20 REC Enabled 0.0 0 50 100 Series R (Ohm) 2.0 0 200 150 EXT2 - APD 1.5 Temperature Error (°C) 120 Temperature Error (°C) REC Disabled Temperature Error (°C) REC Enabled Temperature Error vs. Series Resistance 1.0 EXT3 - APD 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -40 -25 -10 5 20 35 50 65 80 Am bient Tem perature (°C) 95 110 125 S upply Curre nt vs. Conve rsion Ra te 1200 1100 1000 Supply Current (uA 900 800 Dy namic A v eraging Enabled 700 Dy namic A v eraging Dis abled 600 500 400 300 200 1 2 4 8 16 32 64 Conve rsion Ra te Revision 2.0 (08-10-12) 48 DATASHEET SMSC EMC1423/EMC1424 D PIN 1 IDENTIFIER AREA (D/2 X E1/2) e E1 4 2 c INITIAL RELEASE DATE RELEASED BY 3/29/05 S.K.ILIEV 4 E SEE DETAIL "A" 10X b END VIEW TOP VIEW 49 DATASHEET 3 DESCRIPTION A Revision 2.0 (08-10-12) REVISION HISTORY REVISION 5 3 A2 A C SEATING PLANE A1 ccc C 3-D VIEW SIDE VIEW H C GAUGE PLANE 0.25 NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETER. 2. TOLERANCE ON THE TRUE POSITION OF EACH LEAD IS ± 0.04 mm AT MAXIMUM MATERIAL CONDITION. 3. PACKAGE BODY DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD/INTERLEAD PROTRUSIONS OR FLASH. MAXIMUM MOLD PROTRUSIONS OR FLASH IS 0.15 mm (0.006 INCHES) PER END AND SIDE. DIMENSIONS "D" AND "E1" ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY, INCLUDING ANY MISMATCH BETWEEN TOP AND BOTTOM PLASTIC BODY. THEY ARE DETERMINED AT DATUM PLANE "H". 4. DIMENSIONS "b" AND "c" APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 mm AND 0.15 mm FROM THE LEAD TIP. 5. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. SEATING PLANE 0° - 8° L (0.95) UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN MILLIMETERS AND TOLERANCES ARE: DECIMAL X.X ±0.1 X.XX ±0.05 X.XXX ±0.025 THIRD ANGLE PROJECTION 80 ARKAY DRIVE HAUPPAUGE, NY 11788 USA ANGULAR ±1° TITLE DETAIL "A" NAME DATE S.K.ILIEV 3/29/05 DIM AND TOL PER ASME Y14.5M - 1994 MATERIAL FINISH - CHECKED S.K.ILIEV S.K.ILIEV Figure 8.1 10-Pin MSOP / TSSOP Package REV DWG NUMBER MO-10-TSSOP-3x3 3/29/05 APPROVED PRINT WITH "SCALE TO FIT" DO NOT SCALE DRAWING PACKAGE OUTLINE 10 PIN TSSOP, 3x3 MM BODY, 0.50 MM PITCH DRAWN STD COMPLIANCE SCALE 3/29/05 1:1 JEDEC: MO-187 A SHEET 1 OF 1 SMSC EMC1423/EMC1424 Datasheet 1°C Temperature Sensor with Hardware Thermal Shutdown Chapter 8 Package Information 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet 8.1 Package Markings All devices will be marked on the first line of the top side with ”1423” or “1424”. On the second line, they will be marked with the appropriate -X number (-1, -2, etc), the Functional Revision “B” and Country Code (CC). Revision 2.0 (08-10-12) 50 DATASHEET SMSC EMC1423/EMC1424 1°C Temperature Sensor with Hardware Thermal Shutdown Datasheet Chapter 9 Datasheet Revision History Table 9.1 Customer Revision History REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION Rev. 2.0 (08-10-12) Table 3.3, "SMBus Electrical Specifications" Added conditions for tHD:DAT. Data hold time minimum of 0.3µs is required when receiving from the master. Data hold time is 0µs min when transmitting to the master. Section 6.22, "Revision Register (FFh)" Added row to indicate that revision ID can be 04h. Revision ID may be 04h or 01h. Table 2.1, "EMC1423 and EMC1424 Pin Description" In pin description table, added to function column: “requires pull-up resistor” for SMDATA and SMCLK pins Table 2.1, "EMC1423 and EMC1424 Pin Description" Identified 5V tolerant pins. Added the following application note below table: “For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA, SYS_SHDN, and ALERT), the voltage difference between VDD and the pull-up voltage must never exceed 3.6V.” Table 3.1, "Absolute Maximum Ratings" Updated voltage limits for 5V tolerant pins with pull-up resistors. Rev. 1.36 (07-02-09) Added the following note below table: “For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA, SYS_SHDN, and ALERT), the pull-up voltage must not exceed 3.6V when the device is unpowered.” Table 3.2, "Electrical Specifications" Added leakage current. Rev. 1.35 (04-17-09) Table 3.1, "Absolute Maximum Ratings" Package thermal characteristics for DFN-10 removed Rev. 1.34 (02-27-09) Table 5.4, "Temperature Data Format" Extended range for -1 updated from 001 1111 1111 to 001 1111 1000 SMSC EMC1423/EMC1424 51 DATASHEET Revision 2.0 (08-10-12)