P2040A October 2005 rev 1.2 LCD Panel EMI Reduction IC Features applications. The P2040A reduces electromagnetic interference (EMI) at the clock source, allowing system FCC approved method of EMI attenuation. wide reduction of EMI of down stream clock and data Provides up to 20dB of EMI suppression. dependent signals. The P2040A allows significant system Generates a low EMI spread spectrum clock of the cost savings by reducing the number of circuit board input frequency. layers ferrite beads, Input frequency range: 30MHz to 100MHz. components that are traditionally required to pass EMI Optimized for VGA, SVGA, and higher resolution regulations. shielding and other passive XGA LCD Panels. Internal loop filter minimizes external components The P2040A uses the most efficient and optimized and board space. modulation Six selectable high spread ranges up to ± 2%. implemented in a proprietary all digital method. Two selectable modulation rates. SSON# control pin for spread spectrum enable and disable options. Low cycle-to-cycle jitter. Wide operating range. Low power CMOS design. Supports most by the FCC and is The P2040A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced mobile graphic accelerator Products available for automotive temperature range. (Refer Spread Spectrum Range Selection Tables) approved and more importantly, decreases the peak amplitudes of specifications. profile Available in 8-pin SOIC and TSSOP Packages. by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’. Applications The P2040A is targeted towards digital flat panel applications for notebook PCs, palm-size PCs, office Product Description The P2040A is a versatile spread spectrum frequency automation equipments and LCD monitors. modulator designed specifically for digital flat panel Block Diagram SR0 SR1 MRA SSON# VDD PLL Modulation CLKIN Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT VSS Alliance Semiconductor 2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. P2040A October 2005 rev 1.2 Pin Configuration CLKIN 1 MRA 2 SR1 VSS 8 VDD 7 SR0 3 6 ModOUT 4 5 SSON# P2040A Pin Description Pin# Pin Name Type 1 CLKIN I External reference frequency input. Connect to externally generated reference signal. 2 MRA I Digital logic input used to select modulation rate. This pin has an internal pull-up resistor. 3 SR1 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor. 4 VSS P Ground to entire chip. Connect to system ground. 5 SSON# I Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor. 6 ModOUT O Spread spectrum clock output. 7 SR0 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor. 8 VDD P Power supply for the entire chip (3.3V) Description Modulation Selection (Commercial) MRA SR1 SR0 Spreading Range Modulation Rate (KHz) 0 0 0 ± 1.125 (FIN /40) * 34.72KHz 0 0 1 ± 1.75 (FIN /40) * 34.72KHz 0 1 0 ± 0.75 (FIN /40) * 34.72KHz 0 1 1 ± 1.25 (FIN /40) * 34.72KHz 1 0 0 ± 1.25 (FIN /40) * 20.83KHz 1 0 1 ± 2.00 (FIN /40) * 20.83KHz 1 1 0 Reserved Reserved 1 1 1 Reserved Reserved LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 9 P2040A October 2005 rev 1.2 Spread Range Selection at 50MHz (Automotive) MRA SR1 SR0 Spreading Range Modulation Rate 0 0 0 ± 1.25 (FIN/40) * 34.72KHz 0 0 1 ± 2.00 (FIN/40) * 34.72KHz 0 1 0 ± 1.00 (FIN/40) * 34.72KHz 0 1 1 ± 1.50 (FIN/40) * 34.72KHz 1 0 0 ± 1.25 (FIN/40) * 20.83KHz 1 0 1 ± 2.00 (FIN/40) * 20.83KHz 1 1 0 ± 1.25 (FIN/40) * 20.83KHz 1 1 1 ± 2.00 (FIN/40) * 20.83KHz Spread Range Selection at 70MHz (Automotive) MRA SR1 SR0 Spreading Range Modulation Rate 0 0 0 ± 1.00 (FIN/40) * 34.72KHz 0 0 1 ± 1.50 (FIN/40) * 34.72KHz 0 1 0 ± 0.70 (FIN/40) * 34.72KHz 0 1 1 ± 1.00 (FIN/40) * 34.72KHz 1 0 0 ± 1.15 (FIN/40) * 20.83KHz 1 0 1 ± 2.00 (FIN/40) * 20.83KHz 1 1 0 ± 1.15 (FIN/40) * 20.83KHz 1 1 1 ± 1.75 (FIN/40) * 20.83KHz LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 9 P2040A October 2005 rev 1.2 Spread Spectrum Selection The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1). For example, P2040A is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x 768) flat panel operating at 65MHz (FIN) clock speed. A spreading selection of MRA=0, SR1=1 and SR0=0 provides a percentage deviation of ±0.75% from FIN. This results in the frequency on ModOUT being swept from 64.51MHz to 65.49MHz at a modulation rate of 56.24KHz. Refer Modulation Selection Table. The example in the following illustration is a common EMI reduction method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic accelerator manufacturers. Application Schematic for Mobile LCD Graphics Controllers 65MHz from graphics accelerator 1 CLKIN 2 MRA P2040A VDD 8 SR0 7 6 3 SR1 ModOUT 4 VSS SSON# 0.1µF +3.3V Modulated 65MHz signal with ±0.75 deviation and modulation rate of 56.24KHz. This signal is connected back to the spread spectrum input pin (SSIN) of the graphics accelerator. 5 Digital control for the SS enable or disable LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 9 P2040A October 2005 rev 1.2 Absolute Maximum Ratings Symbol VDD, VIN TSTG Parameter Rating Unit Voltage on any pin with respect to Ground -0.5 to +7.0 V Storage temperature -65 to +125 °C TC Operating temperature-Commercial 0 to 70 °C TA Operating temperature – Automotive -40 to +125 °C TJ Junction Temperature 150 °C 2 KV Static Discharge Voltage TDV (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. DC Electrical Characteristics (Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated) Symbol Parameter VIL Input low voltage VIH Input high voltage Input low current (pull-up resistor on inputs SR0, SR1 and MRA) Input high current (pull-down resistor on input SSON#) IIL IIH Min Typ Max Unit VSS - 0.3 - 0.8 V 2.0 - VDD + 0.3 V -35 - - µA - - 35 µA VOL Output low voltage (VDD = 3.3V, IOL = 20mA) - - 0.4 V VOH Output high voltage (VDD = 3.3V, IOH = 20mA) 2.5 - - V IDD Static supply current standby mode - 0.6 - mA ICC VDD tON ZOUT Dynamic supply current (3.3V and 10pF loading) 7 10 13 mA 2.7 3.3 3.7 V Power-up time (first locked cycle after power up) - 0.18 - mS Clock output impedance - 50 - Ω Operating voltage AC Electrical Characteristics Symbol Parameter Min Typ Max Unit fIN Input frequency 30 - 100 MHz fOUT Output frequency 30 - 100 MHz tLH* Output rise time (measured at 0.8V to 2.0V) 0.7 0.9 1.1 nS tHL* Output fall time (measured at 2.0V to 0.8V) 0.6 0.8 1.0 nS tJC Jitter (cycle to cycle) - - 360 pS tD Output duty cycle 45 50 55 % *tLH and tHL are measured into a capacitive load of 15pF LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 9 P2040A October 2005 rev 1.2 Package Information 8-lead (150-mil) SOIC Package H E D A2 A C A1 D θ e L B Dimensions Symbol Inches Min Max Millimeters Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ 0° 8° 0° 8° LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 9 P2040A October 2005 rev 1.2 8-lead Thin Shrunk Small Outline Package (4.40-MM Body) H E D A2 A C θ e A1 L B Dimensions Symbol Inches Min Millimeters Max A Min Max 0.043 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 0.50 0.70 θ 0° 8° 0° 8° LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 9 P2040A October 2005 rev 1.2 Ordering Information Part number Marking Package Type Temperature P2040A -08-ST P2040A 8-Pin SOIC,Tube Commercial P2040A -08-SR P2040A 8-Pin SOIC, Tape and Reel Commercial P2040AF-08-ST P2040AF 8-Pin SOIC, Tube, Pb Free Commercial P2040AF-08-SR P2040AF 8-Pin SOIC, Tape and Reel, Pb Free Commercial P2040AG-08-ST P2040AG 8-Pin SOIC, Tube, Green Commercial P2040AG-08-SR P2040AG 8-Pin SOIC, Tape and Reel, Green Commercial I2040A-08-ST I2040A 8-Pin SOIC, Tube Industrial I2040A-08-SR I2040A 8-Pin SOIC, Tape and Reel Industrial I2040AF-08-ST I2040AF 8-Pin SOIC, Tube, Pb Free Industrial I2040AF-08-SR I2040AF 8-Pin SOIC, Tape and Reel, Pb Free Industrial I2040AG-08-ST I2040AG 8-Pin SOIC, Tube, Green Industrial I2040AG-08-SR I2040AG 8-Pin SOIC, Tape and Reel, Green Industrial P2040A-08-TT P2040A 8-Pin TSSOP, Tube Commercial P2040A-08-TR P2040A 8-Pin TSSOP, Tape and Reel Commercial P2040AF-08-TT P2040AF 8-Pin TSSOP, Tube, Pb Free Commercial P2040AF-08-TR P2040AF 8-Pin TSSOP, Tape and Reel, Pb Free Commercial P2040AG-08-TT P2040AG 8-Pin TSSOP, Tube, Green Commercial P2040AG-08-TR P2040AG 8-Pin TSSOP, Tape and Reel, Green Commercial I2040A-08-TT I2040A 8-Pin TSSOP, Tube Industrial I2040A-08-TR I2040A 8-Pin TSSOP, Tape and Reel Industrial I2040AF-08-TT I2040AF 8-Pin TSSOP, Tube, Pb Free Industrial I2040AF-08-TR I2040AF 8-Pin TSSOP, Tape and Reel, Pb Free Industrial I2040AG-08-TT I2040AG 8-Pin TSSOP, Tube, Green Industrial I2040AG-08-TR I2040AG 8-Pin TSSOP, Tape and Reel, Green Industrial Device Ordering Information P 2 0 4 0 A F - 0 8 X X SR - SOIC, T/R TT – TSSOP, TUBE TR - TSSOP, T/R ST – SOIC, TUBE Pin Count F = Lead Free and and RoHS compliant part G = Green Deviation (%) and Spread option Identifier DEVICE NUMBER Licensed under U.S Patent Nos 5,488,627 and 5,631,921 Flow: P = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (-40°C to 85°C) LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 9 P2040A October 2005 rev 1.2 Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P2040A Document Version: v1.2 Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003 © Copyright 2003 Alliance Semiconductor Corporation. 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Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 9 of 9