LINER LT1225C Very high speed operational amplifier Datasheet

LT1225
Very High Speed
Operational Amplifier
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DESCRIPTIO
FEATURES
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Gain of 5 Stable
150MHz Gain Bandwidth
400V/µs Slew Rate
20V/mV DC Gain, RL = 500Ω
1mV Maximum Input Offset Voltage
±12V Minimum Output Swing into 500Ω
Wide Supply Range: ± 2.5V to ±15V
7mA Supply Current
90ns Settling Time to 0.1%, 10V Step
Drives All Capacitive Loads
The LT1225 is a very high speed operational amplifier with
excellent DC performance. The LT1225 features reduced
input offset voltage and higher DC gain than devices with
comparable bandwidth and slew rate. The circuit is a
single gain stage with outstanding settling characteristics.
The fast settling time makes the circuit an ideal choice for
data acquisition systems. The output is capable of driving
a 500Ω load to ±12V with ±15V supplies and a 150Ω load
to ± 3V on ± 5V supplies. The circuit is also capable of
driving large capacitive loads which makes it useful in
buffer or cable driver applications.
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APPLICATI
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The LT1225 is a member of a family of fast, high performance amplifiers that employ Linear Technology
Corporation’s advanced bipolar complementary
processing.
Wideband Amplifiers
Buffers
Active Filters
Video and RF Amplification
Cable Drivers
Data Acquisition Systems
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TYPICAL APPLICATI
Gain of 5 Pulse Response
20MHz,AV = 50 Instrumentation Amplifier
+
LT1225
–
1k
+
250Ω
200pF
VIN
–
10k
1k
1k
250Ω
1k
+
LT1225
VOUT
–
10k
–
LT1225 TA02
LT1225
+
LT1225 TA01
1
LT1225
PACKAGE/ORDER I FOR ATIO
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Total Supply Voltage (V + to V –) .............................. 36V
Differential Input Voltage ......................................... ±6V
Input Voltage ............................................................±VS
Output Short Circuit Duration (Note 1) ............ Indefinite
Operating Temperature Range
LT1225C ................................................ 0°C to 70°C
Maximum Junction Temperature
Plastic Package .............................................. 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
ELECTRICAL CHARACTERISTICS
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RATI GS
W
AXI U
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ABSOLUTE
ORDER PART
NUMBER
TOP VIEW
NULL
1
8
NULL
–IN
2
7
V+
+IN
3
6
OUT
V–
4
5
NC
LT1225CN8
LT1225CS8
N8 PACKAGE
S8 PACKAGE
8-LEAD PLASTIC DIP 8-LEAD PLASTIC SOIC
S8 PART MARKING
1225
LT1225 PO01
TJ MAX = 15O°C, θJA = 130°C/ W (N8)
TJ MAX = 15O°C, θJA = 220°C/ W (S8)
VS = ±15V, TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 2)
IOS
Input Offset Current
IB
Input Bias Current
en
Input Noise Voltage
f = 10kHz
in
Input Noise Current
f = 10kHz
RIN
Input Resistance
VCM = ±12V
Differential
CIN
Input Capacitance
Input Voltage Range +
MIN
TYP
MAX
UNITS
0.5
1.0
mV
100
400
nA
4
8
µA
7.5
nV/√Hz
1.5
pA/√Hz
24
40
70
MΩ
kΩ
2
pF
12
14
V
Input Voltage Range –
–13
–12
V
CMRR
Common-Mode Rejection Ratio
VCM = ±12V
94
115
dB
PSRR
Power Supply Rejection Ratio
VS = ±5V to ±15V
86
95
dB
AVOL
Large Signal Voltage Gain
VOUT = ±10V, RL = 500Ω
12.5
20
V/mV
VOUT
Output Swing
RL = 500Ω
±12.0
±13.3
IOUT
Output Current
VOUT = ±12V
24
40
mA
SR
Slew Rate
(Note 3)
250
400
V/µs
Full Power Bandwidth
10V Peak, (Note 4)
6.4
MHz
GBW
Gain Bandwidth
f = 1MHz
150
MHz
tr, tf
Rise Time, Fall Time
AVCL = 5, 10% to 90%, 0.1V
7
Overshoot
AVCL = 5, 0.1V
20
%
Propagation Delay
50% VIN to 50% VOUT
7
ns
Settling Time
10V Step, 0.1%, AV = – 5
90
ns
Differential Gain
f = 3.58MHz, AV = 5, RL = 150Ω
1.0
%
Differential Phase
f = 3.58MHz, AV = 5, RL = 150Ω
1.7
Deg
RO
Output Resistance
AVCL = 5, f = 1MHz
4.5
IS
Supply Current
ts
2
7
V
ns
Ω
9
mA
LT1225
ELECTRICAL CHARACTERISTICS VS = ±5V, TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 2)
IOS
Input Offset Current
IB
Input Bias Current
MIN
Input Voltage Range +
TYP
MAX
UNITS
1.0
2.0
mV
100
400
nA
4
8
µA
2.5
4
Input Voltage Range –
V
–3
– 2.5
V
CMRR
Common-Mode Rejection Ratio
VCM = ±2.5V
94
115
dB
AVOL
Large-Signal Voltage Gain
VOUT = ±2.5V, RL = 500Ω
VOUT = ±2.5V, RL = 150Ω
10
15
13
V/mV
V/mV
VOUT
Output Voltage
RL = 500Ω
RL = 150Ω
±3.0
±3.0
±3.7
±3.3
IOUT
Output Current
VOUT = ±3V
20
40
mA
SR
Slew Rate
(Note 3)
250
V/µs
Full Power Bandwidth
3V Peak, (Note 4)
13.3
MHz
GBW
Gain Bandwidth
f = 1MHz
100
MHz
tr, tf
Rise Time, Fall Time
AVCL = 5, 10% to 90%, 0.1V
9
ns
Overshoot
AVCL = 5, 0.1V
10
%
Propagation Delay
50% VIN to 50% VOUT
9
ns
ts
Settling Time
– 2.5V to 2.5V, 0.1%, AV = – 4
70
IS
Supply Current
V
V
ns
7
ELECTRICAL CHARACTERISTICS
9
mA
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
VS = ±15V, (Note 2)
VS = ±5V, (Note 2)
MIN
Input VOS Drift
TYP
MAX
UNITS
0.5
1.0
1.5
2.5
mV
mV
µV/°C
10
IOS
Input Offset Current
VS = ±15V and VS = ± 5V
IB
Input Bias Current
CMRR
Common-Mode Rejection Ratio
VS = ±15V and VS = ± 5V
VS = ±15V, VCM = ±12V and VS = ± 5V, VCM = ± 2.5V
93
100
600
nA
4
9
µA
115
dB
PSRR
Power Supply Rejection Ratio
VS = ±5V to ±15V
85
95
AVOL
Large Signal Voltage Gain
VS = ±15V, VOUT = ±10V, RL = 500Ω
VS = ±5V, VOUT = ±2.5V, RL = 500Ω
10
8
12.5
10
V/mV
V/mV
VOUT
Output Swing
VS = ±15V, RL = 500Ω
VS = ±5V, RL = 500Ω or 150Ω
±12.0
±3.0
±13.3
±3.3
V
V
IOUT
Output Current
VS = ±15V, VOUT = ±12V
VS = ±5V, VOUT = ±3V
24
20
40
40
SR
Slew Rate
VS = ±15V, (Note 3)
250
400
IS
Supply Current
VS = ±15V and VS = ± 5V
Note 1: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 2: Input offset voltage is tested with automated test equipment
in <1 second.
7
dB
mA
mA
V/µs
10.5
mA
Note 3: Slew rate is measured between ±10V on an output swing of ±12V
on ±15V supplies, and ±2V on an output swing of ±3.5V on ±5V supplies.
Note 4: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πVp.
3
LT1225
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TYPICAL PERFOR A CE CHARACTERISTICS
Input Common-Mode Range vs
Supply Voltage
8.0
20
15
10
+VCM
–VCM
5
0
7.5
7.0
6.5
6.0
5
0
10
15
20
10
15
10
VS = ±5V
0
100
1k
4.5
3.5
–5
0
5
70
10
100
10
15
Output Short-Circuit Current vs
Temperature
55
VS = ±15V
I +I
IB = B+ B–
2
4.5
4.25
4.0
3.75
5
100
125
3.5
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
LT1225 TPC07
10k
LT1225 TPC06
OUTPUT SHORT-CIRCUIT CURRENT (mA)
INPUT BIAS CURRENT (µA)
6
1k
LOAD RESISTANCE (Ω)
Input Bias Current vs Temperature
4.75
75
VS = ±5V
LT1225 TPC05
9
50
80
50
–10
5.0
25
VS = ±15V
60
VS = ±15V
0
90
INPUT COMMON-MODE VOLTAGE (V)
10
SUPPLY CURRENT (mA)
LT1225 TPC03
Open-Loop Gain vs
Resistive Load
4.0
Supply Current vs Temperature
20
TA = 25°C
LT1225 TPC04
7
15
100
3.0
–15
10k
8
10
SUPPLY VOLTAGE (±V)
VS = ±15V
TA = 25°C
IB+ + IB–
IB =
2
LOAD RESISTANCE (Ω)
–25
5
0
OPEN-LOOP GAIN (dB)
INPUT BIAS CURRENT (µA)
OUTPUT VOLTAGE SWING (Vp-p)
15
4
–50
20
5.0
VS = ±15V
10
5
Input Bias Current vs Input
Common-Mode Voltage
TA = 25°C
∆VOS = 30mV
5
–VSW
LT1225 TPC02
Output Voltage Swing vs
Resistive Load
20
+VSW
10
SUPPLY VOLTAGE (±V)
LT1225 TPC01
25
15
0
5
0
SUPPLY VOLTAGE (±V)
30
TA = 25°C
RL = 500Ω
∆VOS = 30mV
TA = 25°C
OUTPUT VOLTAGE SWING (V)
TA = 25°C
∆VOS < 1mV
SUPPLY CURRENT (mA)
MAGNITUDE OF INPUT VOLTAGE (V)
20
4
Output Voltage Swing vs
Supply Voltage
Supply Current vs Supply Voltage
VS = ±5V
50
45
40
SOURCE
SINK
35
30
25
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
LT1225 TPC08
LT1225 TPC09
LT1225
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TYPICAL PERFOR A CE CHARACTERISTICS
Power Supply Rejection Ratio vs
Frequency
Input Noise Spectral Density
en
0.1
VS = ±15V
TA = 25°C
AV = 101
RS = 100k
1
100
10
1k
80
+PSRR
60
–PSRR
40
20
0.01
100k
10k
0
100
FREQUENCY (Hz)
10k
100k 1M
FREQUENCY (Hz)
Voltage Gain and Phase vs
Frequency
10
100
60
VS = ±15V
VS = ±5V
40
4
AV = 5
–2
–4
AV = –5
VS = ±15V
TA = 25°C
AV = 5
VS = ±15V
TA = 25°C
AV = –5
20
C = 100pF
18
C = 50pF
16
C = 0pF
14
12
10
C = 1000pF
C = 500pF
8
4
0
20
60
80
40
SETTLING TIME (ns)
100
Gain Bandwidth vs Temperature
Slew Rate vs Temperature
500
450
SLEW RATE (V/µs)
GAIN BANDWIDTH (MHz)
100M
FREQUENCY (Hz)
LT1225 TPC16
VS = ±15V
AV = –5
–SR
151
150
149
147
–50 –25
400
+SR
350
300
250
148
10M
100M
LT1225 TPC15
LTC1225 TPC14
152
0.1
10M
FREQUENCY (HZ)
1M
120
VS = ±15V
1
100M
10M
6
153
1M
100k
1M
FREQUENCY (Hz)
LTXXXX • TPCXX
AV = 5
–8
10M
10k
Frequency Response vs
Capacitive Load
0
–10
0
100M
100
OUTPUT IMPEDANCE (Ω)
1k
100M
2
Closed-Loop Output Impedance vs
Frequency
100k
20
22
LT1225 TPC13
0.01
10k
40
24
AV = –5
–6
20
20
OUTPUT SWING (V)
VS = ±5V
PHASE MARGIN (DEG)
VOLTAGE GAIN (dB)
6
80
80
10
10M
VS = ±15
TA = 25°C
10mV SETTLING
8
VS = ±15V
TA = 25°C
0
100
10k
100k 1M
1k
FREQUENCY (Hz)
60
Output Swing vs Settling Time
100
40
80
LT1225 TPC11
LT1225 TPC10
60
VS = ±15V
TA = 25°C
100
0
1k
VOLTAGE MAGNITUDE (dB)
10
COMMON MODE REJECTION RATIO (dB)
1.0
VS = ±15V
TA = 25°C
POWER SUPPLY REJECTION RATIO (dB)
INPUT VOLTAGE NOISE (nV/√Hz)
INPUT CURRENT NOISE (pA/√Hz)
in
100
120
100
10
1000
Common-Mode Rejection Ratio vs
Frequency
50
25
75
0
TEMPERATURE (˚C)
100
125
LT1225 TPC17
200
–50 –25
50
25
75
0
TEMPERATURE (˚C)
100
125
LT1225 TPC18
5
LT1225
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APPLICATI
S I FOR ATIO
The LT1225 may be inserted directly into HA2541, HA2544,
AD847, EL2020 and LM6361 applications, provided that
the amplifier configuration is a noise gain of 5 or greater,
and the nulling circuitry is removed. The suggested nulling
circuit for the LT1225 is shown below.
Small Signal, AV = 5
Small Signal, AV = – 5
Offset Nulling
V+
5k
0.1µF
LT1225 AI02
0.1µF
The large-signal response in both inverting and noninverting gain shows symmetrical slewing characteristics. Normally the noninverting response has a much faster rising
edge than falling edge due to the rapid change in input
common-mode voltage which affects the tail current of the
input differential pair. Slew enhancement circuitry has
been added to the LT1225 so that the noninverting slew
rate response is balanced.
1
3
+
8
7
LT1225
2
–
6
4
V–
LT1225 AI01
Layout and Passive Components
As with any high speed operational amplifier, care must be
taken in board layout in order to obtain maximum performance. Key layout issues include: use of a ground plane,
minimization of stray capacitance at the input pins, short
lead lengths, RF-quality bypass capacitors located close
to the device (typically 0.01µF to 0.1µF), and use of low
ESR bypass capacitors for high drive current applications
(typically 1µF to 10µF tantalum). Sockets should be
avoided when maximum frequency performance is
required, although low profile sockets can provide
reasonable performance up to 50MHz. For more details
see Design Note 50. Feedback resistor values greater than
5k are not recommended because a pole is formed with the
input capacitance which can cause peaking. If feedback
resistors greater than 5k are used, a parallel
capacitor of 5pF to 10pF should be used to cancel the input
pole and optimize dynamic performance.
Transient Response
The LT1225 gain-bandwidth is 150MHz when measured at
1MHz. The actual frequency response in gain of 5 is
considerably higher than 30MHz due to peaking caused by
a second pole beyond the gain of 5 crossover point. This
is reflected in the small-signal transient response. Higher
noise gain configurations exhibit less overshoot as seen in
the inverting gain of 5 response.
6
Large Signal, AV = 5
Large Signal, AV = – 5
LT1225 AI03
Input Considerations
Resistors in series with the inputs are recommended for
the LT1225 in applications where the differential input
voltage exceeds ±6V continuously or on a transient basis.
An example would be in noninverting configurations with
high input slew rates or when driving heavy capacitive
loads. The use of balanced source resistance at each input
is recommended for applications where DC accuracy must
be maximized.
Capacitive Loading
The LT1225 is stable with all capacitive loads. This is
accomplished by sensing the load induced output pole and
adding compensation at the amplifier gain node. As the
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
LT1225
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APPLICATI
S I FOR ATIO
domain and in the transient response. The photo of the
small-signal response with 1000pF load shows 50% peaking. The large-signal response with a 10,000pF load shows
the output slew rate being limited by the short-circuit
current.
AV = 5, CL = 10,000pF
AV = – 5, CL = 1000pF
LT1225 AI04
The LT1225 can drive coaxial cable directly, but for best
pulse fidelity the cable should be doubly terminated with
a resistor in series with the output.
Compensation
The LT1225 has a typical gain-bandwidth product of
150MHz which allows it to have wide bandwidth in high
gain configurations (i.e., in a gain of 10 it will have a
bandwidth of about 15MHz). The amplifier is stable in a
noise gain of 5 so the ratio of the output signal to the
inverting input must be 1/5 or less. Straightforward gain
configurations of 5 or –4 are stable, but there are a few
configurations that allow the amplifier to be stable for
lower signal gains (the noise gain, however, remains 5 or
more). One example is the summing amplifier shown in
the typical applications section below. Each input signal
has a gain of –RF/RIN to the output, but it is easily seen that
this configuration is equivalent to a gain of –4 as far as the
amplifier is concerned. Lag compensation can also be
used to give a low frequency gain less than 5 with a high
frequency gain of 5 or greater. The example below has a
DC gain of one, but an AC gain of 5. The break frequency
of the RC combination across the amplifier inputs should
be approximately a factor of 10 less than the gain bandwidth of the amplifier divided by the high frequency gain
(in this case 1/10 of 150MHz/5 or 3MHz).
UO
TYPICAL APPLICATI
S
Cable Driving
Lag Compensation
+
VIN
500Ω
75Ω CABLE
LT1225
+
VIN
R3
75 Ω
LT1225
VOUT
–
VOUT
R4
75Ω
R1
1k
–
100pF
2k
LT1225 TA03
AV = 1, f < 3MHz
R2
250Ω
LT1225 TA04
Wein Bridge Oscillator
Summing Amplifier
430Ω
#327
LAMP
RF
–
1.5k
100pF
RIN
LT1225
VOUT
>10VP-P
1MHz
+
100pF
VIN1
–
RIN
VIN2
LT1225
VOUT
+
RIN
VINn
1.5k
LT1225 TA05
RIN =
nRF
4
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
LT1225 TA06
7
LT1225
W
W
SI PLIFIED SCHE ATIC
V+
7
NULL
1
8
BIAS 1
3
+IN
2 –IN
BIAS 2
6
V–
OUT
4
LT1224 • TA10
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead Plastic DIP
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
8
7
+0.025
0.325 –0.015
+0.635
8.255
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.125
(3.175)
MIN
0.020
(0.508)
MIN
1
2
0.010 – 0.020
× 45°
(0.254 – 0.508)
N8 0392
0.189 – 0.197
(4.801 – 5.004)
8
0.053 – 0.069
(1.346 – 1.752)
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
BSC
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157
(3.810 – 3.988)
1
8
4
3
0.018 ± 0.003
(0.457 ± 0.076)
S8 Package
8-Lead Plastic SOIC
0°– 8° TYP
5
0.250 ± 0.010
(6.350 ± 0.254)
0.045 ± 0.015
(1.143 ± 0.381)
)
0.016 – 0.050
0.406 – 1.270
6
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
(
0.400
(10.160)
MAX
Linear Technology Corporation
2
3
4
SO8 0392
LT/GP 1092 5K REV A
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1992