Richtek LMK316BJ476MM 5a, 24v, 570khz step-down converter Datasheet

®
RT8251
5A, 24V, 570kHz Step-Down Converter
General Description
Features
The RT8251 is a monolithic step-down switch mode
converter with a built-in internal power MOSFET. It achieves
5A continuous output current over a wide input supply
range with excellent load and line regulation. Current mode
operation provides fast transient response and eases loop
stabilization.
z
Wide Operating Input Voltage Range : 4.75V to 24V
z
Adjustable Output Voltage Range : 0.8V to 15V
Output Current up to 5A
25μ
μA Low Shutdown Current
Internal Power MOSFET : 70mΩ
Ω
The RT8251 provides protection functions such as
cycle-by-cycle current limiting and thermal shutdown. In
shutdown mode, the regulator draws 25μA of supply
current. Programmable soft-start minimizes the inrush
supply current and the output overshoot at initial startup.
The RT8251 requires a minimum number of external
components. The RT8251 is available in WQFN-16L 3x3
and SOP-8 (Exposed Pad) packages.
z
z
z
z
z
z
z
z
z
Applications
z
z
Pin Configurations
z
z
VIN
VIN
SW
SW
(TOP VIEW)
12
1
2
Package Type
QW : WQFN-16L 3x3 (W-Type)
SP : SOP-8 (Exposed Pad-Option 1)
SW
SW
9 BOOT
4
7
8
Lead Plating System
G : Green (Halogen Free and Pb Free)
FB
COMP
EN
SS
6
RT8251
10
17
5
SW
11
GND
3
Distributed Power Systems
Battery Charger
DSL Modems
Pre-regulator for Linear Regulators
Ordering Information
16 15 14 13
VIN
VIN
VIN
GND
High Efficiency up to 95%
570kHz Fixed Switching Frequency
Stable with Low ESR Output Ceramic Capacitors
Thermal Shutdown Protection
Cycle-By-Cycle Over Current Protection
RoHS Compliant and Halogen Free
Note :
Richtek products are :
WQFN-16L 3x3
`
BOOT
VIN
2
SW
3
GND
4
GND
8
SS
7
EN
6
COMP
5
FB
9
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
SOP-8 (Exposed Pad)
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RT8251
Marking Information
RT8251GQW
RT8251GSP
GE= : Product Code
RT8251GSP : Product Number
RT8251
GSPYMDNN
YMDNN : Date Code
GE=YM
DNN
YMDNN : Date Code
Typical Application Circuit
1, 2, 3,
15, 16
VIN
4.75V to 24V
VIN
CIN
10µF x 2
BOOT
RT8251
7 EN
8 SS
Chip Enable
CSS
10nF
4,
Exposed Pad (17)
9
SW 10 to 14
FB 5
GND
CBOOT
L
100nF 4.7µH
COMP
D
B540C
CC
2.2nF
6
VOUT
3.3V/5A
R1
30.9k
RC
22k
COUT
22µF x 2
R2
10k
CP
(Open)
Figure 1. Typical Application Circuit for WQFN-16L 3x3
2
VIN
4.75V to 24V
CIN
10µF x 2
Chip Enable
BOOT
VIN
RT8251
7 EN
CSS
10nF
8 SS
4,
Exposed Pad(9)
GND
SW
1
3
CBOOT
100nF
D
B540C
L
4.7µH
R1
30.9k
FB 5
COMP
6
CC
2.2nF
RC
22k
VOUT
3.3V/5A
COUT
22µF x 2
R2
10k
CP
NC
Figure 2. Typical Application Circuit for SOP-8 (Exposed Pad)
Table 1. Recommended Component Selection
V OUT (V)
R1 (kΩ)
R2 (kΩ)
RC (kΩ)
CC (nF)
L1 (μH)
COUT (μF)
15
182
10
51
1
22
44
10
8
115
91
10
10
43
39
1.2
1.5
10
10
44
44
5
3.3
2.5
1.8
1.2
52.3
30.9
21.5
12.4
4.99
10
10
10
10
10
30
22
16
13
13
1.5
2.2
2.2
2.2
2.2
6.8
4.7
4.7
2.2
2.2
44
44
44
44
44
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is a registered trademark of Richtek Technology Corporation.
DS8251-04 February 2013
RT8251
Functional Pin Description
Pin No.
WQFN-16L 3x3
Pin Name
SOP-8
(Exposed Pad)
1, 2, 3, 15, 16
2
VIN
4,
4,
GND
17 (Exposed Pad) 9 (Exposed Pad)
5
5
FB
6
6
COMP
7
7
EN
8
8
SS
9
1
BOOT
10, 11, 12, 13,
14
3
SW
Pin Function
Power Input. VIN supplies the power to the IC, as well as the
step-down converter switches. Connect VIN with a 4.75V to 24V
power source. Connect VIN to GND with a capacitor that the
capacitance is large enough to eliminate noise on the input to the
IC.
Ground. This pin is the voltage reference for the regulated output
voltage. For this reason, care must be taken in its layout. This
node should be placed outside of the D1 to CIN ground path to
prevent switching current spikes from inducing voltage noise into
the part. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
Feedback Input. An external resistor divider from the output to
GND, tapped to the FB pin, sets the output voltage.
Compensation Node. This node is the output of the
transconductance error amplifier and the input to the current
comparator. Frequency compensation is done at this node by
connecting a series R-C to ground.
Enable Input. EN is a digital input that turns the regulator on or
off. Drive EN higher than 1.4V to turn on the regulator, lower
than 0.4V to turn it off. For automatic startup, leave EN
unconnected.
Soft-Start Control Input. SS controls the soft start period.
Connect a capacitor (≧10nF) from SS to GND to set the
soft-start period. A 10nF capacitor sets the Soft-Start period to
1ms.
Bootstrap. This capacitor C BOOT is needed to drive the power
switch’s gate above the supply voltage. It is connected between
the SW and BS pins to form a floating supply across the power
switch driver. The voltage across CBOOT is about 5V and is
supplied by the internal +5V supply when the SW pin voltage is
low.
Power Switching Output. SW is the switching node that supplies
power to the output. Connect the output LC filter from SW to the
output load. Note that a capacitor is required from SW to BOOT
to power the high-side switch.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8251-04 February 2013
is a registered trademark of Richtek Technology Corporation.
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RT8251
Function Block Diagram
VIN
VCC
Internal
Regulator
Current Sense
Slope Comp Amplifier
+
Oscillator
570kHz
1µA
EN
VA VCC
10k
Foldback
Control
1.1V
3V
+
Shutdown
Comparator
0.4V
BOOT
+
UV
Comparator
VCC
+
Current
Comparator
10µA
SS
z
z
z
z
z
z
z
z
z
z
z
GND
COMP
(Note 1)
Supply Voltage, VIN ------------------------------------------------------------------------------------------ −0.3V to 26V
Switching Voltage, VSW ------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
BOOT Voltage, VBOOT --------------------------------------------------------------------------------------- (VSW − 0.3V) to (VSW + 6V)
All Other Pins ------------------------------------------------------------------------------------------------- −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
WQFN-16L 3x3 ----------------------------------------------------------------------------------------------- 1.471W
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------- 1.333W
Package Thermal Resistance (Note 2)
WQFN-16L 3x3, θJA ------------------------------------------------------------------------------------------ 68°C/W
WQFN-16L 3x3, θJC ----------------------------------------------------------------------------------------- 7.5°C/W
SOP-8 (Exposed pad), θJA --------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------- 15°C/W
Junction Temperature ---------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260°C
Storage Temperature Range ------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) --------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
z
SW
+
+EA
Gm = 820µA/V
Absolute Maximum Ratings
z
Logic
0.8V
FB
z
VA
-
(Note 4)
Supply Voltage, VIN ------------------------------------------------------------------------------------------ 4.75V to 24V
Enable Voltage, VEN ----------------------------------------------------------------------------------------- 0V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C
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RT8251
Electrical Characteristics
(VIN = 12V, TA = 25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
4.75V ≦ VIN ≦ 24V
Min
Typ
Max
Unit
0.784
0.8
0.816
V
Feedback Reference Voltage
VFB
High-Side Switch-On Resistance
RDS(ON)1
--
70
--
mΩ
Low-Side Switch-On Resistance
RDS(ON)2
--
15
--
Ω
VEN = 0V, VSW = 0V
--
--
10
μA
High-Side Switch Leakage
Current Limit
ILIM
Duty = 85%; VBOOT−SW = 4.8V
--
6.8
--
A
Current Sense Transconductance
GCS
Output Current to VCOMP
--
4.6
--
A/V
Error Amplifier Tansconductance
gm
ΔIC = ±10μA
--
920
--
μA/V
Oscillator Frequency
fSW
420
570
720
kHz
VFB = 0V
--
185
--
kHz
VFB = 0.7V
--
85
--
%
--
100
--
ns
UVLO Threshold Rising
--
4.1
--
V
UVLO Threshold Hysteresis
--
200
--
mV
Short Circuit Oscillation Frequency
Maximum Duty Cycle
DMAX
Minimum On-Time
tON
EN Input Voltage
Logic Low
VIL
--
--
0.4
Logic High
VIH
1.4
--
5.5
VEN = 0V
--
1
--
Enable Pull Up Current
V
μA
Shutdown Current
ISHDN
VEN = 0V
--
25
--
μA
Quiescent Current
IQ
VEN = 2V, VFB = 1V
--
0.8
1
mA
Soft-Start Current
ISS
VSS = 0V
--
10
--
μA
CSS = 10nF
--
1
--
ms
--
150
--
°C
Soft-Start Period
Thermal Shutdown
TSD
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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RT8251
Typical Operating Characteristics
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
VIN = 12V
90
VIN = 24V
80
VIN = 24V
70
Efficiency(%)
Efficiency (%)
80
VIN = 12V
90
60
50
40
30
70
60
50
40
30
20
20
10
10
VOUT = 3.3V
0
VOUT = 5V
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
Load Current (A)
1
VIN = 12V
VIN = 5V
0.5
0
-0.5
-1
-1.5
0.1
1
1.5
4.5
5
IOUT = 3A
IOUT = 0A
1
0.5
0
-0.5
-1
-1.5
-2
4
10
6.5
9
11.5
14
16.5
19
21.5
24
Input Voltage (V)
Load Current (A)
Quiescent Current vs. Temperature
Reference Voltage vs. Temperature
1.2
0.816
1
0.811
Reference Voltage (V)
Quiescent Current (mA)
4
VOUT = 3.3V
VOUT = 3.3V
0.01
3.5
IOUT = 5A
VIN = 24V
-2
0.001
3
Output Voltage Deviation vs. Input Voltage
2
Output Voltage Deviation (%)1
Output Voltage Deviation (%)1
1.5
2.5
Load Current (A)
Output Voltag Deviation vs. Load Current
2
2
0.8
0.6
0.4
0.2
0.806
0.801
0.796
0.791
VIN = 12V
VIN = 12V
0.786
0
-50
-25
0
25
50
75
100
Temperature (°C)
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125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8251
Switching Frequency vs. Temperature
Switching Frequency vs. Input Voltage
630
Switching Frequenc (kHz)1 11
Switcing Frequency (kHz)1
610
600
590
580
570
560
VOUT = 3.3V, IOUT = 1A
550
4
6.5
9
11.5
14
16.5
19
21.5
24
610
590
VIN = 12V
570
550
VIN = 24V
530
VOUT = 3.3V, IOUT = 1A
510
-50
Input Voltage (V)
-25
0
25
50
75
100
125
Temperature (°C)
Output Ripple
Current Limit vs. Duty Cycle
9.3
VOUT
(10mV/Div)
Peak Current (A)
8.7
8.1
VSW
(10V/Div)
7.5
6.9
6.3
VIN = 12V
VOUT = 3.3V
IOUT = 5A
I SW
(2A/Div)
5.7
0
10
20
30
40
50
60
70
80
90
100
Time (1μs/Div)
Duty Cycle (%)
Load Transient Response
Load Transient Response
VIN = 12V, VOUT = 3.3V
IOUT = 0A to 5A
VIN = 12V, VOUT = 3.3V
IOUT = 2.5A to 5A
VOUT
(200mV/Div)
VOUT
(200mV/Div)
IOUT
(2A/Div)
IOUT
(2A/Div)
Time (100μs/Div)
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Time (100μs/Div)
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RT8251
Power On from EN
Power Off from EN
VEN
(5V/Div)
VEN
(5V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 5A
Time (250μs/Div)
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VIN = 12V, VOUT = 3.3V, IOUT = 5A
Time (25μs/Div)
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RT8251
Application Information
The RT8251 is an asynchronous high voltage buck
converter that can support the input voltage range from
4.75V to 24V and the output current can be up to 5A.
Output Voltage Setting
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 3.
Soft-Start
The RT8251 contains an external soft-start clamp that
gradually raises the output voltage. The soft-start timming
can be set by the external capacitor between SS pin and
GND. The chip provides a 10μA charge current for the
external capacitor. If 10nF capacitor is used to set the
soft-start time, its period will be 1ms (typ.).
VOUT
Chip Enable Operation
R1
FB
RT8251
R2
GND
Figure 3. Output Voltage Setting
The output voltage is set by an external resistive divider
according to the following equation :
VOUT = VFB ⎛⎜ 1+ R1 ⎞⎟
⎝ R2 ⎠
Where VFB is the feedback reference voltage (0.8V typ.).
External Bootstrap Diode
Connect a 100nF low ESR ceramic capacitor between
the BOOT pin and SW pin. This capacitor provides the
gate driver voltage for the high side MOSFET.
It is recommended to add an external bootstrap diode
between an external 5V and the BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
cycle is higher than 65%. The bootstrap diode can be a
low cost one such as 1N4148 or BAT54.
The external 5V can be a 5V fixed input from system or a
5V output of the RT8251.
5V
BOOT
RT8251
100nF
SW
Figure 4. External Bootstrap Diode
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DS8251-04 February 2013
The EN pin is the chip enable input. Pull the EN pin low
(<0.4V) will shutdown the device. During shutdown mode,
the RT8251 quiescent current drops to lower than 25μA.
Drive the EN pin to high ( >1.4V, < 5.5V) will turn on the
device again. If the EN pin is open, it will be pulled to high
by internal circuit. For external timing control (e.g.RC),
the EN pin can also be externally pulled to High by adding
a100kΩ or greater resistor from the VIN pin (see Figure 5).
Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
V
V
ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥
VIN ⎦
⎣ f ×L ⎦ ⎣
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
highest efficiency operation. However, it requires a large
inductor to achieve this goal.
For the ripple current selection, the value of ΔIL = 0.24(IMAX)
will be a reasonable starting point. The largest ripple current
occurs at the highest VIN. To guarantee that the ripple
current stays below the specified maximum, the inductor
value should be chosen according to the following
equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L =⎢
⎥ × ⎢1 −
⎥
⎣ f × ΔIL(MAX) ⎦ ⎣ VIN(MAX) ⎦
The inductor 's current rating (caused a 40°C temperature
rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
see Table 2 for the inductor selection reference.
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RT8251
Table 2. Suggested Inductors for Typical
Application Circuit
Component
Supplier
Series
Dimensions (mm)
TDK
SLF10165
10.1x10.1x7
TAIYO YUDEN
TDK
NR10050
VLF12060
10x9.8x5
12x11.7x6
Diode Selection
When the power switch turns off, the path for the current
is through the diode connected between the switch output
and ground. This forward biased diode must have a
minimum voltage drop and recovery times. Schottky diode
is recommended and it should be able to handle those
current. The reverse voltage rating of the diode should be
greater than the maximum input voltage, and current rating
should be greater than the maximum load current. For
more detail please refer to Table 4.
CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
V
VIN
IRMS = IOUT(MAX) OUT
−1
VIN
VOUT
This formula has a maximum at VIN = 2VOUT, where
I RMS = I OUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
For the input capacitor, two 10μF low ESR ceramic
capacitors are recommended. For the recommended
capacitor, please refer to table 3 for more detail.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
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The output ripple, ΔVOUT , is determined by :
1
⎤
ΔVOUT ≤ ΔIL ⎡⎢ESR +
8fC
OUT ⎥⎦
⎣
The output ripple will be highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR value.
However, it provides lower capacitance density than other
types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedback error signal for the regulator
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DS8251-04 February 2013
RT8251
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
snubber between SW and GND and make them as close
as possible to the SW pin (see Figure 5). Another method
is to add a resistor in series with the bootstrap capacitor,
CBOOT. But this method will decrease the driving capability
to the high-side MOSFET. It is strongly recommended to
reserve the R-C snubber during PCB layout for EMI
improvement. Moreover, reducing the SW trace area and
keeping the main power in a small loop will be helpful on
EMI performance. For detailed PCB layout guide, please
refer to the section of Layout Consideration.
EMI Consideration
Since parasitic inductance and capacitance effects in PCB
circuitry would cause a spike voltage on the SW pin when
high-side MOSFET is turned-on/off, this spike voltage on
SW may impact on EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One is to place an R-C
2
VIN
4.75V to 24V
REN*
Chip Enable
CIN
10µF x 2
BOOT
VIN
1
RBOOT*
CBOOT
L
100nF 4.7µH
RT8251
SW 3
7 EN
CS*
8 SS
CSS
4,
10nF Exposed Pad(9)
GND
D
B540C
RS*
CEN*
VOUT
3.3V/5A
R1
30.9k
COUT
22µF x 2
FB 5
COMP
* : Optional
6
CC
2.2nF
RC
22k
R2
10k
CP
NC
Figure 5. Reference Circuit with Snubber and Enable Timing Control
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature , TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8251, the maximum junction temperature is 125°C. The
junction to ambient thermal resistance θJA is layout
dependent. For PSOP-8 and WQFN packages, the thermal
resistance θJA are 75°C/W and 68°C/W on the standard
JEDEC 51-7 four-layers thermal test board. The maximum
power dissipation at TA = 25°C can be calculated by
following formula :
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS8251-04 February 2013
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for
PSOP-8
PD(MAX) = (125°C − 25°C) / (68°C/W) = 1.471W for
WQFN
(min.copper area PCB layout)
P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W for
PSOP-8 (70mm2copper area PCB layout)
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance θJA can be decreased by
adding copper area under the exposed pad of SOP-8
(Exposed Pad) package.
As shown in Figure 6, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
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11
RT8251
SOP-8 (Exposed Pad) pad (Figure 6a), θJA is 75°C/W.
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 6.b) reduces the θJA to 64°C/W. Even further,
increasing the copper area of pad to 70mm2 (Figure 6.e)
reduces the θJA to 49°C/W.
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT8251 packages, the derating curves
in Figure 7 and Figure 8 allow the designer to see the
effect of rising ambient temperature on the maximum power
dissipation allowed.
2.2
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
Four Layer PCB
Power Dissipation (W)
2.0
1.8
Copper Area
70mm2
50mm2
30mm2
10mm2
Min.Layout
1.6
1.4
1.2
1.0
0.8
(b) Copper Area = 10mm2, θJA = 64°C/W
0.6
0.4
0.2
0.0
0
25
50
75
100
125
(c) Copper Area = 30mm2 , θJA = 54°C/W
Ambient Temperature (°C)
Figure 7. Derating Curves for PSOP-8 Package
Maximum Power Dissipation (W)1
1.6
Four Layer PCB
1.4
1.2
(d) Copper Area = 50mm2 , θJA = 51°C/W
1.0
WQFN-16L 3x3
0.8
0.6
0.4
0.2
0.0
0
15
30
45
60
75
90
105
120
Ambient Temperature (°C)
Figure 8. Derating Curves for WQFN Package
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12
135
(e) Copper Area = 70mm2 , θJA = 49°C/W
Figure 6. Themal Resistance vs. Copper Area Layout
Design
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DS8251-04 February 2013
RT8251
Layout Consideration
` Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8251.
Follow the PCB layout guidelines for optimal performance
of the RT8251.
`
Keep the traces of the main current paths as short and
wide as possible.
`
Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
`
Examples of PCB layout guide are shown in Figure 9
and Figure 10 for reference.
` Put the input capacitor as close as possible to the device
pins (VIN and GND).
` LX node is with high frequency voltage swing and should
be kept at small area. Keep analog components away
from the LX node to prevent stray capacitive noise pickup.
Input capacitor must be placed
as close as to the IC as possible.
COUT
GND
CIN
CS
D
RS
VIN
VIN
SW
SW
L
VOUT
16 15 14 13
R1
SW
SW should be connected
SW
GND
to inductor by Wide and
10 SW
17
short trace. Keep sensitive
C
BOOT
9 BOOT
components away from
this trace.
5 6 7 8
12
1
11
2
3
4
FB
COMP
EN
SS
VIN
VIN
VIN
GND
R2
VOUT
RC
CSS
CP
CC
GND
The feedback components must be connected
as close to the device as possible.
Figure 9. PCB Layout Guide for WQFN Package
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DS8251-04 February 2013
is a registered trademark of Richtek Technology Corporation.
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13
RT8251
VIN
GND
The feedback components
must be connected as close
to the device as possible.
SW GND
CBOOT
Input capacitor must
be placed as close
to the IC as possible.
CIN
BOOT
D
CS
COUT
CSS
RS
VIN
2
SW
3
GND
4
GND
CC
8
SS
7
EN
6
COMP
5
FB
9
CP
R1
R2
L
RC
VOUT
VOUT
GND
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
Figure 10. PCB Layout Guide for PSOP-8 Package
Table 3. Suggested Capacitors for CIN and COUT
Location
Component Supplier
Part No.
Capacitance (μF)
Case Size
CIN
MURATA
GRM31ER61E226K
22
1210
CIN
TDK
C4535X5R1E226M
22
1812
CIN
TAIYO YUDEN
TMK325BJ226MM
22
1210
COUT
MURATA
GRM32ER61C476M
47
1210
COUT
MURATA
GRM31CR60J476M
47
1206
COUT
TDK
C3216X5R0J476M
47
1206
COUT
TAIYO YUDEN
LMK316BJ476MM
47
1206
Table 4. Suggested Diode
Component Supplier
Part No.
V RRM (V)
I OUT (A)
Package
DIODES
B540C
40
5
SMC
ON
MBRS540T3
40
5
SMC
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14
is a registered trademark of Richtek Technology Corporation.
DS8251-04 February 2013
RT8251
Outline Dimension
D
SEE DETAIL A
D2
L
1
E
E2
b
e
A
A1
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A3
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
1.300
1.750
0.051
0.069
E
2.950
3.050
0.116
0.120
E2
1.300
1.750
0.051
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 16L QFN 3x3 Package
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DS8251-04 February 2013
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15
RT8251
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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DS8251-04 February 2013