PHILIPS HEF4519BN Quadruple 2-input multiplexer Datasheet

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4519B
MSI
Quadruple 2-input multiplexer
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors
Product specification
HEF4519B
MSI
Quadruple 2-input multiplexer
When SA and SB are LOW, the output (On) is LOW,
independent of the multiplexer inputs (An and Bn).
DESCRIPTION
The HEF4519B provides four multiplexing circuits with
common select inputs (SA, SB); each circuit contains two
inputs (An, Bn) and one output (On). It may be used to
select four bits of information from one of two sources.
The HEF4519B cannot be used to multiplex analogue
signals. The outputs utilize standard buffers for best
performance.
The ‘A’ inputs are selected when SA is HIGH, the ‘B’ inputs
when SB is HIGH. When SA and SB are HIGH, the output
(On) is the logical EXCLUSIVE-NOR of the An and
Bn inputs (On = An
Bn).
Fig.1 Functional diagram.
PINNING
SA, SB
selects inputs (active HIGH)
A0 to A3
multiplexer inputs
Bo to B3
multiplexer inputs
O0 to O3
multiplexer outputs
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
Fig.2 Pinning diagram.
HEF4519BP(N):
16-lead DIL; plastic (SOT38-1)
HEF4519BD(F):
16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4519BT(D):
16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
January 1995
2
Philips Semiconductors
Product specification
HEF4519B
MSI
Quadruple 2-input multiplexer
Fig.3 Logic diagram.
FUNCTION TABLE
INPUTS
OUTPUT
SA
SB
An
Bn
On
L
L
X
X
L
H
L
An
X
An
L
H
X
Bn
Bn
H
H
L
L
H
H
H
H
L
L
H
H
L
H
L
H
H
H
H
H
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
January 1995
3
Philips Semiconductors
Product specification
HEF4519B
MSI
Quadruple 2-input multiplexer
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
An , Bn → On
HIGH to LOW
5
10
tPHL
15
5
LOW to HIGH
10
tPLH
15
SA, SB → On
HIGH to LOW
5
10
tPHL
15
5
LOW to HIGH
10
tPLH
15
Output transition times
HIGH to LOW
LOW to HIGH
5
package (P)
ns
68 ns + (0,55 ns/pF) CL
80
ns
29 ns + (0,23 ns/pF) CL
30
60
ns
22 ns + (0,16 ns/pF) CL
80
160
ns
53 ns + (0,55 ns/pF) CL
40
80
ns
29 ns + (0,23 ns/pF) CL
30
60
ns
22 ns + (0,16 ns/pF) CL
95
190
ns
68 ns + (0,55 ns/pF) CL
40
80
ns
29 ns + (0,23 ns/pF) CL
30
55
ns
22 ns + (0,16 ns/pF) CL
85
165
ns
58 ns + (0,55 ns/pF) CL
40
80
ns
29 ns + (0,23 ns/pF) CL
30
60
ns
22 ns + (0,16 ns/pF) CL
10 ns + (1,0 ns/pF) CL
60
120
ns
60
ns
9 ns + (0,42 ns/pF) CL
15
20
40
ns
6 ns + (0,28 ns/pF) CL
5
60
120
ns
30
60
ns
9 ns + (0,42 ns/pF) CL
20
40
ns
6 ns + (0,28 ns/pF) CL
tTHL
10
tTLH
VDD
V
dissipation per
190
30
10
15
Dynamic power
95
40
10 ns + (1,0 ns/pF) CL
TYPICAL FORMULA FOR P (µW)
1000 fi + ∑ (foCL) × VDD2
where
10
6000 fi + ∑ (foCL) × VDD
2
fi = input freq. (MHz)
15
17 000 fi + ∑ (foCL) × VDD
2
fo = output freq. (MHz)
5
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
APPLICATION INFORMATION
Some examples of applications for the HEF4519B are:
• 2-input multiplexers.
• True/complement selectors.
January 1995
4
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