IS-1715ARH TM Data Sheet August 2000 Radiation Hardened Complementary Switch FET Driver File Number 4875 Features • Electrically Screened to SMD # 5962-00521 The Radiation Hardened IS1715ARH is a high speed, high current complementary power FET driver designed for use in synchronous rectification circuits. Soft switching transitions for the two output waveforms may be managed by setting the independently programmable delays. The delay pins can alternatively be configured for zero-voltage sensing to allow for precise switching control. TM • QML Qualified per MIL-PRF-38535 Requirements • Radiation Environment - Gamma Dose 3x105 RAD(Si) - Latch-up Immune • PWR Output Current (Source and sink) . . . . . . . 3A (peak) • AUX Output Current (Source and sink) . . . . . . . 3A (peak) • Low Operating Supply Current . . . . . . . . . . . . . 6mA (max) The IS-1715ARH has a single input, which is PWM and TTL compatible, and can run at frequencies up to 1MHz. The AUX output switches immediately at the rising edge of the INPUT, but waits for the T2 delay before responding to the falling edge. A logic low on the enable pin (ENBL) places both outputs into an active-low mode, and an under voltage lock-out (UVLO) function is set at 9V(max). • Wide Programmable Delay Range . . . . . . 100ns to 600ns Constructed with the Intersil dielectrically isolated Rad Hard Silicon Gate (RSG) process, these devices are immune to single event latch-up (SEL) and have been specifically designed to provide highly reliable performance in harsh radiation environments. Applications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-00521. A “hot-link” is provided on our homepage for downloading. http://www.intersil.com/spacedefense/space.htm • Configurable for Zero-Voltage Switching • Switching Frequency to 1MHz • Both Outputs Active-Low in Sleep Mode • 9V(max) Under Voltage Lock-out • Synchronous Rectification in Power Supplies Ordering Information ORDERING NUMBER INTERNAL MKT. NUMBER TEMP. RANGE (oC) 5962F0052101VXC IS9-1715ARH-Q -55 to 125 5962F0052101QXC IS9-1715ARH-8 -55 to 125 IS9-1715ARH/Proto IS9-1715ARH/Proto -55 to 125 Pinout IS9-1715ARH FLATPACK (CDFP4-F16) TOP VIEW NC 1 16 ENBL VCC 2 15 T1 PWR 3 14 INPUT VSS 4 13 VSS VSS 5 12 VSS AUX 6 11 T2 NC 7 10 VCC NC 8 9 NC 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000 IS-1715ARH Die Characteristics DIE DIMENSIONS: Backside Finish: 3559µm x 4420µm (129 mils x 174 mils) Thickness: 483µm ± 25.4µm (19 mils ± 1 mil) Silicon ASSEMBLY RELATED INFORMATION INTERFACE MATERIALS Substrate Potential: Glassivation Unbiased (DI) Type: Phosphorus Silicon Glass (PSG) Thickness: 8.0kÅ ± 1.0kÅ ADDITIONAL INFORMATION Worst Case Current Density: Top Metallization <2.0 x 105 A/cm2 Type: AlSiCu Thickness: 16.0kÅ ± 2kÅ Transistor Count: 222 Substrate: Radiation Hardened Silicon Gate, Dielectric Isolation Metallization Mask Layout IS-1715ARH VCC (10) (10) VCC VSS (13) (12) VSS INPUT (14) (11) T2 T1 (15) ENBL (16) VCC (2) (10) VCC PWR (3) (6) AUX VSS (4) (5) VSS VCC (2) (2) VCC NOTES: 1. All double sized pads should be double bonded. 2. All pin 2 and pin 10 VCC pads are bonded to VCC for power and noise considerations. (These are lead-frame connected in packaged devices.) All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com 2