August 2000 ML6518* 18 Line Hot-Insertable Active SCSI Terminator GENERAL DESCRIPTION FEATURES The ML6518 BiCMOS 18 line SCSI terminator provides active termination in SCSI systems using single-ended drivers and receivers. Active SCSI termination helps to effectively control analog transmission line effects such as ringing, noise, crosstalk, and ground bounce. In addition, the ML6518 provides support for hot insertability on the SCSI bus. ■ Fully monolithic IC solution providing active termination for 18 lines of the SCSI bus ■ Provides onboard support for hot-insertability on the SCSI bus Low dropout voltage (1V) linear regulator, trimmed for accurate termination current Low disconnect capacitance (typically < 5pF) Logic pin with active pull-up to disconnect terminator from the SCSI bus ■ The ML6518 provides a V-I characteristic optimized to minimize transmission line effects during both signal negation and assertion using a MOSFET-based architecture. The desired V-I characteristic is achieved by trimming one resistor in the control block. Internal clamping controls signal assertion transients and provides current sink capability to handle active negation driver overshoots above 2.85V. It provides a 2.85V reference through an internal low dropout (1V) linear regulator. ■ ■ ■ ■ ■ The ML6518 also provides a disconnect function which effectively removes the terminator from the SCSI bus. The disconnect mode capacitance is typically less than 5pF per line. Current limiting and thermal shutdown protection are also included. ■ Current sinking capability in excess of 8.3mA per line to handle active negation driver overshoots above 2.85V Negative clamping on all lines to handle signal assertion transients Regulator can source 400mA and sink 150mA while maintaining regulation Current limit and thermal shutdown protection *This Part Is End Of Life As Of August 1, 2000 BLOCK DIAGRAM TERMPWR VREF DISCNKT 2.85V LINEAR REGULATOR 1V DROPOUT 2.85V GND RTRIM VREF CONTROL BLOCK MOSFETs WITH IMAX = 24mA ... ... ... ... NCLAMP NCLAMP NCLAMP L1 L2 ... L18 18 TERMINATION LINES NCLAMP = Negative Clamp Circuit design patent pending. 1 ML6518 PIN CONFIGURATIONS ML6518 28-Pin SOIC (S28) ML6518 28-Pin SOIC (S28) ISENSE 1 28 GND H1 2 27 RREF H2 3 26 COS H3 4 25 BRAKE RSCS 5 24 FB 3 CT 6 23 FB 2 VREF 7 22 FB 1 VSPEED 8 21 CRAMP L1 9 20 VCO IN L2 10 19 CEN L3 11 18 FAULT ILIMIT 12 17 CRST VCO OUT 13 16 RVCO VDD 14 15 CVCO TOP VIEW ML6518 32-Pin TQFP (H32-7) XXX VCC VREF VOUT AGND DGND DGND 21 AGND VOUT 5 20 VOUT VREF 6 19 VREF VCC 7 18 VCC XXX 8 9 17 10 11 12 13 14 15 16 XXX XXX 22 4 VCC 3 AGND VREF DGND VOUT GAIN AGND 23 DGND 2 TOP VIEW 2 CLK IN GAIN GAIN 32 31 30 29 28 27 26 25 24 1 CLK IN CLK IN GAIN CLK IN ML6518 32-Pin TQFP (H32-7) ML6518 PIN DESCRIPTION TQFP PIN# SOIC PIN# 1 TQFP PIN# SOIC PIN# Signal termination for SCSI bus line 1 16 L2 Signal termination for SCSI bus line 2 27 L3 4 28 5 NAME FUNCTION 25 L1 2 26 3 NAME FUNCTION 11 L10 Signal termination for SCSI bus line 10 17 12 L11 Signal termination for SCSI bus line 11 Signal termination for SCSI bus line 3 18 13 L12 Signal termination for SCSI bus line 12 L4 Signal termination for SCSI bus line 4 19 14 L13 Signal termination for SCSI bus line 13 1 L5 Signal termination for SCSI bus line 5 20 15 L14 Signal termination for SCSI bus line 14 6 2 L6 Signal termination for SCSI bus line 6 21 16 L15 Signal termination for SCSI bus line 15 7 3 L7 Signal termination for SCSI bus line 7 22 17 L16 Signal termination for SCSI bus line 16 8 4 L8 Signal termination for SCSI bus line 8 23 18 L17 Signal termination for SCSI bus line 17 9 6 L9 Signal termination for SCSI bus line 9 24 19 L18 Signal termination for SCSI bus line 18 11–14, 7, 22, GND 27–30 23 15 8 Ground DISCNKT Terminator disconnect. Logic input to disconnect the terminator from the bus when the SCSI device no longer needs termination. DISCNKT has a 200ký internal pull-up resistor connected to TERMPWR for use with a mechanical switch 25, 26 31, 32 20, 21 TERMPWR Power should be connected to the SCSI TERMPWR line. A 22µF tantalum bypass capacitor is recommended as shown in the application diagram 24 VREF 2.85V VREF output. External decoupling with a 10µF tantalum in parallel with a 0.1µF ceramic capacitor is recommended as shown in the application diagram 3 ML6518 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Signal Line Voltage ...... GND – 0.3V to TERMPWR + 0.3V Regulator Output Current ................................... ±500mA TERMPWR Voltage .......................................... –0.3 to 7V Junction Temperature ............................................. 150°C Storage Temperature Range ...................... –65°C to 150°C Lead Temperature (Soldering 10 sec) .................... +260°C Thermal Resistance (qJA) SOIC Package .................................................. 75°C/W TQFP Package .................................................. 65°C/W OPERATING CONDITIONS Temperature Range ........................................ 0°C to 70°C TERMPWR Voltage Range ........................... 4.0V to 5.25V ELECTRICAL CHARACTERISTICS Unless otherwise specified, TERMPWR = 4V to 5.25V, TA = Operating Temperature Range (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS 5 7 mA L1-L18 = 0.2V, DISCNKT open 450 500 mA DISCNKT = 0V 75 100 µA 1.0 V Supply TERMPWR Supply Current Disconnect Mode Current L1-L18 open, DISCNKT open DISCNKT Input Low Voltage Input High Voltage TERMPWR –1.0 V Output Output High Voltage Each line measured with other 17 lines high 2.8 2.85 Output Current (Normal Mode) VOUT = 0.2V, each line measured with other 17 lines high 20 Hot Insertion Peak Current TERMPWR = 0V, VREF = 0V, Any or all signal lines = 2.85V Output Clamp Voltage IOUT = –30mA Sinking Current (per line) VOUT = 3.3V Output Capacitance (Micro Linear method) DISCNKT = 0V, 2VP-P 100kHz square wave biased at 1V applied to the output 4 5 pF Output Capacitance (X3T9.2/855D method) DISCNKT = 0V, 0.4VP-P 1MHz square wave biased at 0.5V applied to the output 6 7 pF 1 –150 10 2.9 V 24 mA 2 µA 150 mV 12 mA Regulator Output Voltage Sourcing 0-400mA 2.8 2.85 2.9 V Sinking 0-150mA 2.8 2.85 2.9 V Sinking Current VLINE = 3.5 240 300 mA Short Circuit Current VREF = 0V 300 mA VREF = 5V 600 mA L1–L18 = 0.2V 1.0 Dropout Voltage Thermal Shutdown Note 1: 4 Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions. 170 1.2 V °C ML6518 FUNCTIONAL DESCRIPTION SCSI terminators are used to decrease the transmission line effects of SCSI cable. Termination must be provided at the beginning and end of the SCSI bus to ensure that data errors due to reflections on the bus are eliminated. With the increasing use of higher data rates and cable lengths in SCSI subsystems, active termination has become necessary. Active termination also minimizes power dissipation and can be activated or deactivated under software control, thus eliminating the need for end user intervention. The V-I characteristics of popular SCSI termination schemes are shown in Figure 1. Theoretically, the desired V-I characteristics are the Boulay type for signal assertion (high to low) and the ideal type for signal negation (low to high). The ML6518 with its MOSFETbased nonlinear termination element provides the most optimum V-I characteristics for both signal assertion and negation. The ML6518 provides active termination for 18 signal lines, thus accommodating basic SCSI which requires 18 lines to be terminated. When used with the ML6599, wide SCSI, which requires 27, 36 or 45 lines to be terminated, can also be accommodated. The ML6518 integrates an accurate voltage reference (1V dropout voltage) and 18 MOSFET-based termination lines. A single internal resistor is trimmed to tune the V-I characteristic of the MOSFETs. The voltage reference circuit produces a precise 2.85V level and is capable of sourcing 24mA into each of the nine terminating lines when low (active). When the signal line is negated (driver turns off), the terminator pulls the signal line back to 2.85V. The regulator will source 400mA and sink 150mA while maintaining regulation of 2.85V. V The ML6518 SCSI terminator provides an active low control signal (DISCNKT) which has an internal 200ký pull-up resistor. The DISCNKT input isolates the ML6518 from the signal lines and effectively removes the terminator from the SCSI bus with a disconnect mode current of less than 100µA when pulled low. In addition, the ML6518 provides for negative clamping of signal transients and also supports current sink capability in excess of 8.3mA per signal line to handle active negation driver overshoot above 2.85V, a common occurrence with SCSI transceivers. Disconnect mode capacitance is a very critical parameter in SCSI systems. The ML6518 provides a capacitance contribution of only 5pF. HOT INSERTABILITY “Hot” insertion of a SCSI device refers to the act of plugging a SCSI device which is initially unpowered into a powered SCSI bus. The SCSI device subsequently draws power from the TERMPWR line during its startup routine and thereafter. “Hot” removal refers to the act of removing a powered SCSI device from a powered SCSI bus. A device which performs both tasks with no physical damage to itself or other devices on the bus, nor which alters the existing state of the bus by drawing excessive currents, is termed “hot-swappable.” The ML6518 hot-insertable SCSI terminator typically draws 1µA from any given output line (L1–L18) during a hot insertion/removal procedure, thereby protecting itself and preserving the state of the bus. The low insertion current is achieved by effectively shorting the gate to drain of the output PMOS device until the 2.85V reference (VREF) has powered up. A second PMOS in series with a Schottky diode is used as the shorting bypass device. After VREF reaches a sufficient level, the bypass device is turned off and the part operates normally. 3.7V 3.6V 3.3V 2.85V 2.7V 2.5V IDEAL ML6518 BOULAY 220/330 0.2V TERMINATOR (SINK) DRIVER (SOURCE) 12mA 8.5mA 7mA 24mA 17mA 14mA TERMINATOR (SOURCE) DRIVER (SINK) 20mA 40mA 24mA 48mA I Figure 1. V-1 Characteristics of Various SCSI Termination Schemes 5 ML6518 As outlined in Annex G of the ANSI SCSI-3 Parallel Interface Specification (X3T9.2/855D), “The SCSI bus termination shall be external to the device being inserted or removed.” In other words, any terminator connected to a device being hot inserted/removed should be inactive (accomplished by grounding the DISCNKT pin in the case of the ML6518). If the terminator being inserted/removed were in the active state, at some point in time the bus would be terminated by either 1 or 3 terminators. In either case, data integrity on the bus will be compromised. In a typical SCSI subsystem, the open collector driver in the SCSI transceiver pulls low when asserted. The termination resistance serves as the pull-up when negated. Figure 2 also shows a typical cable response to a pulse. The receiving end of the cable will exhibit a single time delay. When negated, the initial step will reach an intermediate level (VSTEP). With higher SCSI data rates, sampling could occur during this step portion. In order to get the most noise margin, the step needs to be as high as possible to prevent false triggering. For this reason the regulator voltage and the resistor defining the MOSFET characteristic are trimmed to ensure that the IO is as close as possible to the SCSI maximum current specification. VSTEP is defined as: Figure 2 gives an application diagram showing a typical SCSI bus configuration. To ensure proper operation, the TERMPWR pin must be connected to the SCSI TERMPOWER line. Each ML6518 requires parallel 0.1µF and 10µF capacitors connected between the VREF and GND pins and the TERMPOWER line needs a 10µF bypass capacitor at one node in the system. VSTEP = VOL + (IO ¥ ZO) where VOL is the driver output low voltage, IO is the current from the receiving terminator, and ZO is the characteristic impedance of the cable. In an 8-bit wide SCSI bus arrangement (“A” Cable), a single ML6518 would be needed at each end of the SCSI cable in order to terminate the 18 active signal lines. 16-bit wide SCSI would use one ML6518 and one ML6599, while 32-bit wide SCSI bus would require two ML6518s and one ML6599. This is a very important characteristic that the terminator helps to overcome by increasing the noise margin and boosting the step as high as possible. TERMPWR LINE ML6518 ML6518 10µF TERMPWR TERMPWR VREF VREF SCSI CABLE 0.1µF 10µF GND L18 DISCNKT DISCNKT ... L1 L2 L2 L1 SCSI XCVR GND . . . L18 ... SCSI XCVR ... SCSI XCVR 0.1µF 10µF VREG VREG VSTEP VOL tD tD LINE ASSERTED LINE NEGATED Figure 2. Application Diagram Showing Typical SCSI Bus Configuration with the ML6518 6 ML6518 PHYSICAL DIMENSIONS inches (millimeters) Package: H32-7 32-Pin (7 x 7 x 1mm) TQFP 0.354 BSC (9.00 BSC) 0º - 8º 0.276 BSC (7.00 BSC) 0.003 - 0.008 (0.09 - 0.20) 25 1 PIN 1 ID 0.276 BSC (7.00 BSC) 0.354 BSC (9.00 BSC) 0.018 - 0.030 (0.45 - 0.75) 17 9 0.032 BSC (0.8 BSC) SEATING PLANE 0.048 MAX (1.20 MAX) 0.012 - 0.018 (0.29 - 0.45) 0.037 - 0.041 (0.95 - 1.05) Package: S28 28-Pin SOIC 0.699 - 0.713 (17.75 - 18.11) 28 0.291 - 0.301 0.398 - 0.412 (7.39 - 7.65) (10.11 - 10.47) PIN 1 ID 1 0.024 - 0.034 (0.61 - 0.86) (4 PLACES) 0.050 BSC (1.27 BSC) 0.095 - 0.107 (2.41 - 2.72) 0º - 8º 0.090 - 0.094 (2.28 - 2.39) 0.012 - 0.020 (0.30 - 0.51) SEATING PLANE 0.005 - 0.013 (0.13 - 0.33) 0.022 - 0.042 (0.56 - 1.07) 0.009 - 0.013 (0.22 - 0.33) 7 ML6518 ORDERING INFORMATION PART NUMBER ML6518CH ML6518CS TEMPERATURE RANGE 0°C to 70°C 0°C to 70°C PACKAGE 32-pin TQFP (H32-7) (End Of Life) 28-pin SOIC (S28) (End Of Life) © Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946; 2619299. Other patents are pending. Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application. 8 2092 Concourse Drive San Jose, CA 95131 Tel: 408/433-5200 Fax: 408/432-0295 DS6518-01