19-2711; Rev 0; 1/03 KIT ATION EVALU E L B AVAILA Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN Features The MAX8530 provides microprocessor open-drain, active-low reset output to monitor OUT1, eliminating external components and adjustments. The MAX8530 asserts a 100ms (min) RESET signal when OUT1 drops below 87% of the nominal output voltage. The MAX8531 includes a reference bypass pin for low output noise (40µVRMS). Both devices include a logic-controlled shutdown input and are available in 6-bump UCSP and 6-pin thin QFN exposed pad packages. ♦ Guaranteed 200mA Output Current for OUT1 ♦ Guaranteed 150mA Output Current for OUT2 ♦ Low 100mV (typ) Dropout at 100mA Load for both LDOs ♦ Open-Drain, Active-Low 100ms (min) Reset Timer (MAX8530) ♦ Low 40µVRMS Output Noise (MAX8531) ♦ Low 130µA Operating Supply Current ♦ <1µA Shutdown Current ♦ Thermal-Overload and Short-Circuit Protection ♦ Output Current Limit ♦ Tiny Packages Available 1.16 x 1.57 x 0.6mm UCSP (3 x 2 Grid) 3mm x 3mm Thin QFN Ordering Information PART Applications Cellular and Cordless Phones TEMP RANGE OUT_ PINVOLTAGE PACKAGE MAX8530EBTxy* -40°C to +85°C 1.5V to 3.3V 6 UCSP MAX8530ETTxy* -40°C to +85°C 1.5V to 3.3V 6 Thin QFN-EP** PDAs and Palmtop Computers MAX8531EBTxy* -40°C to +85°C 1.5V to 3.3V 6 UCSP Notebook Computers MAX8531ETTxy* -40°C to +85°C 1.5V to 3.3V 6 Thin QFN-EP Digital Cameras *xy = Output voltage code (see the Output Voltage Selector Guide). **EP = Exposed pad. PCMCIA Cards Wireless LAN Cards Pin Configurations appear at end of data sheet. Hand-Held Instruments Output Voltage Selector Guide appears at end of data sheet. Typical Operating Circuit INPUT 2.5V TO 6.5V 1.5V TO 3.3V AT 200mA IN VI/O OUT1 CIN 2.2µF 2.2µF BASEBAND µP MAX8530 RESET RESET ON SHDN VCORE OUT2 OFF GND 1µF 1.5V TO 3.3V AT 150mA For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX8530/MAX8531 General Description The MAX8530/MAX8531 offer the benefits of lowdropout voltage and ultra-low power regulation in subminiaturized UCSP and QFN packages with an integrated microprocessor reset circuit (MAX8530 only). The devices operate from a 2.5V to 6.5V input and deliver up to 200mA and 150mA outputs with low dropout of 100mV (typ) at 100mA. Designed with an internal P-channel MOSFET pass transistor, the supply current is kept at a low 130µA (with both LDOs on), independent of the load current and dropout voltage. Other features include short-circuit protection and thermal-shutdown protection. MAX8530/MAX8531 Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN ABSOLUTE MAXIMUM RATINGS IN, SHDN, RESET, BP to GND .................................-0.3V to +7V OUT1, OUT2 to GND...................................-0.3V to (VIN + 0.3V) Output Short-Circuit Duration ........................................Indefinite Continuous Power Dissipation (TA = +70°C) 6-Bump UCSP (derate 3.9mW/°C above +70°C) ........308mW 6-Lead QFN (derate 24.4mW/°C above +70°C) ........1951mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C 6-Bump+ UCSP Solder Profile ....................................(Note 1) 6-Lead QFN Lead Temperature (10s) .........................+300°C Note 1: For UCSP solder profile information, visit www.maxim-ic.com/1st_pages/UCSP.html. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (IN = 3.8V, SHDN = IN, CBP = 10nF (MAX8531), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER Input Voltage Undervoltage Lockout Threshold SYMBOL VUVLO Output Voltage Accuracy Maximum Output Current Current Limit Ground Current Dropout Voltage Line Regulation IOUT_ ILIM IQ MIN ∆VLNR UNITS 6.5 V 2.42 V 2.15 TA = +25°C, IOUT1 = IOUT2 = 1mA -1 +1 TA = -40°C to +85°C, IOUT1 = IOUT2 = 1mA TA = -40°C to +85°C, IOUT1 = 0.1mA to 200mA, IOUT2 = 0.1mA to 150mA OUT1 -2 +2 -3 +3 200 OUT2 150 OUT1 210 330 550 OUT2 165 280 500 No load 130 220 IOUT1 = IOUT2 = 100mA 150 % mA 100 IN = (OUT_ + 0.1V) to 3.8V 100Hz, IOUT = 30mA 2.25 MAX IN rising, hysteresis is 40mV (typ) 10Hz to 100kHz, COUT = 10µF, IOUT = 10mA PSRR TYP 2.5 VOUT_ - VIN IOUT_ = 100mA (Note 3) Output Voltage Noise Ripple Rejection CONDITIONS VIN -0.2 MAX8530 320 MAX8531 40 MAX8530 60 MAX8531 62 mA µA 200 mV +0.2 %/V µVRMS dB SHUTDOWN SHDN Supply Current SHDN Input Threshold SHDN Input Bias Current IOFF SHDN = 0, TA = +25°C 0.01 SHDN = 0, TA = +85°C 0.1 VIH Input high voltage VIL Input low voltage ISHDN SHDN = IN or GND TSHDN TJ rising 1 1.6 0.4 TA = +25°C 0.7 TA = +85°C 0.8 100 µA V nA THERMAL PROTECTION Thermal-Shutdown Temperature Thermal-Shutdown Hysteresis 2 ∆TSHDN 160 °C 10 °C _______________________________________________________________________________________ Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN (IN = 3.8V, SHDN = IN, CBP = 10nF (MAX8531), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 84 87 89 % RESET OUTPUT (MAX8530 ONLY) RESET Threshold Percentage of nominal output, OUT1 falling, when RESET falls. VTH RESET Threshold Hysteresis 0.5 RESET Output Voltage Low (Open-Drain, Active Low) VOL % IRESET = 500µA, IN = 3.8V 10 20 IRESET = 100µA, IN = 1.2V 10 40 TA = +25°C 0.001 1 TA = +85°C 0.01 RESET Open-Drain Output Leakage Current V RESET = 6.5V RESET Active Timeout Delay From OUT1 rising to RESET rising. 100 200 mV µA 360 ms Note 2: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design. Note 3: The dropout voltage is defined as VIN - VOUT, when VOUT is 100mV below the value of VOUT for VIN = VOUT + 0.5V. Specification applies only when VOUT ≥ 2.5V. Typical Operating Characteristics VOUT1 = 3.3V, VOUT2 = 1.5V, load = 80mA (both output voltages), VIN = 3.8V, COUT_ = 2.2µF, CBP = 0.01µF, CIN = 2.2µF, and TA = +25°C, unless otherwise noted. 150 NO LOAD 100 50 0 MAX8530 toc02 BOTH OUTPUTS LOADED 160 140 120 100 80 60 1 2 3 4 SUPPLY VOLTAGE (V) 5 6 180 80mA LOAD, BOTH OUTPUTS 160 140 120 100 80 60 40 40 20 20 0 0 0 200 SUPPLY CURRENT (µA) 80mA LOAD, BOTH OUTPUTS 180 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 200 MAX8530 toc01 250 200 SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT vs. LOAD CURRENT MAX8530 toc03 SUPPLY CURRENT vs. SUPPLY VOLTAGE 0 10 20 30 40 50 LOAD CURRENT (mA) 60 70 80 -40 -15 10 35 60 85 TEMPERATURE (°C) _______________________________________________________________________________________ 3 MAX8530/MAX8531 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (continued) VOUT1 = 3.3V, VOUT2 = 1.5V, load = 80mA (both output voltages), VIN = 3.8V, COUT_ = 2.2µF, CBP = 0.01µF, CIN = 2.2µF, and TA = +25°C, unless otherwise noted. DROPOUT VOLTAGE vs. LOAD CURRENT 150 100 80 IOUT1 = 80mA 60 40 MAX8530 toc06 100 0.8 0.6 OUTPUT VOLTAGE (%) 200 1.0 MAX8530 toc05 MAX8530 toc04 120 DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) OUTPUT VOLTAGE ACCURACY vs. TEMPERATURE LDO DROPOUT VOLTAGE vs. VOUT 250 0.4 0.2 0 -0.2 -0.4 50 20 -0.6 0 0 -1.0 -0.8 2.7 2.8 2.9 3.0 3.1 3.2 3.3 10 35 60 TEMPERATURE (°C) PSRR vs. FREQUENCY CHANNEL-TO-CHANNEL ISOLATION vs. FREQUENCY (MAX8531) OUTPUT NOISE SPECTRAL DENSITY vs. FREQUENCY (MAX8531) OUT1 = 2.85V 40 30 20 10 70 60 50 40 30 20 0.1 1 10 100 1000 1000 100 10 10 0 0 10,000 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 FREQUENCY (kHz) FREQUENCY (kHz) FREQUENCY (kHz) OUTPUT NOISE (10Hz TO 100kHz) (MAX8531) LINE TRANSIENT MAX8530 toc10 MAX8530 toc11 4.5V VIN 3.5V 1V/div 500µV/ div VOUT_ 20mV/div AC-COUPLED VOUT_ 10ms/div 4 85 MAX8530 toc09 100Ω LOAD NOISE DENSITY (nVRMS/√Hz) 60 80 CHANNEL-TO-CHANNEL ISOLATION (dB) 100Ω LOAD MAX8530 toc08 VOUT (V) OUT2 = 2.85V 0.01 -15 -40 LOAD CURRENT (mA) 70 50 2.6 2.5 20 40 60 80 100 120 140 160 180 200 MAX8530 toc07 0 PSRR (dB) MAX8530/MAX8531 Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN 40µs/div _______________________________________________________________________________________ 100 Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN LOAD TRANSIENT (VIN = 3.8V, ILOAD = 1mA TO 80mA) LOAD TRANSIENT NEAR DROPOUT MAX8530 toc13 MAX8530 toc12 20mV/div AC-COUPLED VOUT 20mV/div AC-COUPLED VOUT 50mA/div 50mA/div ILOAD ILOAD 0 0 VIN = VOUT + 0.1V 10µs/div 10µs/div RESET RESPONSE (MAX8530) SHUTDOWN RESPONSE MAX8530 toc15 MAX8530 toc14 2V/ div VIN VOUT- 2V/ div VOUT- 0 2V/ div 0 0 2V/ div VRESET 0 1V/ div VSHDN 0 1ms/div 40ms/div Pin Description PIN MAX8530 (QFN) MAX8531 MAX8530 (UCSP) (QFN) MAX8531 (UCSP) NAME OUT2 FUNCTION 1 1 B3 B3 Regulator 2 Output. Guaranteed 150mA output current. 2 2 B2 B2 IN 3 3 B1 B1 OUT1 Regulator 1 Output. Guaranteed 200mA output current. 4 4 A1 A1 GND Ground. Also functions as a heatsink for the 6-pin QFN. Solder to a large pad or the circuit board ground plane to maximize thermal dissipation. 5 5 A2 A2 SHDN Shutdown Input. A logic low shuts down both regulators. Connect to IN for normal operation. 6 — A3 — RESET Reset Active-Low Open-Drain Output. Minimum timeout of 100ms. RESET is low in shutdown. — 6 — A3 BP Regulator Input Reference Noise Bypass. Connect to a 0.01µF ceramic capacitor for reduced noise at both outputs. _______________________________________________________________________________________ 5 MAX8530/MAX8531 Typical Operating Characteristics (continued) VOUT1 = 3.3V, VOUT2 = 1.5V, load = 80mA (both output voltages), VIN = 3.8V, COUT_ = 2.2µF, CBP = 0.01µF, CIN = 2.2µF, and TA = +25°C, unless otherwise noted. Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN MAX8530/MAX8531 Functional Diagram IN SHUTDOWN AND POWER-ON CONTROL SHDN MOS DRIVER WITH ILIMIT ERROR AMP P OUT1 THERMAL SENSOR 1.25V REF DELAY 87% REF RESET* MAX8530 MAX8531 N GND BP** LDO2 OUT2 * MAX8530 ONLY **MAX8531 ONLY Detailed Description The MAX8530/MAX8531 are low-power, low-dropout, low-quiescent current linear regulators with reset designed primarily for battery-powered applications. For preset output voltages, refer to the Output Voltage Selector Guide. Other combinations between 1.5V and 3.3V are available in 50mV increments. This device supplies loads up to 200mA for OUT1 and 150mA for OUT2. The MAX8530/MAX8531 consist of a 1.25V reference, error amplifiers, P-channel pass transistors, reset block, and internal feedback voltage-dividers. The 1.25V bandgap reference is connected to the error amplifier’s inverting input. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the 6 reference voltage, the pass-transistor gate is pulled lower, allowing more current to pass to the output and increasing the output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to pass to the output. The output voltage is fed back through an internal resistor voltage-divider connected to the OUT_ pin. RESET The reset circuit is active at power-up and power-down. RESET is held low at power-up. The reset timing starts once the OUT1 voltage reaches 87% (typ) of its regulation voltage. The RESET signal goes high 200ms (typ) after the OUT1 voltage reaches 87% (typ) of its regulation voltage. At power-off, RESET goes low when the OUT1 voltage is below 87% (typ) of its regulation voltage. _______________________________________________________________________________________ Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN Operating Region and Power Dissipation The MAX8530/MAX8531s’ maximum power dissipation depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of airflow. The power dissipation across the device is P = IOUT (VIN VOUT). Maximum power dissipation: PMAX = (TJ - TA)/(θJB + θBA) where TJ - TA is the temperature difference between the MAX8530/MAX8531 die junction and the surrounding air, θJB (or θJC) is the thermal resistance of the package, and θBA is the thermal resistance through the printed circuit board, copper traces, and other materials to the surrounding air. The GND pin of the MAX853_ETT__ (6-lead QFN) performs the dual functions of providing an electrical connection to the ground and channeling heat away. Connect the GND pin and exposed pad to ground using a large pad or ground plane. Internal P-Channel Pass Transistor The MAX8530/MAX8531 feature two 1Ω P-channel MOSFET pass transistors. A P-channel MOSFET provides several advantages over similar designs using PNP pass transistors, including longer battery life. It requires no base drive, substantially reducing quiescent current. PNP-based regulators waste considerable current in dropout when the pass transistor saturates and also use high base-drive currents under heavy loads. The MAX8530/MAX8531 do not suffer these problems and consume only 150µA of quiescent current whether in dropout, light-load, or heavy-load applications (see the Typical Operating Characteristics). Whereas a PNP-based regulator has dropout voltage that is independent of the load, a P-channel MOSFET’s dropout voltage is proportional to load current, providing for low dropout voltage at heavy loads and extremely low dropout voltage at lighter loads. Current Limit The MAX8530/MAX8531 contain two independent current limiters, one for each regulator, which monitor and control the pass transistor’s gate voltage and limit the output currents to 210mA and 165mA minimum. The output can be shorted to ground for an indefinite time without damaging the part. Low-Noise Operation (MAX8531) An external 0.01µF bypass capacitor at BP, in conjunction with an internal resistor, creates a lowpass filter (see the Typical Application Circuit). The MAX8531 exhibits 40µV RMS output voltage noise with C BP = 0.01µF and C OUT = 2.2µF (see the Output Noise Spectral Density vs. Frequency graph in the Typical Operating Characteristics). MAX8531 Typical Appication Circuit Thermal-Overload Protection Thermal-overload protection limits total power dissipation in the MAX8530/MAX8531. When the junction temperature exceeds TJ = +160°C, the thermal sensor signals the shutdown logic, turning off the pass transistor and allowing the IC to cool. The thermal sensor turns the pass transistor on again after the IC’s junction temperature cools by 10°C, resulting in a pulsed output during continuous thermal-overload conditions. Thermal-overload protection is designed to protect the MAX8530/MAX8531 in the event of fault conditions. For continual operation, do not exceed the absolute maximum junction temperature rating of TJ = +150°C. INPUT 2.5V TO 6.5V IN 1.5V TO 3.3V AT 200mA OUT1 CIN 2.2µF 2.2µF MAX8531 BP 10nF ON SHDN 1.5V TO 3.3V AT 150mA OUT2 OFF 1µF GND _______________________________________________________________________________________ 7 MAX8530/MAX8531 Shutdown The MAX8530/MAX8531 have a single shutdown control input (SHDN). Drive SHDN low to shut down both outputs, reducing supply current to 10nA. Connect SHDN to a logic high, or IN, for normal operation. MAX8530/MAX8531 Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN Applications Information Capacitor Selection and Regulator Stability Use a 2.2µF capacitor on the MAX8530/MAX8531s’ inputs. Larger input capacitor values with lower ESRs provide better supply-noise rejection and line-transient response. To reduce noise and improve load transients, use large-output capacitors, up to 10µF. For stable operation over the full temperature range and with rated maximum load currents, use a minimum of 2.2µF (or 1µF for <150mA loading for OUT1) and 1µF for OUT2. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such as Z5U and Y5V, it is necessary to use 4.7µF or more to ensure stability at temperatures below -10°C. With X7R or X5R dielectrics, 2.2µF is sufficient at all operating temperatures. These regulators are optimized for ceramic capacitors. Tantalum capacitors are not recommended. PSRR and Operation from Sources Other than Batteries The MAX8530/MAX8531 is designed to deliver low dropout voltages and low quiescent currents in batterypowered systems. Power-supply rejection is 60dB at low frequencies (see the Power-Supply Rejection Ratio vs. Frequency graph in the Typical Operating Characteristics). When operating from sources other than batteries, improve supply-noise rejection and transient response by increasing the values of the input and output bypass capacitors and through passive filtering techniques. Load-Transient Considerations The MAX8530/MAX8531 load-transient response graphs (see the Typical Operating Characteristics) show two components of the output response: a DC shift in the output voltage because of the different load 8 currents, and the transient response. Increase the output capacitor’s value and decrease its ESR to attenuate transient spikes. Input/Output (Dropout Voltage) A regulator’s minimum input/output voltage differential (or dropout voltage) determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage. Because the MAX8530/MAX8531 use a P-channel MOSFET pass transistor, their dropout voltage is a function of drain-tosource on-resistance (RDS(ON)) multiplied by the load current (see the Typical Operating Characteristics). Calculating the Maximum Output Power in UCSP The maximum output power of the MAX8530/MAX8531 can be limited by the maximum power dissipation of the package. Obtain the maximum power dissipation by calculating the power dissipation of the package as a function of the input voltage, output voltage, and output currents. The maximum power dissipation should not exceed the package’s maximum power rating: P = (VIN(MAX) - VOUT1) x IOUT1 + (VIN(MAX) - VOUT2) x IOUT2 where: VIN(MAX) = Maximum input voltage PMAX = Maximum power dissipation of the package (308mW for UCSP and 1951mW for the QFN package) VOUT1 = Output voltage of OUT1 VOUT2 = Output voltage of OUT2 IOUT1 = Maximum output current of OUT1 IOUT2 = Maximum output current of OUT2 P should be less than PMAX. If P is greater than PMAX, consider using the QFN package. _______________________________________________________________________________________ Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN TOP VIEW GND SHDN RESET (BP*) A1 A2 A3 TOP VIEW MAX8530EBT (MAX8531EBT) B1 OUT1 B2 B3 IN OUT2 *MAX8531 ONLY 1 IN 2 OUT1 3 MAX8530ETT (MAX8531ETT) 6 RESET (BP*) 5 SHDN 4 GND THIN QFN UCSP *MAX8531 ONLY Output Voltage Selector Guide PART OUT2 VOUT1 VOUT2 TOP MARK MAX8530EBTJ2 2.85 1.8 ACR MAX8530EBTJO 2.85 2.6 ACA MAX8530EBTKG 2.8 3.0 ACT MAX8530ETTP2 2.5 1.8 AET MAX8530ETTO2 2.6 1.8 AES MAX8530ETTK2 2.8 1.8 AER MAX8530ETTKO 2.8 2.6 AEQ MAX8531EBTJJ 2.85 2.85 ACG MAX8531EBTGG 3.0 3.0 ACI MAX8531ETTGG 3.0 3.0 AEF Chip Information TRANSISTOR COUNT: 1720 PROCESS: BiCMOS Note: Contact the factory for other output voltages between 1.5V and 3.3V. The minimum order quantity is 25,000 units. _______________________________________________________________________________________ 9 MAX8530/MAX8531 Pin Configurations Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 6, 8, &10L, QFN THIN.EPS MAX8530/MAX8531 Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN PACKAGE OUTLINE, 6, 8 & 10L, QFN THIN (DUAL), EXPOSED PAD, 3x3x0.80 mm 21-0137 10 ______________________________________________________________________________________ C Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN COMMON DIMENSIONS SYMBOL A MIN. MAX. 0.70 0.80 D 2.90 3.10 E 2.90 3.10 A1 0.00 0.05 L k 0.20 0.40 0.25 MIN A2 0.20 REF. PACKAGE VARIATIONS PKG. CODE N D2 E2 e JEDEC SPEC b T633-1 6 1.50–0.10 2.30–0.10 0.95 BSC MO229 / WEEA 0.40–0.05 1.90 REF T833-1 8 1.50–0.10 2.30–0.10 0.65 BSC MO229 / WEEC 0.30–0.05 1.95 REF T1033-1 10 1.50–0.10 2.30–0.10 0.50 BSC MO229 / WEED-3 0.25–0.05 2.00 REF [(N/2)-1] x e PACKAGE OUTLINE, 6, 8 & 10L, QFN THIN (DUAL), EXPOSED PAD, 3x3x0.80 mm 21-0137 C ______________________________________________________________________________________ 11 MAX8530/MAX8531 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 6L, UCSP.EPS MAX8530/MAX8531 Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.