INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40244B buffers Octal buffers with 3-state outputs Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF40244B buffers Octal buffers with 3-state outputs DESCRIPTION The HEF40244B is an octal non-inverting buffer with 3-state outputs. It features output stages with high current output capability suitable for driving highly capacitive loads. The 3-state outputs are controlled by the output enable inputs EOA and EOB. A HIGH on EO causes the outputs to assume a high impedance OFF-state. The device also features hysteresis on all inputs to improve noise immunity. Schmitt-trigger action in the inputs makes the circuit highly tolerant to slower input rise and fall times. The HEF40244B is pin and functionally compatible with the TTL ‘244’ device. Fig.2 Pinning diagram. HEF40244BP(N): 20-lead DIL; plastic (SOT146-1) HEF40244BD(F): 20-lead DIL; ceramic (cerdip) (SOT152) HEF40244BT(D): 20-lead SO; plastic (SOT163-1) ( ): Package Designator North America PINNING IA1 to IA4 inputs IB1 to IB4 inputs OA1 to OA4 bus outputs OB1 to OB4 bus outputs EOA, EOB output enable inputs (active LOW) FAMILY DATA, IDD LIMITS category buffers See Family Specifications Fig.1 Functional diagram. January 1995 2 Philips Semiconductors Product specification HEF40244B buffers Octal buffers with 3-state outputs TRUTH TABLE INPUTS OUTPUT In EO On H L H L L L X H Z Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial Z = high impedance off state Fig.3 Logic diagram (one buffer). RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134). See Family Specifications, except for: D.C. current into any input ± II D.C. source or sink current into any output ± IO max. 25 mA D.C. current into the supply terminals ±I max. 100 mA max. 10 mA DC CHARACTERISTICS VSS = 0 V VDD V VOH V VOL V Tamb (°C) SYMBOL −40 MIN. Output current HIGH Output current HIGH Output current LOW MIN. 5 4,6 10 9,5 15 13,5 14,5 15 5 3,6 9,3 10 10 8,4 14,4 15 13,2 19,5 5 −IOH −IOH mA 1,85 1,5 3,0 1,1 mA 50 15,5 mA 24 10,7 mA 15 46 15,0 mA 20 62 19,8 mA 0,5 IOL 9,5 7,6 15 1,5 (any input) 15 30,0 VH 3 TYP. 0,45 10 10 MIN. 1,2 2,3 voltage TYP. 0,6 2,9 5 +85 0,75 0,4 Hysteresis January 1995 TYP. +25 25 5,4 17 45 1,75 mA 5,50 mA 19,0 mA 220 mV 250 mV 320 mV Philips Semiconductors Product specification HEF40244B buffers Octal buffers with 3-state outputs (1) P-channel MOS transistor conducting. (2) P-channel MOS transistor and bipolar n-p-n transistor conducting. Fig.4 Typical output source current characteristic. Fig.5 Schematic diagram of output stage. AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns ALL BUFFERS SWITCHING VDD V TYPICAL FORMULA FOR P (µW) Dynamic power 5 4 250 fi + ∑ (foCL) × VDD2 10 17 000 fi + ∑ (foCL) × VDD2 fi = input freq. (MHz) 15 46 000 fi + ∑ (foCL) × VDD fo = output freq. (MHz) dissipation per package (P) 2 where CL = load capacitance (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) January 1995 4 Philips Semiconductors Product specification HEF40244B buffers Octal buffers with 3-state outputs AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL MIN. TYP. TYPICAL EXTRAPOLATION FORMULA MAX. Propagation delays IAn/Bn → OAn/Bn HIGH to LOW 5 10 tPHL 15 IAn/Bn → OAn/Bn LOW to HIGH 5 10 tPLH 15 Output transition times HIGH to LOW LOW to HIGH 5 95 190 ns 83 ns + (0,24 ns/pF) CL 40 80 ns 35 ns + (0,10 ns/pF) CL 30 60 ns 26 ns + (0,07 ns/pF) CL 85 170 ns 82 ns + (0,06 ns/pF) CL 40 80 ns 38 ns + (0,03 ns/pF) CL 30 60 ns 29 ns + (0,02 ns/pF) CL 40 80 ns 20 40 ns 15 15 30 ns 5 30 60 ns 20 40 ns 15 15 30 ns 5 70 140 ns 35 70 ns 10 10 tTHL tTLH 3-state propagation delays Output disable times EO → OAn/Bn HIGH LOW 10 tPHZ 15 30 60 ns 5 75 150 ns 40 80 ns 15 30 60 ns 5 80 160 ns 10 tPLZ Output enable times EO → OAn/Bn HIGH LOW 10 tPZH 35 70 ns 15 30 60 ns 5 90 180 ns 40 80 ns 30 60 ns 10 tPZL 15 January 1995 5 see Fig.6 Philips Semiconductors Product specification HEF40244B buffers Octal buffers with 3-state outputs tTLH − − − − tTHL Fig.6 Output transition times as a function of the load capacitance. January 1995 6