Renesas HD74HC679 12-bit address comparator Datasheet

HD74HC679
12-bit Address Comparator
REJ03D0640-0200
(Previous ADE-205-526)
Rev.2.00
Mar 30, 2006
Description
The HD74HC679 address comparator simplifies addressing of memory boards and/or other peripheral devices. The
four P inputs are normally hard wired with a preprogrammed address. An internal decoder determines what input
information applied to the 12 A inputs must be low or high to cause a low state at the output (Y). For example, a
positive-logic bit combination of 0111 (decimal 7) at the P input determines that inputs A1 through A7 must be low and
that inputs A8 through A12 must be high to cause the output to go low. Equality of the address amplified at the A inputs
to the preprogrammed address is indicated by the output being low.
The HD74HC679 features and enable input (G). When G is low, the device is enabled. When G is high, the device is
disabled and the output is high regardless of the A and P inputs.
Features
• High Speed Operation: tpd (A to Y) = 18 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
HD74HC679RPEL
Package Type
SOP-20 pin (JEDEC)
Rev.2.00 Mar 30, 2006 page 1 of 6
Package Code
(Previous Code)
PRSP0020DC-A
(FP-20DBV)
Package
Abbreviation
RP
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
HD74HC679
Function Table
Inputs
G
P2
L
P1
L
P0
L
A1
H
A2
H
A3
H
A4
H
A5
H
A6
H
A7
H
A8
H
A9
H
A10
H
A11
H
A12
H
Output Y
L
P3
L
L
L
L
L
L
L
L
H
H
L
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
H
H
L
H
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
L
H
H
L
L
L
L
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
L
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
L
L
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
H
H
H
L
L
L
L
H
H
L
H
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
H
H
H
H
L
H
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
H
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
H
L
L
L
L
All other combinations
H
H :
L :
X :
Any combination
H
high level
low level
irrelevant
Pin Arrangement
A1
1
20 VCC
A2
2
19 G
A3
3
18 Y
A4
4
17 P3
A5
5
16 P2
A6
6
15 P1
A7
7
14 P0
A8
8
13 A12
A9
9
12 A11
GND 10
11 A10
(Top view)
Rev.2.00 Mar 30, 2006 page 2 of 6
L
HD74HC679
Logic Diagram
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
Y
A11
A12
P0
P1
P2
P3
G
Absolute Maximum Ratings
Item
Supply voltage range
Symbol
VCC
Ratings
–0.5 to 7.0
Unit
V
Input / Output voltage
Input / Output diode current
VIN, VOUT
IIK, IOK
–0.5 to VCC +0.5
±20
V
mA
Output current
VCC, GND current
IOUT
ICC or IGND
±25
±50
mA
mA
PT
Tstg
500
–65 to +150
mW
°C
Power dissipation
Storage temperature
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Symbol
Ratings
Unit
Supply voltage
Input / Output voltage
VCC
VIN, VOUT
2 to 6
0 to VCC
V
V
Operating temperature
Ta
–40 to 85
0 to 1000
°C
tr , tf
0 to 500
0 to 400
ns
Input rise / fall time
Note:
*1
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Rev.2.00 Mar 30, 2006 page 3 of 6
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
HD74HC679
Electrical Characteristics
Ta = 25°C
Item
Input voltage
Symbol VCC (V)
VIH
VIL
Output voltage
VOH
VOL
Ta = –40 to+85°C
2.0
Min
1.5
Typ
—
Max
—
Min
1.5
Max
—
4.5
6.0
3.15
4.2
—
—
—
—
3.15
4.2
—
—
2.0
4.5
—
—
—
—
0.5
1.35
—
—
0.5
1.35
6.0
2.0
—
1.9
—
2.0
1.8
—
—
1.9
1.8
—
4.5
6.0
4.4
5.9
4.5
6.0
—
—
4.4
5.9
—
—
4.5
6.0
4.18
5.68
—
—
—
—
4.13
5.63
—
—
2.0
4.5
—
—
0.0
0.0
0.1
0.1
—
—
0.1
0.1
6.0
4.5
—
—
0.0
—
0.1
0.26
—
—
0.1
0.33
Input current
Iin
6.0
6.0
—
—
—
—
0.26
±0.1
—
—
0.33
±1.0
Quiescent supply
current
ICC
6.0
—
—
4.0
—
40
Unit
Test Conditions
V
V
V
Vin = VIH or VIL IOH = –20 µA
IOH = –4 mA
IOH = –5.2 mA
V
Vin = VIH or VIL IOL = 20 µA
IOL = 4 mA
IOL = 5.2 mA
µA Vin = VCC or GND
µA Vin = VCC or GND, Iout = 0 µA
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Item
Propagation delay
time
Symbol VCC (V)
Ta = –40 to +85°C
tPLH
tPHL
2.0
Min
—
4.5
6.0
—
—
27
—
62
52
—
—
78
66
tPLH
tPHL
2.0
4.5
—
—
—
18
180
36
—
—
225
45
6.0
2.0
—
—
—
—
31
125
—
—
38
155
4.5
6.0
—
—
14
—
25
21
—
—
31
26
tPLH
tPHL
Typ
—
Max
310
Min
—
Max
390
Output rise/fall
time
tTLH
tTHL
2.0
4.5
—
—
—
5
75
15
—
—
95
19
Input capacitance
Cin
6.0
—
—
—
—
5
13
10
—
—
16
10
Rev.2.00 Mar 30, 2006 page 4 of 6
Unit
Test Conditions
ns
P to Y
ns
A to Y
ns
G to Y
ns
pF
HD74HC679
Test Circuit
VCC
VCC
See Function Table
Input
Pulse Generator
Zout = 50 Ω
G
Output
A1
A12
Y
CL =
50 pF
P0
P3
Note : 1. CL includes probe and jig capacitance.
Waveforms
• Waveform – 1
tr
P or A
tf
90%
50%
10%
90%
50%
10%
tPLH
tPHL
90%
50%
Y
VCC
0V
VOH
90%
50%
10%
VOL
tTHL
tTLH
• Waveform – 2
VCC
G
50%
50%
0V
tPLH
tPHL
90%
50%
10%
Y
tTLH
VOH
90%
50%
10%
tTHL
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns
Rev.2.00 Mar 30, 2006 page 5 of 6
VOL
HD74HC679
Package Dimensions
JEITA Package Code
P-SOP20-7.5x12.8-1.27
RENESAS Code
PRSP0020DC-A
*1
Previous Code
FP-20DBV
MASS[Typ.]
0.52g
D
F
20
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
@ DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
@ INCLUDE TRIM OFFSET.
11
HE
c
*2
E
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
1
e
*3
bp
x
M
L1
A
Z
Reference
Symbol
10
A1
θ
L
y
Detail F
Rev.2.00 Mar 30, 2006 page 6 of 6
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min Nom Max
12.80 13.2
7.50
0.10 0.20 0.30
2.65
0.34 0.40 0.46
0.20 0.25 0.30
0°
8°
10.00 10.40 10.65
1.27
0.12
0.15
0.935
0.40 0.70 1.27
1.45
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