LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 LM4985 Boomer™ Audio Power Amplifier Series Stereo 135mW Low Noise Headphone Amplifier with Selectable Capacitively Coupled or Output Capacitor-less (OCL) Output and Digitally Controlled (I2C) Volume Control Check for Samples: LM4985, LM4985TMEVAL FEATURES DESCRIPTION • The LM4985 is a stereo audio power amplifier with internal digitally controlled volume control. This amplifier is capable of delivering 68mWRMS per channel into a 16Ω load or 38mWRMS per channel into a 32Ω load at 1% THD when powered by a 3.6V power supply and operating in the OCL mode. 1 23 • • • • • • OCL or Capacitively Coupled Outputs (Patent Pending) I2C Digitally Controlled Volume Control Available in Space-Saving 0.4mm Lead-Pitch DSBGA Package Volume Control Range: –76dB to +18dB Ultra Low Current Shutdown Mode 2.3V - 5.5V Operation Ultra Low Noise APPLICATIONS • • • • Mobile Phones PDAs Portable Electronics Devices MP3 Players KEY SPECIFICATIONS (VDD = 3.6V) • • • • PSRR: 217Hz and 1kHzs – Output Capacitor-Less (OCL) – fRIPPLE = 217Hz, 77dB (Typ) – fRIPPLE = 1kHz, 76dB (Typ) – Capacitor Coupled (C-CUPL) – fRIPPLE = 217Hz, 63dB (Typ) – fRIPPLE = 1kHz, 62dB (Typ) Output Power Per Channel (fIN = 1kHz, THD+N = 1%), RL = 16Ω, OCL – VDD = 2.5V, 31mW (Typ) – VDD = 3.6V, 68mW (Typ) – VDD = 5.0V, 135mW (Typ) THD+N (f = 1kHz) – RLOAD = 16Ω, OCL, POUT = 60mW, 0.60 – RLOAD = 32Ω, OCL, POUT = 33mW, 0.031 Shutdown Current, 0.1µA (Typ) Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. To that end, the LM4985 features two functions that optimize system cost and minimize PCB area: an integrated, digitally controlled (I2C bus) volume control and an operational mode that eliminates output signal coupling capacitors (OCL mode). Since the LM4985 does not require bootstrap capacitors, snubber networks, or output coupling capacitors, it is optimally suited for low-power, battery powered portable systems. For added design flexibility, the LM4985 can also be configured for single-ended capacitively coupled outputs. The LM4985 features a current shutdown mode for micropower dissipation and thermal shutdown protection. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Boomer is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006, Texas Instruments Incorporated LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Block Diagram Mux Volume Control IN1 CNTGND + - Volume Control IN2 Mux Output Transient Suppression and Mode-Control Logic 2 SCL I2CVDD OUT2 + I C Digitally Controlled Analog Volume Control Interface SDA OUT1 + Bias Generator BYPASS - VDD GND ADR Figure 1. Block Diagram Typical Application 0.47 PF IN1 Volume Control BYPASS Mux - 2 Digital Control System I C Digitally Controlled Analog Volume Control Interface 100 PF CNTGND + 0.47 PF Volume Control OUT1 + Bias Generator IN2 - Mux OUT2 100 PF + Output Transient Suppression and Mode-Control Logic VDD GND Figure 2. Typical Capacitively Coupled Output Configuration Circuit 2 Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 0.47 PF IN1 BYPASS - Mux Volume Control + - Bias Generator - Volume Control Mux OUT2 + Output Transient Suppression and ModeControl Logic 2 I C Digitally Controlled Analog Volume Control Interface Digital Control System CNTGND + 0.47 PF IN2 OUT1 VDD GND Figure 3. Typical OCL Output Configuration Circuit Connection Diagram 3 2 1 A B C D Figure 4. DSBGA Package Top View See NS Package Number YFQ0012 PIN REFERENCE, NAME, AND FUNCTION Reference Name Function A1 ADR I2C serial interface address input. A2 IN2 Analog signal input two. A3 OUT2 B1 SDA Power amplifier two output. I2C serial interface data input. B2 BYPASS The internal VDD/2 ac bypass node. B3 CNTGND In OCL mode, this is the ac ground return. It is biased to VDD/2. Leave unconnected for CCUPL mode. C1 SCL I2C serial interface clock input. C2 GND The LM4985’s power supply ground input. C3 VDD The LM4985’s power supply voltage input. D1 2 I CVDD D2 IN1 D3 OUT1 I2C serial interface power supply input. Can be connected to the same supply that is connected to the VDD pin. Analog signal input one. Power amplifier one output. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 3 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage (VDD, I2CVDD) 6.0V −65°C to +150°C Storage Temperature Input Voltage (IN1, IN2, OUT1, OUT2, BYPASS, CNTGND, GND pins relative to the VDD pin) -0.3V to VDD + 0.3V Input Voltage (ADR, SDA, SCL pins, relative to the I2CVDD pin) -0.3V to I2CVDD + 0.3V Power Dissipation (3) Internally Limited (4) 2000V ESD Susceptibility ESD Susceptibility (5) 200V Junction Temperature 150°C θJA Thermal Resistance (1) (2) (3) (4) (5) 109°C/W All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4985, see power derating currents for more information. Human Body Model: 100pF discharged through a 1.5kΩ resistor. Machine Model: 200pF ≤ Cmm ≤ 220pF discharged through all pins. Operating Ratings TMIN ≤ TA ≤ TMAX Temperature Range −40°C ≤ T A ≤ 85°C 2.3V ≤ VCC ≤ 5.5V VDD Supply Voltage 2 1.7V ≤ I2CVDD ≤ 5.5V I CVDD Electrical Characteristics VDD = 5V (1) (2) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25°C. Symbol IDD Parameter Conditions Quiescent Power Supply Current LM4985 Typ (3) Limit (4) (5) VIN = 0V, IOUT = 0A Single-Channel no load OCL Single-Channel no load C-CUPL Dual-Channel no load OCL Dual-Channel no load C-CUPL 2 1.5 3 2.3 4.9 3.8 VSHUTDOWN = GND 0.1 Units (Limits) mA (max) ISD Shutdown Current 1.0 µA (max) VSDIH Logic Voltage Input High 3.5 V (min) VSDIL Logic Voltage Input Low 1.5 V (max) (1) (2) (3) (4) (5) 4 All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Electrical Characteristics VDD = 5V(1)(2) (continued) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25°C. Symbol Parameter Conditions LM4985 Typ (3) Limit (4) (5) RLOAD = 16Ω OCL 135 115 RLOAD = 16Ω C-CUPL 135 RLOAD = 32Ω OCL 79 Units (Limits) THD ≤ 1%; fIN = 1kHz PO Output Power RLOAD = 32Ω C-CUPL 80 THD+N Total Harmonic Distortion + Noise RLOAD = 16Ω RLOAD = 16Ω RLOAD = 32Ω RLOAD = 32Ω VON Output Noise Voltage VIN = AC GND, AV = 0dB, A-weighted 15 Power Supply Rejection Ratio VRIPPLE = 200mVp-p (6) fIN = 217Hz sinewave OCL C-CUPL 77 65 fIN = 1kHz sinewave OCL C-CUPL 77 65 Pout = 40mW. OCL RLOAD = 16Ω RLOAD= 32Ω 51 56 dB Pout = 50mW. C-CUPL RLOAD = 16Ω RLOAD= 32Ω 58 68 dB PSRR Xtalk Channel-to-channel Crosstalk OCL, PO = 100mW C-CUPL, PO = 100mW OCL, PO = 60mW C-CUPL, PO = 70mW mW (min) 70 0.08 0.02 0.04 0.01 % µV 57 dB (min) 60 CBYPASS= 4.7μF (7) TWU Wake Up Time form Shutdown WT1 = 0, WT0 = 0 OCL C-CUPL 75 285 WT1 = 0, WT0 = 1 OCL C-CUPL 110 530 WT1 = 1, WT0 = 0 OCL C-CUPL 180 1030 WT1 = 1, WT0 = 1 OCL C-CUPL 320 2050 msec RIN Input Resistance Stereo mode Mono mode 20 10 kΩ AVMIN Minimum Gain Code = 00000 –76 dB (min) AVMAX Maximum Gain Code = 11111 18 dB (min) ΔAV Gain Accuracy per Step 18dB ≥ AV ≥ –44dB –44dB ≥ AV > –76dB ±0.5 ±1.0 dB VOS Output Offset Voltage OCL RLOAD = 32Ω VIN = AC GND 2.0 (6) (7) 20 mV (max) 10Ω terminated input. The wake-up time (TWU) is calculated using the following formula; TWU = [CBYPASS (VDD) / 2 (IBYPASS)] + 40ms. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 5 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Electrical Characteristics VDD = 3.6V (1) (2) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25°C. Symbol Parameter Conditions LM4985 Units (Limits) Typ (3) Limit (4) (5) Single-Channel no load OCL 1.8 3.1 Single-Channel no load C-CUPL 1.0 Dual-Channel no load OCL 2.1 Dual-Channel no load C-CUPL 2.3 3 VSHUTDOWN = GND 0.1 1.0 µA (max) 2.52 V (min) 1.08 V (max) VIN = 0V, IOUT = 0A IDD Quiescent Power Supply Current ISD Shutdown Current VSDIH Logic Voltage Input High VSDIL Logic Voltage Input Low 4 mA (max) THD+N < 1%, fIN = 1kHz PO Output Power RLOAD = 16Ω OCL 68 RLOAD = 16Ω C-CUPL 70 RLOAD = 32Ω OCL 38 RLOAD = 32Ω C-CUPL mW (min) 34 41 THD+N Total Harmonic Distortion + Noise RLOAD = 16Ω RLOAD = 16Ω RLOAD = 32Ω RLOAD = 32Ω VON Output Noise Voltage VIN = AC GND, AV = 0dB, A-weighted 15 Power Supply Rejection Ratio VRIPPLE = 200mVp-p (6) fIN = 217Hz sinewave OCL C-CUPL 77 63 fIN = 1kHz sinewave OCL C-CUPL 76 62 Pout = 40mW. OCL RLOAD = 16Ω RLOAD= 32Ω 51 56 dB Pout = 50mW. C-CUPL RLOAD = 16Ω RLOAD= 32Ω 58 69 dB PSRR Xtalk (1) (2) (3) (4) (5) (6) 6 Channel-to-Channel Crosstalk OCL, PO = 60mW C-CUPL, PO = 60mW OCL, PO = 33mW C-CUPL, PO = 38mW 60 0.06 0.03 0.03 0.03 % µV 55 dB (min) 57 All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. 10Ω terminated input. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Electrical Characteristics VDD = 3.6V(1)(2) (continued) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25°C. Symbol Parameter Conditions LM4985 Typ (3) Limit (4) (5) WT1 = 0, WT0 = 0 OCL C-CUPL 66 222 93 WT1 = 0, WT0 = 1 OCL C-CUPL 92 405 WT1 = 1, WT0 = 0 OCL C-CUPL 143 774 WT1 = 1, WT0 =1 OCL C-CUPL 246 1532 Units (Limits) CBYPASS= 4.7μF (7) TWU Wake Up Time from Shutdown msec RIN Input Resistance Stereo mode Mono mode 20 10 AVMIN Minimum Gain Code = 00000 –76 –72 dB (max) AVMAX Maximum Gain Code = 11111 18 17 dB (min) ΔAV Gain Accuracy per Step 18dB ≥ AV ≥–44dB –44dB ≥ AV > –76dB ± 0.5 ± 1.0 ± 1.0 ± 2.0 dB VOS Output Offset Voltage OCL RLOAD = 32Ω VIN = AC GND 2.0 20 mV (max) (7) kΩ The wake-up time (TWU) is calculated using the following formula; TWU = [CBYPASS (VDD) / 2 (IBYPASS)] + 40ms. Electrical Characteristics VDD = 2.5V (1) (2) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25°C. Symbol Parameter Conditions LM4985 Typ (3) Limit (4) (5) Units (Limits) IDD Quiescent Power Supply Current VIN = 0V, IOUT = 0A Single-Channel no load OCL Single-Channel no load C-CUPL Dual-Channel no load OCL Dual-Channel no load C-CUPL ISD Shutdown Current VSHUTDOWN = GND VSDIH Logic Voltage Input High 1.75 V (min) VSDIL Logic Voltage Input Low 0.75 V (max) PO (1) (2) (3) (4) (5) Output Power THD+N < 1%, fIN = 1kHz RLOAD = 16Ω OCL RLOAD = 16Ω C-CUPL RLOAD = 32Ω OCL RLOAD = 32Ω C-CUPL 1.6 1 2.1 1.6 0.1 mA µA 31 33 19 19 mW All voltages are measured with respect to the GND pin unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 7 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Electrical Characteristics VDD = 2.5V(1)(2) (continued) The following specifications apply for RL = 16Ω, f = 1kHz, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25°C. Symbol Parameter Conditions LM4985 Typ (3) THD+N Total Harmonic Distortion + Noise RLOAD = 16Ω RLOAD = 16Ω RLOAD = 32Ω RLOAD = 32Ω VON Output Noise Voltage Power Supply Rejection Ratio PSRR Xtalk Channel-to-Channel Crosstalk OCL, PO = 26mW C-CUPL, PO = 20mW OCL, PO = 16mW C-CUPL, PO = 15mW Limit (4) (5) Units (Limits) 0.07 0.05 0.06 0.04 % VIN = AC GND, AV = 0dB, A-weighted 10 µV VRIPPLE = 200mVp-p (6) fIN = 217Hz sinewave OCL C-CUPL 75 59 dB fIN = 1kHz sinewave OCL C-CUPL 75 59 Pout = 20mW, OCL RLOAD = 16Ω RLOAD= 32Ω 50 55 dB Pout = 20mW. C-CUPL RLOAD = 16Ω RLOAD= 32Ω 58 67 dB CBYPASS = 4.7µF (7) TWU Wake Up Time from Shutdown WT1 = 0, WT0 = 0 OCL C-CUPL 66 214 WT1 = 0, WT0 = 1 OCL C-CUPL 92 544 WT1 = 1, WT0 = 0 OCL C-CUPL 145 1053 WT1 = 1, WT0 = 1 OCL C-CUPL 250 2098 msec RIN Input Resistance Stereo mode Mono mode 20 10 kΩ AVMIN Minimum Gain Code = 00000 –76 dB AVMAX Maximum Gain Code = 11111 ΔAV Gain Accuracy per Step 18dB ≥ AV ≥ –44dB –44dB ≥ AV > –76dB VOS Output Offset Voltage OCL RLOAD = 32Ω VIN = AC GND (6) (7) 18 dB ± 0.5 ± 1.0 dB 2.0 mV 10Ω terminated input. The wake-up time (TWU) is calculated using the following formula; TWU = [CBYPASS (VDD) / 2 (IBYPASS)] + 40ms. External Components Description (See Figure 2) Components 8 Functional Description 1. CI Input coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a high-pass filter with Ri at fc = 1/(2πRiCi). Refer to the section Proper Selection of External Components, for an explanation of how to determine the value of Ci. 2. CS Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for information concerning proper placement and selection of the supply bypass capacitor. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Components Functional Description 3. CB Bypass pin capacitor which provides half-supply filtering. Refer to the section, POWER SUPPLY BYPASSING, for information concerning proper placement and selection of CB 6. Co Output coupling capacitor which blocks the DC voltage at the amplifier's output. Forms a high pass filter with RL at fo = 1/(2πRLCo) Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 9 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Typical Performance Characteristics TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. 5 2 2 1 1 0.2 0.1 0.05 0.02 0.02 50 100 200 500 1k 2k 0.01 20 5k 10k 20k Figure 5. Figure 6. THD+N vs Frequency VDD = 5V, RL = 16Ω POUT = 50mW, C-CUPL THD+N vs Frequency VDD = 2.5V, RL = 32Ω POUT = 15mW, C-CUPL 10 2 2 1 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 50 100 200 500 1k 2k 0.01 20 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 7. Figure 8. THD+N vs Frequency VDD = 3.6V, RL = 32Ω POUT = 35mW, C-CUPL THD+N vs Frequency VDD = 5.0V, RL = 32Ω POUT = 60mW, C-CUPL 10 5 5 2 2 1 THD+N (%) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 20 5k 10k 20k FREQUENCY (Hz) 5 10 50 100 200 500 1k 2k FREQUENCY (Hz) 5 0.01 20 THD+N (%) 0.2 0.1 10 10 0.5 0.05 0.01 20 THD+N (%) THD+N (%) 5 0.5 THD+N vs Frequency VDD = 3.6V, RL = 16Ω POUT = 50mW, C-CUPL 10 THD+N (%) THD+N (%) 10 THD+N vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW, C-CUPL 50 100 200 500 1k 2k 5k 10k 20k 0.01 20 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 9. Figure 10. Submit Documentation Feedback 5k 10k 20k Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. 10 THD+N vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW, OCL 10 5 5 2 2 1 THD+N (%) THD+N (%) 1 0.5 0.2 0.1 0.05 0.02 0.02 50 100 200 500 1k 2k 0.01 20 5k 10k 20k Figure 11. Figure 12. THD+N vs Frequency VDD = 5.0V, RL = 16Ω POUT = 50mW, OCL THD+N vs Frequency VDD = 2.5V, RL = 32Ω POUT = 15mW, OCL 10 5 2 2 THD+N (%) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 10 50 100 200 500 1k 2k 0.01 20 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 13. Figure 14. THD+N vs Frequency VDD = 3.6V, RL = 32Ω POUT = 35mW, OCL THD+N vs Frequency VDD = 5.0V, RL = 32Ω POUT = 60mW, OCL 10 5 2 2 1 1 THD+N (%) 5 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 20 5k 10k 20k FREQUENCY (Hz) 5 0.01 20 50 100 200 500 1k 2k FREQUENCY (Hz) 1 THD+N (%) 0.2 0.1 10 THD+N (%) 0.5 0.05 0.01 20 THD+N vs Frequency VDD = 3.6V, RL = 16Ω POUT = 50mW, OCL 50 100 200 500 1k 2k 5k 10k 20k 0.01 20 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 15. Figure 16. 5k 10k 20k Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 11 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. THD+N vs Output Power VDD = 2.5V, RL = 16Ω C-CUPL 10 5 5 2 2 1 1 THD+N (%) THD+N (%) 10 THD+N vs Output Power VDD = 3.6V, RL = 16Ω C-CUPL 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 10m 0.01 10m 20m 30m 50m 100m 20m Figure 17. Figure 18. THD+N vs Output Power VDD = 5.0V, RL = 16Ω C-CUPL THD+N vs Output Power VDD = 2.5V, RL = 32Ω C-CUPL 10 5 5 2 2 1 THD+N (%) THD+N (%) 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 10m 0.01 30m 50m 70m 20m 40m 60m 100m 200m 6m 7m 8m 9m 10m 30m 40m Figure 19. Figure 20. THD+N vs Output Power VDD = 3.6V, RL = 32Ω C-CUPL THD+N vs Output Power VDD = 5.0V, RL = 32Ω C-CUPL 10 10 5 5 2 2 1 1 THD+N (%) THD+N (%) 20m OUTPUT POWER (W) OUTPUT POWER (W) 0.5 0.2 0.1 0.5 0.2 0.1 0.05 0.05 0.02 0.02 0.01 10m 30m 20m 12 200m OUTPUT POWER (W) OUTPUT POWER (W) 10 30m 50m 70m 40m 60m 100m 40m 50m 70m 90m 60m 80m 100m 0.01 10m 20m 30m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure 21. Figure 22. Submit Documentation Feedback 200m Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. THD+N vs Output Power VDD = 2.5V, RL = 16Ω OCL THD+N vs Output Power VDD = 3.6V, RL = 16Ω OCL 10 10 5 5 2 2 THD+N (%) 0.2 0.2 0.1 0.05 0.05 0.02 0.02 2m 5m 10m 20m 0.01 1m 50m 100m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure 23. Figure 24. THD+N vs Output Power VDD = 5.0V, RL = 16Ω OCL THD+N vs Output Power VDD = 2.5V, RL = 32Ω OCL 10 10 5 5 2 2 1 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 10m 20m 30m 50m 70m 40m 60m 100m 0.01 10m 200m 30m 20m 40m 50m 70m 100m 60m 80m OUTPUT POWER (W) OUTPUT POWER (W) Figure 25. Figure 26. THD+N vs Output Power VDD = 3.6V, RL = 32Ω OCL THD+N vs Output Power VDD = 5.0V, RL = 32Ω OCL 10 10 5 5 2 2 1 1 THD+N (%) THD+N (%) 0.5 0.1 0.01 1m THD+N (%) 1 THD+N (%) THD+N (%) 1 0.5 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 10m 30m 20m 40m 50m 70m 100m 60m 80m 0.01 10m 20m 30m 50m 70m 40m 60m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure 27. Figure 28. 200m Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 13 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. -20 -20 -30 -30 -50 -60 -60 -80 -80 -90 -90 -100 20 -100 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k FREQUENCY (Hz) Figure 29. Figure 30. PSRR vs Frequency VDD = 5.0V, RL = 16Ω VRIPPLE = 200mVpp, OCL PSRR vs Frequency VDD = 2.5V, RL = 32Ω VRIPPLE = 200mVpp, OCL +0 -10 -10 -20 -20 -30 -30 -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 +0 50 100 200 500 1k 2k FREQUENCY (Hz) PSRR (dB) PSRR (dB) -50 -70 -100 20 PSRR (dB) -40 -70 +0 14 PSRR (dB) -10 -40 PSRR vs Frequency VDD = 3.6V, RL = 16Ω VRIPPLE = 200mVpp, OCL +0 -10 50 100 200 500 1k 2k -100 20 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 31. Figure 32. PSRR vs Frequency VDD = 3.6V, RL = 32Ω VRIPPLE = 200mVpp, OCL PSRR vs Frequency VDD = 5.0V, RL = 32Ω VRIPPLE = 200mVpp, OCL +0 -10 -10 -20 -20 -30 -30 PSRR (dB) PSRR (dB) +0 PSRR vs Frequency VDD = 2.5V, RL = 16Ω VRIPPLE = 200mVpp, OCL -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 -100 20 50 100 200 500 1k 2k 5k 10k 20k 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 33. Figure 34. Submit Documentation Feedback 5k 10k 20k Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. -20 -20 -30 -30 -40 -50 -60 -50 -60 -70 -80 -80 -90 -90 -100 20 -100 20 50 100 200 500 1k 2k 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 35. Figure 36. PSRR vs Frequency VDD = 5.0V, RL = 16Ω VRIPPLE = 200mVpp, C-CUPL PSRR vs Frequency VDD = 2.5V, RL = 32Ω VRIPPLE = 200mVpp, C-CUPL +0 -10 -10 -20 -20 -30 -30 -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 -100 20 +0 PSRR vs Frequency VDD = 3.6V, RL = 16Ω VRIPPLE = 200mVpp, C-CUPL -40 -70 PSRR (dB) PSRR (dB) PSRR (dB) -10 +0 PSRR (dB) +0 -10 50 100 200 500 1k 2k 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 37. Figure 38. PSRR vs Frequency VDD = 3.6V, RL = 32Ω VRIPPLE = 200mVpp, C-CUPL PSRR vs Frequency VDD = 5.0V, RL = 32Ω VRIPPLE = 200mVpp, C-CUPL +0 -10 -10 -20 -20 -30 -30 PSRR (dB) PSRR (dB) +0 PSRR vs Frequency VDD = 2.5V, RL = 16Ω VRIPPLE = 200mVpp, C-CUPL -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 -100 20 50 100 200 500 1k 2k 5k 10k 20k 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 39. Figure 40. 5k 10k 20k Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 15 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 20 CROSSTALK (dB) CROSSTALK (dB) Crosstalk vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW. OCL 50 100 200 500 1k 2k 5k 10k 20k +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 20 Crosstalk vs Frequency VDD = 3.6V, RL = 16Ω POUT = 40mW, OCL 50 100 200 500 1k 2k +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 20 Figure 42. Crosstalk vs Frequency VDD = 5.0V, RL = 16Ω POUT = 40mW, OCL Crosstalk vs Frequency VDD = 2.5V, RL = 32Ω POUT = 20mW, OCL CROSSTALK (dB) Figure 41. 50 100 200 500 1k 2k 5k 10k 20k +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 43. Figure 44. Crosstalk vs Frequency VDD = 3.6V, RL = 32Ω POUT = 40mW, OCL Crosstalk vs Frequency VDD = 5.0V, RL = 32Ω POUT = 50mW, OCL CROSSTALK (dB) CROSSTALK (dB) CROSSTALK (dB) 16 +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 20 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) 50 100 200 500 1k 2k 5k 10k 20k +0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 20 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 45. Figure 46. Submit Documentation Feedback 5k 10k 20k Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. -10 -20 -20 -30 -30 -40 -50 -60 -70 -80 -50 -60 -70 -80 -90 -100 20 -100 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k FREQUENCY (Hz) Figure 47. Figure 48. Crosstalk vs Frequency VDD = 5.0V, RL = 16Ω POUT = 50mW, C-CUPL Crosstalk vs Frequency VDD = 2.5V, RL = 32Ω POUT = 20mW, C-CUPL +0 -10 -10 -20 -20 -30 -30 -40 -50 -60 -70 -80 -40 -50 -60 -70 -80 -90 -90 -100 20 -100 20 +0 50 100 200 500 1k 2k FREQUENCY (Hz) CROSSTALK (dB) CROSSTALK (dB) -40 -90 +0 50 100 200 500 1k 2k 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 49. Figure 50. Crosstalk vs Frequency VDD = 3.6V, RL = 32Ω POUT = 50mW, C-CUPL Crosstalk vs Frequency VDD = 5.0V, RL = 32Ω POUT = 50mW, C-CUPL -40 -10 -44 -20 -48 CROSSTALK (dB) CROSSTALK (dB) Crosstalk vs Frequency VDD = 3.6V, RL = 16Ω POUT = 50mW, C-CUPL +0 -10 CROSSTALK (dB) CROSSTALK (dB) +0 Crosstalk vs Frequency VDD = 2.5V, RL = 16Ω POUT = 20mW, C-CUPL -30 -40 -50 -60 -70 -52 -56 -60 -64 -68 -72 -80 -90 -76 -100 20 -80 50 100 200 500 1k 2k 5k 10k 20k 30 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure 51. Figure 52. 5k 10k 20k Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 17 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. Load Dissipation vs Amplifier Dissipation VDD = 2.5V, C-CUPL Load Dissipation vs Amplifier Dissipation VDD = 3.6V, C-CUPL 0.5 0.25 RL = 16: AMPLIFIER DISSIPATION (W) AMPLIFIER DISSIPATION (W) RL = 16: 0.20 1% THD+N 0.15 10% THD+N 0.10 RL = 32: 0.05 0.0 0.01 0.02 0.03 0.4 1% THD+N 0.3 0.2 RL = 32: 0.0 0.01 0.04 0.03 LOAD DISSIPATION (W) Figure 54. Load Dissipation vs Amplifier Dissipation VDD = 5.0V, C-CUPL Load Dissipation vs Amplifier Dissipation VDD = 2.5V, OCL 0.7 1% THD+N 0.08 1% THD+N 0.06 0.04 RL = 32: 0.02 10% THD+N 0.0 0.01 AMPLIFIER DISSIPATION (W) AMPLIFIER DISSIPATION (W) 0.09 LOAD DISSIPATION (W) RL = 16: 0.6 RL = 16: 0.5 0.4 10% THD+N 0.3 RL = 32: 0.2 0.1 0.0 0.05 0.10 0.14 0.18 0.01 LOAD DISSIPATION (W) 0.02 0.04 Figure 56. Load Dissipation vs Amplifier Dissipation VDD = 3.6V, OCL Load Dissipation vs Amplifier Dissipation VDD = 5.0V, OCL 0.14 0.14 0.12 RL = 16: 0.12 1% THD+N 0.08 10% THD+N 0.06 RL = 32: 0.02 0.0 AMPLIFIER DISSIPATION (W) 1% THD+N 0.10 0.04 0.03 LOAD DISSIPATION (W) Figure 55. AMPLIFIER DISSIPATION (W) 0.07 0.05 Figure 53. 0.100 0.10 RL = 16: 0.08 10% THD+N 0.06 0.04 RL = 32: 0.02 0.0 0.01 0.03 0.05 0.07 0.01 LOAD DISSIPATION (W) Figure 57. 18 10% THD+N 0.1 0.05 0.100 0.140 0.180 LOAD DISSIPATION (W) Figure 58. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. Output Power vs Load Resistance VDD = 2.5V, C-CUPL 40 35 35 30 30 OUTPUT POWER (W) OUTPUT POWER (W) 40 25 10% THD+N 20 15 1% THD+N 10 Output Power vs Load Resistance VDD = 3.6V, C-CUPL 5 25 10% THD+N 20 15 1% THD+N 10 5 0 16 24 32 200 128 64 0 300 32 24 16 LOAD RESISTANCE (:) 300 Figure 59. Figure 60. Output Power vs Load Resistance VDD = 5.0V, C-CUPL Output Power vs Load Resistance VDD = 2.5V, OCL 50 200 40 150 OUTPUT POWER (W) OUTPUT POWER (W) 200 128 64 LOAD RESISTANCE (:) 10% THD+N 100 50 1% THD+N 30 10% THD+N 20 10 1% THD+N 0 16 24 32 64 200 128 0 16 300 24 32 Figure 61. 128 200 300 Figure 62. Output Power vs Load Resistance VDD = 3.6V, OCL 100 64 LOAD RESISTANCE (:) LOAD RESISTANCE (:) 200 Output Power vs Load Resistance VDD = 5.0V, OCL OUTPUT POWER (W) OUTPUT POWER (W) 80 60 10% THD+N 40 150 10% THD+N 100 50 20 1% THD+N 1% THD+N 0 16 24 32 64 128 200 300 0 16 24 32 64 128 200 LOAD RESISTANCE (:) LOAD RESISTANCE (:) Figure 63. Figure 64. 300 Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 19 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. 200 200 OUTPUT POWER (mW) OUTPUT POWER (mW) 250 Output Power vs Supply Voltage RL = 16Ω, C-CUPL 150 10% THD+N 100 1% THD+N 50 Output Power vs Supply Voltage RL = 32Ω, C-CUPL 150 10% THD+N 100 50 1% THD+N 0 0 2.3 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.3 2.5 VOLTAGE SUPPLY (V) 250 3.0 3.5 4.0 4.5 5.0 5.5 VOLTAGE SUPPLY (V) Figure 65. Figure 66. Output Power vs Supply Voltage RL = 16Ω, OCL Output Power vs Supply Voltage RL = 32Ω, OCL 100 90 OUTPUT POWER (mW) OUTPUT POWER (mW) 200 150 10% THD+N 100 50 1% THD+N 80 70 10% THD+N 60 50 40 30 1% THD+N 20 10 0 0 2.3 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.3 2.5 VOLTAGE SUPPLY (V) 3.0 Figure 67. 3.5 Supply Current vs Supply Voltage RL = 16Ω, C-CUPL 3.5 4.5 5.0 5.5 Supply Current vs Supply Voltage RL = 32Ω, C-CUPL 3.0 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 4.0 Figure 68. 3.0 2.5 2.0 1.5 1.0 0.5 2.5 2.0 1.5 1.0 0.5 0.0 2.3 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0 2.3 VOLTAGE SUPPLY (V) Figure 69. 20 3.5 VOLTAGE SUPPLY (V) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VOLTAGE SUPPLY (V) Figure 70. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. Supply Current vs Supply Voltage RL = 32Ω, OCL 4.0 4.0 3.5 3.5 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) Supply Current vs Supply Voltage RL = 16Ω, OCL 3.0 2.5 2.0 1.5 1.0 2.5 2.0 1.5 1.0 0.5 0.5 0.0 2.3 30 3.0 3.5 4.0 4.5 5.0 0.0 2.3 5.5 3.0 3.5 4.5 5.0 SUPPLY VOLTAGE (V) Figure 71. Figure 72. Gain vs Volume Steps VCC = 2.5V, RL = 16Ω, OCL Gain vs Volume Steps VCC = 3.6V, RL = 16Ω, OCL 30 20 20 10 10 0 0 -10 -10 -20 -30 5.5 -20 -30 -40 -40 -50 -50 -60 -60 -70 -70 -80 -80 0 3 6 0 9 12 15 18 21 24 27 30 3 6 VOLUME STEPS 30 9 12 15 18 21 24 27 30 VOLUME STEPS Figure 73. Figure 74. Gain vs Volume Steps VCC = 5V, RL = 16Ω, OCL Gain vs Volume Steps VCC = 2.5V, RL = 16Ω, C-CUPL 30 20 20 10 10 0 0 -10 -10 Av (dB) Av (dB) 4.0 SUPPLY VOLTAGE (V) Av (dB) Av (dB) 3.0 -20 -30 -20 -30 -40 -40 -50 -50 -60 -60 -70 -70 -80 -80 0 3 6 9 12 15 18 21 24 27 30 0 3 VOLUME STEPS Figure 75. 6 9 12 15 18 21 24 27 30 VOLUME STEPS Figure 76. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 21 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. Gain vs Volume Steps VCC = 3.6V, RL = 16Ω, C-CUPL 40 20 20 0 0 Av (dB) Av (dB) 40 -20 Gain vs Volume Steps VCC = 5V, RL = 16Ω, C-CUPL -20 -40 -40 -60 -60 -80 -80 0 3 6 9 12 15 18 21 24 27 30 0 3 6 VOLUME STEPS VOLUME STEPS Figure 77. Figure 78. Gain vs Volume Steps VCC = 2.5V, RL = 32Ω, OCL Gain vs Volume Steps VCC = 3.6V, RL = 32Ω, OCL 30 20 20 10 10 0 0 -10 -10 Av (dB) Av (dB) 30 9 12 15 18 21 24 27 30 -20 -30 -20 -30 -40 -40 -50 -50 -60 -60 -70 -70 -80 -80 0 3 6 0 9 12 15 18 21 24 27 30 3 6 VOLUME STEPS VOLUME STEPS Figure 79. Figure 80. Gain vs Volume Steps VCC = 5V, RL = 32Ω, OCL 30 9 12 15 18 21 24 27 30 Gain vs Volume Steps VCC = 2.5V, RL = 32Ω, C-CUPL 40 20 20 10 0 0 Av (dB) Av (dB) -10 -20 -30 -40 -20 -40 -60 -50 -80 -60 -70 -100 -80 0 3 6 9 12 15 18 21 24 27 30 0 3 VOLUME STEPS Figure 81. 22 6 9 12 15 18 21 24 27 30 VOLUME STEPS Figure 82. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Typical Performance Characteristics (continued) TA = 25°C, AV = 0dB, fIN = 1kHz unless otherwise stated. Gain vs Volume Steps VCC = 3.6V, RL = 32Ω, C-CUPL 40 20 20 0 0 Av (dB) Av (dB) 40 -20 -20 -40 -40 -60 -60 -80 Gain vs Volume Steps VCC = 5V, RL = 32Ω, C-CUPL -80 0 3 6 9 12 15 18 21 24 27 30 0 3 VOLUME STEPS Figure 83. 6 9 12 15 18 21 24 27 30 VOLUME STEPS Figure 84. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 23 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com APPLICATION INFORMATION AMPLIFIER CONFIGURATION EXPLANATION As shown in Figure 1, the LM4985 has three internal power amplifiers. Two of the amplifiers which amplify signals applied to their inputs, have internally configurable gain. The remaining third amplifier provides both halfsupply output bias and AC ground return. Loads, such as a headphone speaker, are connected between OUT1 and CNTGND or OUT2 and CNTGND. This configuration does not require an output coupling capacitor. The classical single-ended amplifier configuration, where one side of the load is connected to ground, requires large, expensive output coupling capacitors. A configuration such as the one used in the LM4985 has a major advantage over single supply, single-ended amplifiers. Since the outputs OUT1, OUT2, and CNTGND are all biased at 1/2 VDD, no net DC voltage exists across each load. This eliminates the need for output coupling capacitors which are required in a single-supply, single-ended amplifier configuration. Without output coupling capacitors in a typical single-supply, single-ended amplifier, the bias voltage is placed across the load resulting in both increased internal IC power dissipation and possible loudspeaker damage. The LM4985 eliminates these output coupling capacitors when operating in Output Capacitor-less (OCL) mode. Unless shorted to ground, VoC is internally configured to apply a 1/2 VDD bias voltage to a stereo headphone jack's sleeve. This voltage matches the bias voltage present on VoA and VoB outputs that drive the headphones. The headphones operate in a manner similar to a bridge-tied load (BTL). Because the same DC voltage is applied to both headphone speaker terminals this results in no net DC current flow through the speaker. AC current flows through a headphone speaker as an audio signal's output amplitude increases on the speaker's terminal. The headphone jack's sleeve is not connected to circuit ground when used in OCL mode. Using the headphone output jack as a line-level output will place the LM4985's 1/2 VDD bias voltage on a plug's sleeve connection. This presents no difficulty when the external equipment uses capacitively coupled inputs. For the very small minority of equipment that is DC coupled, the LM4985 monitors the current supplied by the amplifier that drives the headphone jack's sleeve. If this current exceeds 500mAPEAK, the amplifier is shutdown, protecting the LM4985 and the external equipment. POWER DISSIPATION Power dissipation is a major concern when using any power amplifier. When operating in capacitor-coupled mode (C-CUPL), Equation 1 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = 2(VDD) 2 / (2π2RL) (1) When operating in the OCL mode, the LM4985's three operational amplifiers produce a maximum power dissipation given in Equation 2: PDMAX = [2(VDD) 2 / (2π2RL)] + [VDD2 / (4πRL)] (2) The maximum power dissipation point obtained from Equation 1 or Equation 2 must not be greater than the power dissipation that results from Equation 3: PDMAX = (TJMAX - TA) / θJA (3) For package YFQ0012, θJA = 190°C/W. TJMAX = 150°C for the LM4985. Depending on the ambient temperature, TA, of the system surroundings, Equation 3 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 2 is greater than that of Equation 3, then either the supply voltage must be decreased, the load impedance increased or TA reduced. For a typical application using a 3.6V power supply, with a 32Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 144°C provided that device operation is around the maximum power dissipation point. Thus, for typical applications, power dissipation is not an issue. Power dissipation is a function of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may be increased accordingly. Refer to the Typical Performance Characteristics curves for power dissipation information for lower output powers. 24 Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 POWER SUPPLY BYPASSING As with any amplifier, proper supply bypassing is important for low noise performance and high power supply rejection. The capacitor location on the power supply pins should be as close to the device as possible. Typical applications employ a regulator with 10µF tantalum or electrolytic capacitor and a ceramic bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of the LM4985. A bypass capacitor value in the range of 0.1µF to 1µF is recommended for CS. MICRO POWER SHUTDOWN The LM4985's micropower shutdown is activated or deactivated through its I2C digital interface . Please refer to Table 1 for the I2C Address, Register Select, and Mode Control registers. Each amplifier within the LM4985 can be shutdown individually. Please observe the following protocol when placing an individual amplifier channel in shutdown while the other channel remains active. The protocol requires activating both channels’ shutdown simultaneously, then deactivating the shutdown of the channel whose output is desired (or leaving the desire channel in shutdown mode). Also, when operating in the C-CUPL mode, a short delay time is required between activating one channel after placing both channels in shutdown. If the user finds that both channels activate when only one was chosen, increase the delay. SELECTION OF INPUT CAPACITOR SIZE Amplifying the lowest audio frequencies requires a high value input coupling capacitor, Ci. A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the headphones used in portable systems have little ability to reproduce signals below 60Hz. Applications using headphones with this limited frequency response reap little improvement by using a high value input capacitor. In addition to system cost and size, turn on time is affected by the size of the input coupling capacitor Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage. This charge comes from the output via the feedback Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on time can be minimized. A small value of Ci (in the range of 0.22µF to 0.68µF), is recommended. MAXIMIZING OCL MODE CHANNEL-to-CHANNEL SEPARATION The OCL mode AC ground return (CNT_GND pin) is shared by both amplifiers. As such, any resistance between the CNT_GND pin and the load will create a voltage divider with respect to the load resistance. In a typical circuit, the amount of CNT_GND resistance can be very small, but still significant. It is significant because of the relatively low load impedances for which the LM4985 was designed to drive: 16Ω to 32Ω. The ratio of this voltage divider will determine the magnitude of any residual signal present at the CNT_GND pin. It is this residual signal that leads to channel-to-channel separation (crosstalk) degradation. For example, for a 60dB channel-to-channel separation while driving a 16Ω load, the resistance between the LM4985’s CNT_GND pin and the load must be less than 16mΩ. This is achieved by ensuring that the trace that connects the CNT_GND pin to the headphone jack sleeve should be as short and massive as possible, given the physical constraints of any specific printed circuit board layout and design. DEMONSTRATION BOARD AND PCB LAYOUT Information concerning PCB layout considerations and demonstration board use and performance is found in Application Note AN-1452. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 25 LM4985, LM4985TMEVAL SNAS346B – MAY 2006 – REVISED MAY 2006 www.ti.com I2C Control Register Table 1 shows the actions that are implemented by manipulating the bits within the two internal I2C control registers. Table 1. LM4985 I2C Control Register Addressing and Data Format Chart LM4985 I2C Contorl Register Addressing and Data Chart A6 A5 A4 A3 A2 A1 A0 1 1 0 0 1 1 A0 D7 D6 D5 D4 D3 D2 RS1 RS0 0 0 0 0 0 0 0 0 Read and write the mode control register 0 0 0 0 0 0 0 1 Read and write the volume control register I2C Address Register Select D7 Mode Control Register 26 Function D6 D5 D4 D3 D2 D1 D0 WT1 WT0 PHG SDCH1 SDCH2 CHSEL1 CHSEL2 0 X X X X X X X D7 must always be set to 0 – 0 0 X X X X X Wake-up time: 80ms (OCL), 250ms (C-CUPL) – 0 1 X X X X X Wake-up time: 110ms (OCL), 450ms (C-CUPL) – 1 0 X X X X X Wake-up time: 170ms (OCL), 850ms (C-CUPL) – 1 1 X X X X X Wake-up time: 290ms (OCL), 1650ms (C-CUPL) – X X 1 X X X X Output capacitor-less mode active – X X 0 X X X X Output capacitor-less mode inactive – X X X 0 0 X X Amplifier's SHUTDOWN mode active – X X X 0 1 X X Illegal mode – X X X 1 0 X X Illegal mode – X X X 1 1 X X Amplifier's SHUTDOWN mode inactive – X X X X X 0 02 Amplifier's Chan. 1 is Input 1, Chan 2. is Input 2 – X X X X X 0 1 Amplifier's Chan. 1 is Input 1, Chan 2. is Input 1 – X X X X X 1 0 Amplifier's Chan. 1 is Input 2, Chan 2. is Input 2 – X X X X X 1 1 Amplifier's Chan. 1 is Input 2, Chan 2. is Input 1 Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Volume Control Settings Binary Values The minimum volume setting is set to –76dB when 00000 is loaded into the volume control register. Incrementing the volume control register in binary fashion increases the volume control setting, reaching full scale at 11111. Table 2 shows the value of the gain for each of the 32 binary volume control settings. Table 2. Binary Values for the Different Volume Control Gain Settings Gain B4 B3 B2 B1 B0 18 1 1 1 1 1 17 1 1 1 1 0 16 1 1 1 0 1 15 1 1 1 0 0 14 1 1 0 1 1 13 1 1 0 1 0 12 1 1 0 0 1 10 1 1 0 0 0 8 1 0 1 1 1 6 1 0 1 1 0 4 1 0 1 0 1 2 1 0 1 0 0 0 1 0 0 1 1 –2 1 0 0 1 0 –4 1 0 0 0 1 –6 1 0 0 0 0 –8 0 1 1 1 1 –10 0 1 1 1 0 –12 0 1 1 0 1 –14 0 1 1 0 0 –16 0 1 0 1 1 –18 0 1 0 1 0 –21 0 1 0 0 1 –24 0 1 0 0 0 –27 0 0 1 1 1 –30 0 0 1 1 0 –34 0 0 1 0 1 –38 0 0 1 0 0 –44 0 0 0 1 1 –52 0 0 0 1 0 –62 0 0 0 0 1 –76 0 0 0 0 0 Revision History Rev Date Description 1.0 05/17/06 Initial WEB release. Submit Documentation Feedback Copyright © 2006, Texas Instruments Incorporated Product Folder Links: LM4985 LM4985TMEVAL 27 PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LM4985TM/NOPB ACTIVE DSBGA YFQ 12 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 G H2 LM4985TMX/NOPB ACTIVE DSBGA YFQ 12 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 G H2 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LM4985TM/NOPB DSBGA YFQ 12 250 178.0 8.4 LM4985TMX/NOPB DSBGA YFQ 12 3000 178.0 8.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1.35 1.75 0.76 4.0 8.0 Q1 1.35 1.75 0.76 4.0 8.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4985TM/NOPB DSBGA YFQ LM4985TMX/NOPB DSBGA YFQ 12 250 210.0 185.0 35.0 12 3000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA YFQ0012xxx D 0.600 ±0.075 E TMD12XXX (Rev B) D: Max = 1.66 mm, Min = 1.56 mm E: Max = 1.26 mm, Min = 1.16 mm 4215079/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. 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