PHILIPS NE8392C Coaxial transceiver interface for ethernet/thin ethernet Datasheet

Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
DESCRIPTION
NE8392C
PIN CONFIGURATION
The NE8392C Coaxial Transceiver Interface (CTI) is a bipolar
coaxial line driver/receiver for Ethernet (10base5) and Thin Ethernet
(10base2) local area networks. The CTI is connected between the
coaxial cable and the Data Terminal Equipment (DTE) and consists
of a receiver, transmitter, receive-mode collision detector, heartbeat
generator and jabber timer (see Block Diagram). The transmitter
output connects directly to a doubly terminated 50Ω cable, while the
receiver output, collision detector output and transmitter input are
connected to the DTE through isolation transformers. Isolation
between the CTI and the DTE is an IEEE 802.3 requirement that
can be met on signal lines by using a set of pulse transformers
normally available in a standard 16-pin DIP. Power isolation for the
CTI is achieved using DC-to-DC conversion through a power
transformer (see Figure 1, Connection Diagram).
N PACKAGE
1
CD–
2
15 TXO
3
14
VEE
4
13 VEE
VEE
5
12 RR–
RX–
6
11 RR+
TX+
7
10 GND
TX–
8
RX+
During transmission the jabber timer is initiated to disable the CTI
transmitter in the event of a longer than legal length data packet.
Receive-mode collision detection circuitry monitors the signals on
the coaxial cable to determine the presence of colliding packets and
signals the DTE in the event of a collision. At the end of every
transmission the heartbeat generator creates a pseudo collision for
a short time to ensure that the collision circuitry is functioning
correctly. The heartbeat function can be disabled for repeater
applications.
16 CDS
CD+
9
RXI
HBE
2
1
RXI
CDS
3
N/C
CD+
4
TXO
RX+
CD–
A PACKAGE
28 27 26
V
EE 5
V
EE 6
V
EE 7
V
EE 8
V
EE 9
V
EE 10
V
EE 11
24
23
22
21
20
19
RR+
GND
HBE
• Compatible with Ethernet II IEEE 802.3 10base5 and 10base2,
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
RR–
14 15 16 17 18
GND
RX–
FEATURES
TX+
12 13
TX–
The CTI is normally part of a three chip set that implements a
complete Ethernet/ Thin Ethernet network interface for a DTE (see
Figure 2, Interface Diagram). The other chips are a Serial Network
Interface (SNI) and a Network Interface Controller (NIC). The SNI
provides Manchester Encoding and Decoding while the NIC handles
the media access protocol and buffer management tasks.
25
SD00283
and ISO 8802/3 interface specifications
• 100% drop-in compatible with industry standard 8392 sockets
• Integrates all transceiver electronics except signal and power
• On-chip precision voltage reference for receive mode collision
detection
• Squelch circuitry on all signal inputs rejects noise
• Full ESD protection
• Standard 16-pin DIP and 28-pin PLCC packages
• Power-on reset prevents glitches on coaxial cable during power
isolation
• Only one external resistor required for setting coaxial signaling
current
• Jabber timer function integrated on chip
• Heartbeat generator can be externally disabled for operation as
up.
IEEE 802.3 compatible repeaters
• Also available in advanced low-power BiCMOS technology. (See
selection chart and data sheets for the NE83C92, NE83Q92 or
NE83Q93 for appropriate optimal usages)
ORDERING INFORMATION
TEMPERATURE RANGE
ORDER CODE
DWG #
16-Pin Plastic Dual In-Line Package (DIP)
DESCRIPTION
0 to +70°C
NE8392CN
SOT28-4
28-Pin Plastic Lead Chip Carrier (PLCC)
0 to +70°C
NE8392CA
SOT261-3
1995 May 1
1
853-1693 15180
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
NE8392C
PIN DESCRIPTIONS
PIN NO.
N PKG
PIN NO.
PLCC
SYMBOL
1
2
2
3
CD+
CD–
Collision Outputs. Balanced differential line driver outputs which send a 10MHz oscillation signal to
the DTE in the event of a collision, jabber interrupt or heartbeat test.
3
6
4
12
RX+
RX–
Receiver Outputs. Balanced differential line driver outputs which send the received signal to the
DTE.
7
8
13
14
TX+
TX–
Transmitter Inputs. Balanced differential line receiver inputs which accept the transmission signal
from the DTE and apply it to the coaxial cable at TXO once it meets Tx squelch threshold.
9
15
HBE
Heartbeat Enable. The heartbeat function is disabled when this pin is connected to VEE and enabled
when connected to GND or left floating.
11
12
18
19
RR+
RR–
External Resistor. A 1kΩ (1%) resistor connected between these pins establishes the signaling
current at TXO. RR– is internally connected to VEE.
14
26
RXI
Receiver Input. This pin is connected directly to the coaxial cable. Received signals are equalized,
amplified, and sent to the DTE through the RX+ pins once it meets Rx squelch threshold.
15
28
TXO
Transmitter Output. This pin is connected directly (Thin Ethernet) or through an external isolating
diode (Ethernet) to the coaxial cable.
16
1
CDS
Collision Detect Sense. Ground sense connection for the collision detection circuitry. This pin
should be directly connected to the coaxial cable shield to prevent ground drops affecting the
collision threshold voltage.
10
16
17
GND
Positive Supply Pin.
4
5
13
5 to 11
20 to 25
VEE
Negative supply pins. These pins also serve as a low thermal resistance path for extracting heat
from the die. They should, therefore, be connected to a large metal area on the PC board.
DESCRIPTION
NOTE:
1. The IEEE 802.3 name for CD is CI; for RX is DI; for TX is DO.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
VEE
VIN
PARAMETER
Supply voltage1
Voltage at any
input1
TSTG
Storage temperature range
TSOLD
Lead soldering temperature (10sec.)
temperature2
TJ
Recommended max junction
θJA
Thermal impedance (N and A packages)
RATING
UNIT
–12
V
0 to –12
V
–65 to +150
°C
+300
°C
+130
°C
60
°C/W
NOTE:
1. 100% measured in production.
2. The junction temperature is calculated from the following expression:
TJ = TA + θJA [VEE (0.08 + n x 0.05/100) + 8(VEE –2) / R]
where
TA = Ambient temperature in °C.
θJA = Thermal resistance of package.
VEE = Normal operating supply voltage in volts.
n
= Percentage transmitter duty cycle.
R
= Pull down resistors on the RX and CD pins in Ω.
The N package is specially designed to have a low θJA by directly connecting the four center Pins 4, 5, 12, and 13 to the die attachment area.
These four pins then provide a conductive heat flow path from the die to the PCB where they should be soldered to a large area VEE track. For
the A package, Pins 5 to 11 and 19 to 25 should similarly be soldered to a large area VEE and rack.
1995 May 1
2
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
NE8392C
BLOCK DIAGRAM
DTE
INTERFACE
COAX
CABLE
RXI
BUFFER
LINE
DRIVER
RECEIVE
PAIR
(RX+, RX–)
RECEIVER
EQUALIZER
4–POLE BESSEL
LOW PASS FILTER
TXO
RECEIVER
AC–DC SQUELCH
TRANSMIT
PAIR
(TX+, TX–)
TRANSMITTER
CDS
SENSE
BUFFER
TRANSMITTER
SQUELCH
HEARTBEAT ENABLE
COLLISION
COMPARATOR
&
HEARTBEAT
GENERATOR
COLLISION
PAIR
(CD+, CD–)
10MHz
OSC
JABBER
TIMER
LINE
DRIVER
SD00274
1995 May 1
3
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
ELECTRICAL CHARACTERISTICS
VEE = –9V +5%; TA = 0°C to +70°C unless otherwise specified1,2.
NE8392C
No external isolation
LIMITS
SYMBOL
VPOR
IEE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
Power–on reset voltage. Transmitter disabled
for |VEE| < |VPOR|
–6.5
Supply current non–transmitting
–80
–130
Supply current transmitting
–125
–180
IRXI
Receive input bias current
VRXI = 0V
ICDS
Cable sense input bias current
VCDS = 0V
VIH
HBE input HIGH voltage
VIL
HBE input LOW voltage
IIH
HBE input HIGH current
VHBE = 0V
IIL
HBE input LOW current
VHBE = VEE
–2
+2
UNIT
V
mA
+25
µA
+6
µA
VEE +1.4
V
VEE +0.4
V
250
500
µA
–500
–1000
µA
ITDC
Transmit output DC current
level3
–37
–45
mA
ITAC
Transmit output AC current level3
±28
±ITDC
mA
ITX10
Transmit current
–250
+250
µA
–3.7
V
–1580
mV
±1200
mV
+40
mV
VTCOM
Transmitter output voltage
VTXO = –10V
–41
compliance4
VCD
Collision threshold5
VOD
Differential output voltage – non idle at RX+ and
CD+6
VOB
Differential output voltage imbalance – idle at
RX+ and CD+7
VOC
Output common mode voltage at RX± and CD±
VRS
Receiver squelch threshold
Measured by applying
DC voltage at RXI
–1450
–1530
±600
–1.5
–2
–2.5
V
VRXI average DC
–130
–250
–370
mV
(VTX+ – VTX–) peak
–175
–225
–300
mV
VTS
Transmitter squelch threshold
RRXI
Shunt resistance at RXI non–transmitting
CRXI
Input capacitance at RXI
2
pF
RTXO
Shunt resistance at TXO transmitting
10
kΩ
100
kΩ
NOTES:
1. Currents flowing into device pins are positive. All voltages are referenced to ground unless otherwise specified. For ease of interpretation,
the parameter limit that appears in the MAX column is the largest value of the parameter, irrespective of sign. Similarly, the value in the MIN
column is the smallest value of the parameter, irrespective of sign.
2. All typicals are for VEE = –9V and TA = 27°C.
3. ITDC is measured as (VMAX + VMIN)/(2 x 25) where VMAX and VMIN are the max and min voltages at TXO with a 25Ω load between TXO and
GND. ITAC is measured as (VMAX – VMIN)/(2 x 25).
4. The TXO pin shall continue to sink at least ITDC min when the idle (no signal) voltage on this pin is –3.7V.
5. Collision threshold for an AC signal is within 10% of VCD.
6. Measured on secondary side of isolation transformer (see Connection Diagram, Figure 1). The transformer has a 1:1 turns ratio with an
inductance between 30 and 100µH at 5MHz.
7. Measured as the voltage difference between the RX pins or the CD pins with the transformer removed.
1995 May 1
4
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
NE8392C
TIMING CHARACTERISTICS
VEE = –9V +5%; TA = 0 to 70°C, unless otherwise specified1. No external isolation diode on TXO.
SYMBOL
PARAMETER
TEST CONDITIONS
tRON
Receiver start up delay RXI to RX± (Figure 3)
First received bit on RX±
VRXI = –2V peak
LIMITS
MIN
TYP
MAX
5
First validly timed bit on RX±
UNIT
bits
tRON +2
tRD
Receiver prop. delay RXI to RX±
tRR
Differential output rise time on RX± and CD±2,3
VRXI = –2V peak
5
ns
tRF
Differential output fall time on RX± and CD±2,3
5
ns
tOS
Differential output settling time on RX± and CD±
to VOB = 40mV2 (see Figure 4)
1
µs
tRJ
Receiver and cable total jitter
±3
ns
tRHI
Receiver high to idle time
tRM
Rise and fall time matching on RX± and CD±
Measured to +210mV
150
tRF – tRR
Transmitter start–up delay TX± to TXO
(Figure 5)
tTST
35
50
850
0.4
1
First validly timed bit
ns
ns
VTX± = –1V peak
First transmitted bit on TXO
ns
2
bits
tTST + 2
tTD
Transmitter prop delay TX± to TXO
(see Figure 5)
tTR
Transmitter rise time 10% to 90% (see Figure 5)
25
ns
tTF
Transmitter fall time 10% to 90% (see Figure 5)
25
ns
tTM
tTF – tTR mismatch
±2
ns
tTS
Transmitter added skew4
±2
VTX± = 1V peak
35
tTON
Transmitter turn on pulse width (see Figure 5)
VTX± = 1V peak
10
tTOFF
Transmitter turn off pulse width (see Figure 5)
VTX± = 1V peak
150
tCON
Collision turn on delay (see Figure 6)
tCOFF
50
ns
40
250
ns
ns
340
ns
0V to –2V step at RXI
13
bits
Collision turn off delay (see Figure 6)
–2V to 0V step at RXI
16
bits
tCHI
Collision high to idle time (see Figure 6)
Measured to +210mV
fCD
Collision frequency (see Figure 6)
tCP
150
8.0
10
850
ns
12.5
MHz
Collision signal pulse width (see Figure 6)
35
70
ns
tHON
Heartbeat turn on delay (see Figure 7)
0.6
1.6
µs
tHW
Heartbeat test duration (see Figure 7)
0.5
1.5
µs
tJA
Jabber activation delay measured from TX± to
CD± (see Figure 8)
20
60
ms
tJR
Jabber reset delay measured from TX± to CD±
(see Figure 8)
250
750
ms
NOTES:
1. All typicals are for VEE = –9V and TA = 27°C.
2. Measured on secondary side of isolation transformer (see Figure 1, Connection Diagram). The transformer has a 1:1 turn ratio with an
inductance between 30 and 100µH at 5MHz.
3. The rise and fall times are measured as the time required for the differential voltage to change from –225mV to +225mV, or +225mV to
–225mV, respectively.
4. Difference in propagation delay between rising and falling edges at TXO.
for collision circuitry functionality at the end of every
transmission.
FUNCTIONAL DESCRIPTION
The NE8392C contains four main functional blocks (see Block
Diagram). These are:
d. The jabber timer which disables the transmitter in the event of a
longer than legal length data packet.
a. The receiver which takes data from the coaxial cable and sends
it to the DTE.
Receiver Functions
b. The transmitter which receives data from the DTE and sends it
onto the coaxial cable.
The receiver consists of an input buffer, a cable equalizer, a 4-pole
Bessel low pass filter, a squelch circuit and a differential line driver.
c. The collision detection and heartbeat generation circuitry which
indicates to the DTE any collision on the coaxial cable and tests
The buffer provides high input resistance and low input capacitance
to minimize loading and reflections on the coaxial cable.
1995 May 1
5
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
signals. This is the only detection scheme allowed by the IEEE
802.3 standard for both repeater and non-repeater nodes.
The equalizer is a high pass filter that compensates for the low pass
effect of the coaxial cable and results in a flatband response over all
signal frequencies to minimize signal distortion.
The collision circuitry consists of the 4-pole Bessel low pass filter, a
comparator, a precision voltage reference that sets up the collision
threshold, a heartbeat generator, a 10MHz oscillator, and a
differential line driver.
The 4-pole Bessel low pass filter extracts the average DC voltage
level on the coaxial cable for use by the receiver squelch and
collision detection circuits.
The collision comparator monitors the DC level at the output of the
low pass filter and enables the line driver if it is more negative than
the collision threshold. A collision condition is indicated to the DTE
by a 10MHz oscillation signal at the CD outputs and typically occurs
within 700ns of the onset of the collision. The collision signal begins
with a negative-going pulse and ends with a continuous high-to-idle
state longer than 170ns. Figure 6 illustrates collision timing.
The receiver squelch circuit prevents noise on the coaxial cable
from falsely triggering the receiver in the absence of a true signal.
At the beginning of a packet, the receiver turns on when the DC
level from the low pass filter is lower than the DC squelch threshold.
For normal signal levels this will take less than 500ns, or 5 bits.
However, at the end of a packet, a fast receiver turn off is needed to
reject both dribble bits on the coaxial cable and spurious responses
due to settling of the on-chip bandpass filter. This is accomplished
by an AC timing circuit that disables the receiver if the signal level
on the coaxial cable remains high for typically 250ns and only
enables the receiver again after approximately 1µs. Figures 3 and 4
illustrate receiver timing.
At the end of every transmission, the heartbeat generator creates a
pseudo collision to ensure that the collision circuitry is properly
functioning. This pseudo collision consists of a 1µs burst of 10MHz
oscillation at the line driver outputs approximately 1µs after the end
of the transmission. The heartbeat function can be disabled
externally by connecting the HBE (heartbeat enable) to VEE. This
allows the CTI to be used in repeater applications. Figure 7
illustrates heartbeat timing.
The differential line driver provides typically ±900mV signals to the
DTE with less than 7ns rise and fall times. When in idle state (no
received signal) its outputs provide <20mV differential voltage offset
to minimize DC standing current in the isolation transformer. The
line driver outputs are emitter followers and, for Ethernet
applications where they drive a 78Ω transmission line, require a
500Ω pull-down resistor to VEE. For Thin Ethernet applications
where the AUI cable is not used, the pull-down resistor can be
increased to 1.5kΩ to save power consumption.
As with the receiver outputs, the collision outputs also require a pull
down resistor to VEE and maintain <20mV differential voltage offset
in the idle state to minimize DC standing current in the isolation
transformers.
Jabber Functions
The jabber timer monitors the transmitter and inhibits transmission if
it is active for longer than typically 30ms. The jabber circuit then
enables the collision outputs for the remainder of the data packet
and for typically 450ns (unjab time) after it has ended. At this point
the transmitter becomes uninhibited. Figure 8 illustrates jabber
timing.
Transmitter Functions
The transmitter has differential inputs and an open collector current
driver output. The differential input common mode voltage is
established by the CTI and should not be altered by external
circuitry. Controlled rise and fall times of 25ns (+5ns) minimize
higher harmonic components in the transmitted spectrum, while
matching of these rise and fall times to typically 2ns minimizes
signal jitter. The drive current levels of the CTI are set by an on-chip
bandgap voltage reference and an external 1% resistor. An on-chip
isolation diode is provided to reduce the transmitter’s coaxial cable
load capacitance. For Thin Ethernet applications, no further external
isolation diode is required, since the NE8392C meets the capacitive
loading specifications. For Ethernet applications a further external
diode should be added to reduce loading capacitance.
Detection of Coaxial Cable Faults
In the NE8392C there is no internal loopback path from the TX
inputs to the RX outputs. This means that, when the local DTE is
transmitting, the signal will only be present at the receiver outputs
RX+ and RX– if it appears on the coaxial cable and is larger than
the receiver squelch threshold VRS. If a short circuit fault condition
occurs at the cable connector to the CTI, then no signal will appear
at the receiver outputs. An intelligent DTE can, therefore, detect this
fault. If the fault is an open circuit, then a continuous collision signal
will be sent to the DTE, provided the average DC voltage at the RXI
pin is greater than the typical collision threshold of –1.53V.
The transmitter squelch circuit ensures that the transmitter can only
be enabled by negative-going differential signals of typically greater
than 225mV in magnitude and 15ns in duration. The transmitter will
be disabled at the end of a packet if there are no negative going
signals of greater than 225mV for more than typically 250ns. Figure
5 illustrates transmitter timing.
If a short or open circuit occurs elsewhere on the coaxial cable, the
resulting reflections can result in an impedance at the CTI of any
value between a short circuit and 50Ω, depending on the distance of
the CTI from the fault. The upper limit of 50Ω results from the fact
that the coaxial cable is terminated in 50Ω at both ends. Faults on
the cable itself are, therefore, not guaranteed to be detected by
simply monitoring the RX and CD pins when in the transmit mode,
and more sophisticated schemes may be necessary.
Collision Functions
The collision detection scheme implemented in the NE8392C is
receive mode detection, which detects a collision between any two
stations on the network with certainty at all times, irrespective of
whether or not the local DTE is producing one of the colliding
1995 May 1
NE8392C
6
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
NE8392C
AUI
CABLE
12 TO 15V DC
+
DC TO DC
CONVERTER
9V (ISOLATED)
–
(NOTE 4)
500Ω
16
1
COLLISION
PAIR
500Ω
78Ω
500Ω
15
2
DTE
500Ω
T1 (NOTE 1)
(NOTE 3)
COAX
13
4
CD+
RECEIVE
PAIR
78Ω
1
16
2
15
CD–
12
5
RX+
3
VEE1
VEE2
10
7
NE8392C
14
13
4
CTI
8
6
11
7
10
VEE3
1K 1%
8
9
RR+
GND
TX–
9
RXI
12
TX+
78Ω
(NOTE 2)
TXO
RR–
5
RX–
TRANSMIT
PAIR
CDS
HBE
NOTES:
1. T1 is a 1:1 pulse transformer, with an inductance of 30 to 100µH.
2. IN916 or equivalent for Ethernet, not required for Thin Ethernet.
3. 78Ω resistors not required if AUI cable not present.
4. Resistor value can be higher to reduce current consumption if AUI cable is not used.
SD00289
Figure 1. Connection Diagram
MAU
COAX
NE8392C
COAX
TRANSCEIVER
INTERFACE
I
S
O
L
A
T
I
O
N
SERIAL
NETWORK
INTERFACE
(OPTIONAL)
(AUI CABLE)
NETWORK
INTERFACE
CONTROLLER
B
U
S
DTE
MAU = Medium Attachment Unit
AUI Cable = Attachment Unit Interface Cable (not used in Thin Ethernet applications)
SD00284
Figure 2. Interface Diagram for Ethernet/Thin Ethernet Local Area Network
1995 May 1
7
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
NE8392C
RXI
1
2
3
4
PHASE VIOLATION
ALLOWED
5
6
VALID
TIMING
7
8
9
10
11
tRD
90%
RX+
tRF
tRR
10%
1
2
3
4
5
6
7
8
9
10
11
tRON+2
tRON
SD00277
Figure 3. Receiver Timing
RXI
tOS
tRHI
RX+
SD00279
Figure 4. Receiver End–of–Packet Timing
tTST+2
100ns
tTST
tTOFF
TX+
1
2
3
4
5
6
7
tTON
tTD
8
9
10
TXO
11
90%
tTF
10%
tTR
1
2
3
4
5
6
7
8
9
10
11
SD00278
Figure 5. Transmitter Timing
RXI
0V
–2V
tCON
tCOFF
tCHI
CD+
1/FCD
tCP
SD00280
Figure 6. Collision Timing
1995 May 1
8
Philips Semiconductors
Product specification
Coaxial transceiver interface for Ethernet/Thin Ethernet
NE8392C
TX+
tHON
tHW
CD+
SD00281
Figure 7. Heartbeat Timing
TX+
tJA
tJR
TXO
CD+
SD00282
Figure 8. Jabber Timing
1995 May 1
9
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