GeneSiC GA01PNS150-CAU Silicon carbide pin diode chip Datasheet

Die Datasheet
GA01PNS150-CAU
Silicon Carbide
PiN Diode Chip
VRRM
IF @ 25 oC
=
=
15000 V
1A
Features





15 kV blocking
210 °C operating temperature
Fast turn off characteristics
Soft reverse recovery characteristics
Ultra-Fast high temperature switching
Die Size = 2.4 mm x 2.4 mm
Advantages
Applications
 Highest voltage rectifier commercially available
 Reduced stacking
 Reduced system complexity/Increased reliability





Voltage Multiplier
Ignition/Trigger Circuits
Oil/Downhole
Lighting
Defense
Maximum Ratings at Tj = 210 °C, unless otherwise specified
Parameter
Repetitive peak reverse voltage
Continuous forward current
RMS forward current
Operating and storage temperature
Symbol
VRRM
IF
IF(RMS)
Tj , Tstg
Conditions
Values
15
1
0.5
-55 to 210
Unit
kV
A
A
°C
Electrical Characteristics at Tj = 210 °C, unless otherwise specified
Parameter
Diode forward voltage
Symbol
VF
Reverse current
IR
Total reverse recovery charge
Qrr
Switching time
ts
Total capacitance
C
Total capacitive charge
QC
Apr 2015
Conditions
IF = 1 A, Tj = 25 °C
IF = 1 A, Tj = 210 °C
VR = 15 kV, Tj = 25 °C
VR = 15 kV, Tj = 210 °C
VR = 1000 V
IF ≤ IF,MAX
IF = 1.5 A
dIF/dt = 70 A/μs
VR = 1000 V
Tj = 210 °C
IF = 1.5 A
VR = 1 V, f = 1 MHz, Tj = 25 °C
VR = 400 V, f = 1 MHz, Tj = 25 °C
VR = 1000 V, f = 1 MHz, Tj = 25 °C
VR = 1000 V, f = 1 MHz, Tj = 25 °C
min.
Values
typ.
6.4
4.3
1
max.
Unit
V
20
100
µA
558
nC
< 236
ns
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
22
4
3
4.5
pF
nC
Page 1 of 5
Die Datasheet
GA01PNS150-CAU
Figures:
Figure 1: Typical Forward Characteristics
Figure 2: Typical Reverse Characteristics
Figure 3: Typical Junction Capacitance vs Reverse Voltage
Characteristics
Figure 4: Typical Turn Off Characteristics at Ik = 0.5 A and
VR = 1000 V
Figure 5: Typical Turn Off Characteristics at Tj = 210 °C and
VR = 1000 V
Figure 6: Reverse Recovery Charge vs Cathode Current
Apr 2015
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
Page 2 of 5
Die Datasheet
GA01PNS150-CAU
Figure 7: Reverse Recovery Time vs Cathode Current
Apr 2015
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
Page 3 of 5
Die Datasheet
GA01PNS150-CAU
Mechanical Parameters
2
Die Dimensions
2.4 x 2.4
mm
Anode pad size
Φ 0.98
mm
Area total / active
5.76/0.75
mm
Die Thickness
450
µm
Wafer Size
100
mm
0
deg
Flat Position
Die Frontside Passivation
Polyimide
Anode Pad Metallization
400 nm Ni + 200 nm Au
Backside Cathode Metallization
400 nm Ni + 200 nm Au
Die Attach
Electrically conductive glue or solder
Wire Bond
Au ≤ 26 µm
Reject ink dot size
Φ ≥ 0.3 mm
Recommended storage environment
2
Store in original container, in dry nitrogen,
< 6 months at an ambient temperature of 23 °C
Chip Dimensions:
DIE
METAL
Apr 2015
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
A
[mm]
B
[mm]
C
[mm]
2.4
2.4
0.98
Page 4 of 5
Die Datasheet
GA01PNS150-CAU
Revision History
Date
Revision
Comments
2015/04/30
2
Updated Electrical Characteristics
2015/02/25
1
Inserted Mechanical Parameters
2014/08/26
0
Initial release
Supersedes
Published by
GeneSiC Semiconductor, Inc.
43670 Trade Center Place Suite 155
Dulles, VA 20166
GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice.
GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any
intellectual property rights is granted by this document.
Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft
navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal
injury and/or property damage.
Apr 2015
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
Page 5 of 5
Die Datasheet
GA01PNS150-CAU
SPICE Model Parameters
This is a secure document. Please copy this code from the SPICE model PDF file on our website
(http://www.genesicsemi.com/images/hit_sic/baredie/pin/GA01PNS150-CAU_SPICE.pdf) into LTSPICE
(version 4) software for simulation of the GA01PNS150-CAU device.
*
MODEL OF GeneSiC Semiconductor Inc.
*
*
$Revision:
1.1
$
*
$Date:
30-APR-2015
$
*
*
GeneSiC Semiconductor Inc.
*
43670 Trade Center Place Ste. 155
*
Dulles, VA 20166
*
*
COPYRIGHT (C) 2014 GeneSiC Semiconductor Inc.
*
ALL RIGHTS RESERVED
*
* These models are provided "AS IS, WHERE IS, AND WITH NO WARRANTY
* OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED
* TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE."
* Models accurate up to 2 times rated drain current.
*
* Start of GA01PNS150-CAU SPICE Model
*
.MODEL GA01PNS150 D
+ IS
9.71E-12
+ RS
2.24770
+ N
5.7869
+ IKF
0.039646
+ EG
3.23
+ XTI
58
+ TRS1
-0.0034
+ CJO
2.28E-11
+ VJ
2.304
+ M
0.376
+ FC
0.5
+ BV
16000
+ IBV
1.00E-03
+ VPK
15000
+ IAVE
1
+ TYPE
SiC_PiN
+ MFG
GeneSiC_Semi
*
* End of GA01PNS150-CAU SPICE Model
Apr 2015
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
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