NLX2G14 Dual Schmitt-Trigger Inverter The NLX2G14 MiniGatet is an advanced high−speed CMOS dual Schmitt−trigger inverter in ultra−small footprint. The NLX2G14 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. The NLX2G14 can be used to enhance noise immunity or to square up slowly changing waveforms. www.onsemi.com MARKING DIAGRAMS Features 1 6 OUT Y1 GND 2 5 VCC IN A2 3 4 OUT Y2 M UDFN6 1.2 x 1.0 CASE 517AA F IN A1 UDFN6 1.0 x 1.0 CASE 517BX M P Designed for 1.65 V to 5.5 V VCC Operation Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C 24 Balanced Output Source and Sink Capability Balanced Propagation Delays Overvoltage Tolerant (OVT) Input and Output Pins Ultra−Small Packages These are Pb−Free Devices 3 • • • • • • • M 1 1 UDFN6 1.45 x 1.0 CASE 517AQ 1 T = Device Marking* M = Date Code * Rotated 90° clockwise ORDERING INFORMATION See detailed ordering and shipping information on page 5 of this data sheet. Figure 1. Pinout (Top View) IN A1 1 OUT Y1 IN A2 1 OUT Y2 Figure 2. Logic Symbol PIN ASSIGNMENT 1 FUNCTION TABLE A Y L H H L © Semiconductor Components Industries, LLC, 2016 June, 2016 − Rev. 7 IN A1 2 GND 3 IN A2 4 OUT Y2 5 VCC 6 OUT Y1 1 Publication Order Number: NLX2G14/D NLX2G14 MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VIN DC Input Voltage −0.5 to +7.0 V DC Output Voltage −0.5 to +7.0 V VIN < GND −50 mA VOUT < GND −50 mA VOUT Parameter IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C MSL FR ILATCHUP Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in ±500 Latchup Performance Above VCC and Below GND at 125°C (Note 5) mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/UESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA / JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.65 5.5 V Digital Input Voltage 0 5.5 V Output Voltage 0 5.5 V −55 +125 °C 0 0 No Limit No Limit ns/V VCC Positive DC Supply Voltage VIN VOUT TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2 NLX2G14 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions TA = 255C TA = +855C TA = −555C to +1255C VCC (V) Min Typ Max Min Max Min Max Unit VT+ Positive Threshold Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.6 1.0 1.2 1.3 1.9 2.2 1.0 1.5 1.7 1.9 2.7 3.3 1.4 1.8 2.0 2.2 3.1 3.6 0.6 1.0 1.2 1.3 1.9 2.2 1.4 1.8 2.0 2.2 3.1 3.6 0.6 1.0 1.2 1.3 1.9 2.2 1.4 1.8 2.0 2.2 3.1 3.6 V VT− Negative Threshold Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.2 0.4 0.5 0.6 1.0 1.2 0.5 0.75 0.87 1.0 1.5 1.9 0.8 1.15 1.4 1.5 2.0 2.3 0.2 0.4 0.5 0.6 1.0 1.2 0.8 1.15 1.4 1.5 2.0 2.3 0.2 0.4 0.5 0.6 1.0 1.2 0.8 1.15 1.4 1.5 2.0 2.3 V VH Hysteresis Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.1 0.25 0.3 0.4 0.6 0.7 0.48 0.75 0.83 0.93 1.2 1.4 0.9 1.1 1.15 1.2 1.5 1.7 0.1 0.25 0.3 0.4 0.6 0.7 0.9 1.1 1.15 1.2 1.5 1.7 0.1 0.25 0.3 0.4 0.6 0.7 0.9 1.1 1.15 1.2 1.5 1.7 V VOH Minimum High−Level Output Voltage VIN v VT−MIN IOH = −100 mA 1.65− 5.5 VCC − 0.1 VCC VCC − 0.1 VCC − 0.1 VIN v VT−MIN IOH = −4 mA IOH = −8 mA IOH = −12 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA 1.65 2.3 2.7 3.0 3.0 4.5 1.29 1.9 2.2 2.4 2.3 3.8 1.52 2.1 2.4 2.7 2.5 4.0 1.29 1.9 2.2 2.4 2.3 3.8 1.29 1.8 2.1 2.3 2.2 3.7 VIN w VT+MAX IOL = 100 mA 1.65− 5.5 0 0.1 0.1 0.1 VIN w VT+MAX IOH = −4 mA IOH = −8 mA IOH = −12 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA 1.65 2.3 2.7 3.0 3.0 4.5 0.08 0.2 0.22 0.28 0.38 0.42 0.24 0.3 0.4 0.4 0.55 0.55 0.24 0.3 0.4 0.4 0.55 0.55 0.24 0.4 0.5 0.5 0.55 0.65 0 to 5.5 ±0.1 ±1.0 ±1.0 mA 0 1.0 10 10 mA 5.5 1.0 10 10 mA VOL Maximum Low−Level Output Voltage Input Leakage Current 0 v VIN v 5.5 V IOFF Power−Off Output Leakage Current VOUT = 5.5 V ICC Quiescent Supply Current 0 v VIN v VCC IIN V V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 3 NLX2G14 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Symbol tPLH, tPHL Parameter Propagation Delay, Input A to Output Y VCC (V) Test Condition 2.3−2.7 3.0−3.6 4.5−5.5 TA = 255C TA = +855C TA = −555C to +1255C Min Typ Max Min Max Min Max Unit RL = 1 MW, CL = 15 pF 1.8 4.3 7.4 1.8 8.1 1.8 9.1 ns RL = 1 MW, CL = 15 pF 1.5 3.3 5.0 1.5 5.5 1.5 6.5 RL = 500 W, CL = 50 pF 1.8 4.0 6.0 1.8 6.6 1.8 7.6 RL = 1 MW, CL = 15 pF 1.0 2.7 4.1 1.0 4.5 1.0 5.5 RL = 500 W, CL = 50 pF 1.2 3.2 4.9 1.2 5.4 1.2 6.4 CIN Input Capacitance 5.5 VIN = 0 V or VCC 2.5 pF CPD Power Dissipation Capacitance (Note 6) 3.3 5.5 10 MHz VIN = 0 V or VCC 11 12.5 pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC. VCC A or B 50% GND tPLH Y tPHL 50% VCC Figure 3. Switching Waveforms VCC PULSE GENERATOR DUT RT CL RT = ZOUT of pulse generator (typically 50 W) Figure 4. Test Circuit www.onsemi.com 4 RL NLX2G14 VT, TYPICAL INPUT THRESHOLD VOLTAGE (V) 4 3 2 VHtyp 1 2 2.5 3 3.5 3.6 VCC, POWER SUPPLY VOLTAGE (V) VHtyp = (VT + typ) − (VT − typ) Figure 5. Typical Input Threshold, VT+, VT− versus Power Supply Voltage VH VCC VT+ VT− VIN VCC VH VT+ VT− VIN GND GND VOH VOH VOUT Vout VOL VOL (a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt−Trigger Offers Maximum Noise Immunity Figure 6. Typical Schmitt−Trigger Applications ORDERING INFORMATION Package Shipping† NLX2G14MUTCG UDFN6, 1.2 x 1.0, 0.4P (Pb−Free) 3000 / Tape & Reel NLX2G14AMUTCG UDFN6, 1.45 x 1.0, 0.5P (Pb−Free) 3000 / Tape & Reel NLX2G14CMUTCG UDFN6, 1.0 x 1.0, 0.35P (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 NLX2G14 PACKAGE DIMENSIONS UDFN6, 1.2x1.0, 0.4P CASE 517AA ISSUE D EDGE OF PACKAGE PIN ONE REFERENCE 2X 0.10 C ÉÉ ÉÉ ÉÉ L1 E DETAIL A Bottom View (Optional) TOP VIEW 2X EXPOSED Cu 0.10 C (A3) 0.10 C A1 A 10X 0.08 C MOLD CMPD ÉÉÉ ÉÉÉ 5X DIM A A1 A3 b D E e L L1 L2 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.30 0.40 0.00 0.15 0.40 0.50 MOUNTING FOOTPRINT* 6X C A1 A3 DETAIL B Side View (Optional) SEATING PLANE SIDE VIEW 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B D 6X 0.42 0.22 L 3 L2 6X b 0.10 C A B 0.05 C 6 0.40 PITCH 4 e NOTE 3 1.07 DIMENSIONS: MILLIMETERS BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 6 NLX2G14 PACKAGE DIMENSIONS UDFN6 1.45x1.0, 0.5P CASE 517AQ ISSUE O A B D L L L1 PIN ONE REFERENCE 0.10 C ÉÉÉ ÉÉÉ DETAIL A E OPTIONAL CONSTRUCTIONS DETAIL B MOLD CMPD DETAIL B 0.05 C 6X DIM A A1 A2 b D E e L L1 ÉÉ ÉÉ EXPOSED Cu TOP VIEW 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. OPTIONAL CONSTRUCTIONS A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.07 REF 0.20 0.30 1.45 BSC 1.00 BSC 0.50 BSC 0.30 0.40 −−− 0.15 MOUNTING FOOTPRINT 0.05 C A1 A2 SIDE VIEW e 6X C 6X SEATING PLANE L 1.24 3 1 DETAIL A 6X 0.53 6 0.30 PACKAGE OUTLINE 4 BOTTOM VIEW 6X 0.50 PITCH DIMENSIONS: MILLIMETERS b 0.10 C A B 0.05 C 1 NOTE 3 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 7 NLX2G14 PACKAGE DIMENSIONS UDFN6 1.0x1.0, 0.35P CASE 517BX ISSUE O PIN ONE REFERENCE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 MM FROM TERMINAL TIP. 4. PACKAGE DIMENSIONS EXCLUSIVE OF BURRS AND MOLD FLASH. A B D ÉÉÉ ÉÉÉ ÉÉÉ E 0.10 C 2X 2X 0.10 C DIM A A1 A3 b D E e L L1 TOP VIEW A3 0.05 C A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 0.05 C SIDE VIEW A1 C RECOMMENDED SOLDERING FOOTPRINT* SEATING PLANE 5X e 5X 0.48 L 6X 0.22 3 1 L1 1.18 6 4 6X BOTTOM VIEW b 0.10 M C A B 0.05 M C 0.53 1 PKG OUTLINE NOTE 3 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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