AD ADG701LBRT-REEL Cmos low voltage 2 ohm spst switch Datasheet

CMOS Low Voltage
2 Ω SPST Switches
ADG701L/ADG702L
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
1.8 V to 5.5 V single supply
2 Ω (typical) on resistance
Low on resistance flatness
Guaranteed leakage specifications up to 85°C
–3 dB bandwidth > 200 MHz
Rail-to-rail operation
Fast switching times
tON 18 ns
tOFF 12 ns
Typical power consumption < 0.01 μW
TTL/CMOS-compatible
ADG701L
S
D
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
05486-001
IN
Figure 1.
ADG702L
APPLICATIONS
S
Battery-powered systems
Communication systems
Sample-and-hold systems
Audio signal routing
Video switching
Mechanical reed relay replacement
D
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
05486-020
IN
Figure 2.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG701L/ADG702L are monolithic CMOS SPST switches.
These switches are designed using an advanced submicron
process that provides low power dissipation, yet offers high
switching speed, low on resistance, and low leakage currents.
In addition, −3 dB bandwidths of greater than 200 MHz can
be achieved.
1.
1.8 V to 5.5 V single-supply operation. The ADG701L/
ADG702L offer high performance, including low on
resistance and fast switching times. The ADG701L/
ADG702L are fully specified and guaranteed with 3 V
and 5 V supply rails.
2.
Very low RON (3 Ω maximum at 5 V, 5 Ω maximum at 3 V).
At 1.8 V operation, RON is typically 40 Ω over the
temperature range.
3.
On resistance flatness RFLAT(ON) (1 Ω maximum).
4.
−3 dB bandwidth > 200 MHz.
5.
Low power dissipation. CMOS construction ensures low
power dissipation.
6.
Fast tON/tOFF.
The ADG701L/ADG702L can operate from a single 1.8 V to
5.5 V supply, making it ideal for use in battery-powered
instruments and with the new generation of DACs and ADCs
from Analog Devices.
Figure 1 and Figure 2 show that with a logic input of 1, the
switch of the ADG701L is closed, while that of the ADG702L
is open. Each switch conducts equally well in both directions
when on.
The ADG701L/ADG702L are packaged as 5-lead SOT-23,
6-lead SOT-23, and 8-lead MSOP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADG701L/ADG702L
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Applications....................................................................................... 1
Test Circuits........................................................................................8
General Description ......................................................................... 1
Terminology .......................................................................................9
Functional Block Diagrams............................................................. 1
Applications Information .............................................................. 10
Product Highlights ........................................................................... 1
Supply Voltages........................................................................... 10
Revision History ............................................................................... 2
Bandwidth ................................................................................... 10
Specifications..................................................................................... 3
Off Isolation ................................................................................ 10
Absolute Maximum Ratings............................................................ 5
Outline Dimensions ....................................................................... 11
ESD Caution.................................................................................. 5
Ordering Guide .......................................................................... 12
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
11/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADG701L/ADG702L
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V. Temperature range for the B version is −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT(ON))
B Version
−40°C to
+85°C
+25°C
0 V to VDD
2
3
0.5
4
1.0
LEAKAGE CURRENTS
Source Off Leakage, IS (OFF)
Drain Off Leakage, ID (OFF)
Channel On Leakage, ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS 1
tON
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
5
−55
−75
200
17
17
38
μA typ
μA max
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 300 Ω, CL = 35 pF
VS = 3 V; see Figure 15
RL = 300 Ω, CL = 35 pF
VS = 3 V; see Figure 15
VS = 2 V, RS = 0 Ω, CL = 1 nF; see Figure 16
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
RL = 50 Ω, CL = 5 pF; see Figure 18
0.001
1.0
1
VDD = 5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 13
V min
V max
12
Bandwidth −3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
VS = 0 V to VDD, IS = −10 mA
2.4
0.8
±0.35
18
Charge Injection
Off Isolation
VS = 0 V to VDD, IS = −10 mA; see Figure 12
±0.35
±0.35
12
8
V
Ω typ
Ω max
Ω typ
Ω max
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
nA typ
nA max
0.005
tOFF
Unit
μA typ
μA max
Guaranteed by design, not subject to production test.
Rev. 0 | Page 3 of 12
VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 13
VS = VD = 1 V, or 4.5 V; see Figure 14
VDD = 5.5 V
Digital inputs = 0 V or 5 V
ADG701L/ADG702L
VDD = 3 V ± 10%, GND = 0 V. Temperature range for the B version is −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Drain Off Leakage ID (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS 1
tON
B Version
−40°C to
+85°C
+25°C
0 V to VDD
3.5
5
1.5
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
6
Bandwidth −3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
VS = 0 V to VDD, IS = −10 mA
VDD = 3.3 V
VS = 3 V/1 V, VD = 1 V/3 V; see Figure 13
2.0
0.4
V min
V max
μA typ
μA max
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 300 Ω, CL = 35 pF
VS = 2 V, see Figure 15
RL = 300 Ω, CL = 35 pF
VS = 2 V, see Figure 15
VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 16
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
RL = 50 Ω, CL = 5 pF; see Figure 18
±0.35
0.005
14
8
4
−55
−75
200
17
17
38
0.001
1.0
1
VS = 0 V to VDD, IS = −10 mA; see Figure 12
±0.35
±0.35
13
Charge Injection
Off Isolation
V
Ω typ
Ω max
Ω typ
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
nA typ
nA max
20
tOFF
Unit
μA typ
μA max
Guaranteed by design, not subject to production test.
Rev. 0 | Page 4 of 12
VS = 3 V/1 V, VD = 1 V/3 V; see Figure 13
VS = VD = 1 V, or 3 V; see Figure 14
VDD = 3.3 V
Digital Inputs = 0 V or 3 V
ADG701L/ADG702L
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to GND
Analog, Digital Inputs 1
Continuous Current, S or D
Peak Current, S or D
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
MSOP Package, Power Dissipation
θJA Thermal Impedance
θJC Thermal Impedance
SOT-23 Package, Power Dissipation
θJA Thermal Impedance
θJC Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Lead-free Reflow Soldering
Peak Temperature
Time at Peak Temperature
ESD
1
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
30 mA
100 mA, pulsed at 1 ms,
10% duty cycle maximum
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
−40°C to +85°C
−65°C to +150°C
150°C
315 mW
206°C/W
44°C/W
282 mW
229.6°C/W
91.99°C/W
215°C
220°C
260 (+0/−5)°C
10 sec to 40 sec
2 kV
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 12
ADG701L/ADG702L
8
S
7
GND
6
IN
TOP VIEW
VDD 4 (Not to Scale) 5 NC
NC = NO CONNECT
D 1
6
ADG701L/
ADG702L
VDD
D 1
5
NC
S 2
TOP VIEW
GND 3 (Not to Scale)
4
IN
S 2
NC = NO CONNECT
Figure 3. 8-Lead MSOP Pin Configuration
Figure 4. 6-Lead SOT-23 Pin Configuration
Pin Number
6-lead SOT-23
1
5
6
4
3
2
5-lead SOT-23
1
N/A
5
4
3
2
Mnemonic
D
NC
VDD
IN
GND
S
Description
Drain Terminal. May be an input or output.
No Connect.
Most Positive Power Supply Potential.
Logic Control Input.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Table 5. Truth Table
ADG701L In
0
1
ADG702L In
1
0
Switch Condition
Off
On
Rev. 0 | Page 6 of 12
VDD
4
IN
Figure 5. 5-Lead SOT-23 Pin Configuration
Table 4. Pin Function Descriptions
8-Lead MSOP
1
2, 3, 5
4
6
7
8
5
ADG701L/
ADG702L
TOP VIEW
GND 3 (Not to Scale)
05486-003
NC 3
ADG701L/
ADG702L
05486-002
D 1
NC 2
05486-004
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADG701L/ADG702L
TYPICAL PERFORMANCE CHARACTERISTICS
10m
3.5
VDD = 2.7V
TA = 25°C
1m
3.0
100μ
2.5
VDD = 4.5V
2.0
1.5
VDD = 5.0V
10μ
1μ
100n
0.5
10n
05486-005
1.0
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VD OR VS (DRAIN OR SOURCE VOLTAGE (V))
05486-008
ISUPPLY (A)
VDD = 3.0V
RON (Ω)
VDD = 5V
1n
10
5.0
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 9. Supply Current vs. Input Switching Frequency
Figure 6. On Resistance as a Function of VD (VS) Single Supplies
–10
3.5
VDD = 3V
VDD = 5V, 3V
–20
3.0
–30
+85°C
OFF ISOLATION (dB)
2.5
RON (Ω)
+25°C
2.0
–40°C
1.5
1.0
–40
–50
–60
–70
–80
05486-006
0
0
0.5
1.0
1.5
2.0
2.5
VD OR VS (DRAIN OR SOURCE VOLTAGE (V))
05486-009
–90
0.5
–100
–110
10k
3.0
Figure 7. On Resistance as a Function of VD (VS) for Different
Temperatures VDD = 3 V
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 10. Off Isolation vs. Frequency
0
3.5
VDD = 5V
VDD = 3V
3.0
2.0
+25°C
1.5
–40°C
1.0
0.5
05486-007
RON (Ω)
+85°C
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VD OR VS (DRAIN OR SOURCE VOLTAGE (V))
5.0
Figure 8. On Resistance as a Function of VD (VS) for Different
Temperatures VDD = 5 V
–2
–4
–6
10k
05486-010
ON RESPONSE (dB)
2.5
100k
1M
10M
FREQUENCY (Hz)
Figure 11. Bandwidth
Rev. 0 | Page 7 of 12
100M
ADG701L/ADG702L
TEST CIRCUITS
IDS
V1
RON = V1/IDS
D
VS
VD
Figure 12. On Resistance
S
A
D
VS
ID (ON)
A
05486-013
ID (OFF)
S
A
05486-012
VS
IS (OFF)
D
05486-011
S
VD
Figure 13. Off Leakage
Figure 14. On Leakage
VDD
0.1μF
VIN
ADG701L
50%
50%
ADG702L
50%
50%
VDD
VS
VOUT
D
VIN
RL
300Ω
IN
CL
35pF
90%
VOUT
90%
GND
tON
tOFF
05486-014
S
Figure 15. Switching Times
VDD
VDD
S
VIN
D
ADG701L
ON
OFF
QINJ = CL × ΔVOUT
ΔVOUT
VOUT
CL
1nF
VS
IN
VIN
ADG702L
VOUT
GND
05486-015
RS
Figure 16. Charge Injection
VDD
VDD
0.1μF
0.1μF
VDD
S
RL
50Ω
IN
VIN
GND
VS
Figure 17. Off Isolation
RL
50Ω
VIN
GND
Figure 18. Bandwidth
Rev. 0 | Page 8 of 12
VOUT
D
IN
05486-016
VS
VOUT
D
05486-017
S
VDD
ADG701L/ADG702L
TERMINOLOGY
RON
Ohmic resistance between D and S.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
tON
Delay between applying the digital control input and the output
switching on. See Figure 15.
tOFF
Delay between applying the digital control input and the output
switching off.
IS (OFF)
Source leakage current with the switch off.
Off Isolation
A measure of unwanted signal coupling through an off switch.
ID (OFF)
Drain leakage current with the switch off.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
ID, IS (ON)
Channel leakage current with the switch on.
VD (VS)
Analog voltage on Terminal D and Terminal S.
CS (OFF)
Off switch source capacitance.
CD (OFF)
Off switch drain capacitance.
Bandwidth
The frequency at which the output is attenuated by −3 dB.
On Response
The frequency response of the on switch.
On Loss
The voltage drop across the on switch, seen in Figure 11 as
the number of decibels the signal is away from 0 dB at very low
frequencies.
CD, CS (ON)
On switch capacitance.
Rev. 0 | Page 9 of 12
ADG701L/ADG702L
APPLICATIONS INFORMATION
The ADG701L/ADG702L belong to the Analog Devices new
family of CMOS switches. This series of general-purpose switches
have improved switching times, lower on resistance, higher
bandwidth, low power consumption, and low leakage currents.
SUPPLY VOLTAGES
Functionality of the ADG701L/ADG702L extends from 1.8 V to
5.5 V single supply, making the parts ideal for battery-powered
instruments where power, efficiency, and performance are
important design parameters.
It is important to note that the supply voltage affects the input
signal range, the on resistance, and the switching times of the
part. The effects of the power supplies can be clearly seen in the
Typical Performance Characteristics and the Specifications
sections.
The signal transfer characteristic is dependent on the switch
channel capacitance, CDS. This capacitance creates a frequency
zero in the numerator of the transfer function, A(s). Because
the switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with CDS and the load capacitance. The
frequency pole corresponding to these capacitances appears in
the denominator of A(s).
The dominant effect of the output capacitance, CD, causes the
pole breakpoint frequency to occur first. In order to maximize
bandwidth, a switch must have a low input and output capacitance and low on resistance. The on response versus frequency
for the ADG701L/ADG702L is shown in Figure 11.
OFF ISOLATION
Off isolation is a measure of the input signal coupled through
an off switch to the switch output. The capacitance, CDS, couples
the input signal to the output load when the switch is off (see
Figure 20).
BANDWIDTH
Figure 19 illustrates the parasitic components that affect the ac
performance of CMOS switches (a box surrounds the switch).
Additional external capacitances further degrade some performance. These capacitances affect feedthrough, crosstalk, and
system bandwidth.
CDS
S
VOUT
VIN
CD
CLOAD
RLOAD
Figure 20. Off Isolation Is Affected by External Load Resistance and
Capacitance
CDS
S
D
VOUT
CD
CLOAD
RLOAD
05486-018
RON
VIN
D
05486-019
For VDD = 1.8 V operation, RON is typically 40 Ω over the
temperature range.
Figure 19. Switch Represented by Equivalent Parasitic Components
The transfer function that describes the equivalent diagram of
the switch (see Figure 19) is of the form A(s), as shown in the
following equation:
⎡ s(RON C DS ) + 1 ⎤
A(s) = RT ⎢
⎥
⎣ s(RON CT RT ) + 1 ⎦
The larger the value of CDS, the larger the values of feedthrough
produced. Figure 10 illustrates the drop in off isolation as a
function of frequency. From dc to roughly 1 MHz, the switch
shows better than −75 dB isolation. Up to frequencies of
10 MHz, the off isolation remains better than −55 dB. As the
frequency increases, more and more of the input signal is
coupled through to the output. Off isolation can be maximized
by choosing a switch with the smallest CDS possible. The values
of load resistance and capacitance also affect off isolation, as
they contribute to the coefficients of the poles and zeros in the
transfer function of the switch when open.
where CT = CLOAD + CD + CDS.
⎡ s(RLOADC DS ) + 1 ⎤
A(s) = RT ⎢
⎥
⎣ s(RLOAD )(CT ) + 1 ⎦
Rev. 0 | Page 10 of 12
ADG701L/ADG702L
OUTLINE DIMENSIONS
2.90 BSC
3.00
BSC
8
3.00
BSC
1
6
5
4
1
2
3
2.80 BSC
1.60 BSC
5
4.90
BSC
PIN 1
INDICATOR
4
0.95 BSC
PIN 1
1.90
BSC
1.30
1.15
0.90
0.65 BSC
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
1.45 MAX
0.80
0.60
0.40
8°
0°
0.50
0.30
0.15 MAX
SEATING
PLANE
SEATING
PLANE
0.22
0.08
10°
4°
0°
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-187-AA
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 21. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 22. 6-Lead Small Outline Transistor Package [SOT-23]
(RT-6)
Dimensions shown in millimeters
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
PIN 1
0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX
0.15 MAX
0.50
0.30
0.22
0.08
SEATING
PLANE
10°
5°
0°
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 23. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Rev. 0 | Page 11 of 12
0.60
0.45
0.30
ADG701L/ADG702L
ORDERING GUIDE
Model
ADG701LBRJ-500RL7
ADG701LBRJ-REEL
ADG701LBRJ-REEL7
ADG701LBRJZ-500RL7 2
ADG701LBRJZ-REEL2
ADG701LBRJZ-REEL72
ADG701LBRM
ADG701LBRM-REEL
ADG701LBRM-REEL7
ADG701LBRMZ2
ADG701LBRMZ-REEL2
ADG701LBRMZ-REEL72
ADG701LBRT-REEL
ADG701LBRT-REEL7
ADG701LBRTZ-REEL2
ADG701LBRTZ-REEL72
ADG702LBRJ-REEL
ADG702LBRJ-REEL7
ADG702LBRJZ-500RL72
ADG702LBRJZ-REEL2
ADG702LBRJZ-REEL72
ADG702LBRM
ADG702LBRM-REEL
ADG702LBRM-REEL7
ADG702LBRMZ2
ADG702LBRMZ-REEL2
ADG702LBRMZ-REEL72
ADG702LBRT-REEL
ADG702LBRT-REEL7
ADG702LBRTZ-REEL2
ADG702LBRTZ-REEL72
1
2
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
Due to package size limitations, these three characters represent the part number.
Z = Pb-free part.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05486-0-11/06(0)
Rev. 0 | Page 12 of 12
Package Option
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RT-6
RT-6
RT-6
RT-6
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RT-6
RT-6
RT-6
RT-6
Branding 1
S15
S15
S15
S10
S10
S10
S15
S15
S15
S10
S10
S10
S15
S15
S10
S10
S16
S16
S11
S11
S11
S16
S16
S16
S11
S11
S11
S16
S16
S11
S11
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